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* mflash: Initial mflash supportunsik Kim2009-04-03-2/+730
| | | | | | | | | | | | | | | | | | | | Mflash is fusion memory device mainly targeted consumer eletronic and mobile phone. Internally, it have nand flash and other hardware logics and supports some different operation (ATA, IO, XIP) modes. IO mode is custom mode for the host that doesn't have IDE interface. (Many mobile targeted SoC doesn't have IDE bus) This driver support mflash IO mode. Followings are brief descriptions about IO mode. 1. IO mode based on ATA protocol and uses some custom command. (read confirm, write confirm) 2. IO mode uses SRAM bus interface. Signed-off-by: unsik Kim <donari75@gmail.com>
* Merge branch 'master' of git://git.denx.de/u-boot-nand-flashWolfgang Denk2009-04-03-0/+3
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| * Noisily disable the legacy NAND subsystem.Scott Wood2009-04-03-0/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Legacy NAND is marked for feature removal after April 2009 (i.e. this upcoming release). There are still several boards that reference it (though many do so only for disk-on-chip support which has been silently disabled for a while now). These boards will now fail to build with #error, though the code is still there if the user removes #error. The plan is to remove the code outright in the next release, along with any board code that refers to it (such as board/esd/common/auto_update.c). Also, remove the legacy NAND API description from README.nand. Signed-off-by: Scott Wood <scottwood@freescale.com>
* | Merge branch 'sf' of git://git.denx.de/u-boot-blackfinWolfgang Denk2009-04-03-20/+780
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| * | sf: stmicro: dont send 4 bytes when reading status registerMike Frysinger2009-04-02-3/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | I can't find anywhere in the datasheet that says the status register needs 3 dummy bytes sent to it before being able to read back the first real result. Tests on a Blackfin board show that after writing the opcode, the status register starts coming back immediately. So only write out the read status register opcode before polling the result. Signed-off-by: Mike Frysinger <vapier@gentoo.org> CC: Jason McMullan <mcmullan@netapp.com> CC: TsiChung Liew <Tsi-Chung.Liew@freescale.com>
| * | sf: set common timeouts in seconds, not millisecondsMike Frysinger2009-04-02-3/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Since timeouts are only hit when there is a problem in the system, we don't want to prematurely timeout on a functioning setup. Thus having low timeouts (in milliseconds) doesn't gain us anything in the production case, but rather increases likely hood of causing problems where none otherwise exist. Signed-off-by: Mike Frysinger <vapier@gentoo.org> CC: Haavard Skinnemoen <haavard.skinnemoen@atmel.com>
| * | sf: stmicro: use common page timeout defineMike Frysinger2009-04-02-2/+1
| | | | | | | | | | | | | | | Signed-off-by: Mike Frysinger <vapier@gentoo.org> CC: Haavard Skinnemoen <haavard.skinnemoen@atmel.com>
| * | sf: always read 5 bytes for the idcodeMike Frysinger2009-04-02-11/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Some SPI flash drivers like to have extended id information available (like the spansion flash), so rather than making it re-issue the ID cmd to get at the last 2 bytes, have the common code read 5 bytes rather than just 3. This also matches the Linux behavior where it always reads 5 id bytes from all flashes. Signed-off-by: Mike Frysinger <vapier@gentoo.org> Acked-by: Haavard Skinnemoen <haavard.skinnemoen@atmel.com> CC: Mingkai Hu <Mingkai.hu@freescale.com>
| * | sf: stmicro: drop redundant id readMike Frysinger2009-04-02-7/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The common SPI flash code reads the idcode and passes it down to the SPI flash driver, so there is no need to read it again ourselves. Signed-off-by: Mike Frysinger <vapier@gentoo.org> Acked-by: Haavard Skinnemoen <haavard.skinnemoen@atmel.com> CC: Jason McMullan <mcmullan@netapp.com> CC: TsiChung Liew <Tsi-Chung.Liew@freescale.com>
| * | sf: add driver for SST flashesMike Frysinger2009-04-02-0/+365
| | | | | | | | | | | | | | | Signed-off-by: Mike Frysinger <vapier@gentoo.org> Acked-by: Haavard Skinnemoen <haavard.skinnemoen@atmel.com>
| * | sf: drop DEBUG definesMike Frysinger2009-04-02-2/+2
| | | | | | | | | | | | | | | Signed-off-by: Mike Frysinger <vapier@gentoo.org> Acked-by: Haavard Skinnemoen <haavard.skinnemoen@atmel.com>
| * | mtd: add some at45 spi flash supportJean-Christophe PLAGNIOL-VILLARD2009-04-02-0/+48
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | - AT45DB321D - AT45DB161D - AT45DB081D - AT45DB041D - AT45DB021D - AT45DB011D Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> Signed-off-by: Mike Frysinger <vapier@gentoo.org>
| * | mtd: SPI Flash: Support the Spansion FlashMingkai Hu2009-04-02-0/+357
| |/ | | | | | | | | | | | | | | Add MTD SPI Flash support for S25FL008A, S25FL016A, S25FL032A, S25FL064A, S25FL128P. Signed-off-by: Mingkai Hu <Mingkai.hu@freescale.com> Signed-off-by: Mike Frysinger <vapier@gentoo.org>
* | Merge branch 'master' of git://git.denx.de/u-boot-blackfinWolfgang Denk2009-04-03-12/+20
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| * | Blackfin: add BF538/BF539 SPI portmux handlingMike Frysinger2009-04-02-0/+18
| | | | | | | | | | | | Signed-off-by: Mike Frysinger <vapier@gentoo.org>
| * | Blackfin: convert bfin_sdh to legacy mmcMike Frysinger2009-04-02-12/+2
| |/ | | | | | | | | | | | | The Blackfin SDH controller is still using the legacy framework, so update the driver to use the renamed functions. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
* | Rename common ns16550 constants with UART_ prefix to prevent conflictsDetlev Zundel2009-04-03-28/+33
|/ | | | | | | | | | | | Fix problems introduced in commit 7b5611cdd12ca0cc33f994f0d4a4454788fc3124 [inka4x0: Add hardware diagnosis functions for inka4x0] which redefined MSR_RI which is already used on PowerPC systems. Also eliminate redundant definitions in ps2mult.h. More cleanup will be needed for other redundant occurrences though. Signed-off-by: Detlev Zundel <dzu@denx.de>
* Merge branch 'master' of git://git.denx.de/u-boot-armWolfgang Denk2009-04-02-0/+3549
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| * s3c2410: move nand driver to drivers/mtd/nandJean-Christophe PLAGNIOL-VILLARD2009-03-30-0/+172
| | | | | | | | Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
| * s3c24x0: move i2c driver to drivers/i2cJean-Christophe PLAGNIOL-VILLARD2009-03-30-0/+443
| | | | | | | | Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
| * s3c24x0: move serial driver to drivers/serialJean-Christophe PLAGNIOL-VILLARD2009-03-30-0/+301
| | | | | | | | Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
| * davinci: move i2c driver to drivers/i2cJean-Christophe PLAGNIOL-VILLARD2009-03-30-0/+330
| | | | | | | | Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
| * davinci: move nand driver to drivers/mtd/nandJean-Christophe PLAGNIOL-VILLARD2009-03-30-0/+467
| | | | | | | | Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
| * imx: move serial driver to drivers/serialJean-Christophe PLAGNIOL-VILLARD2009-03-30-0/+222
| | | | | | | | Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
| * arm720t/clps7111: move serial driver to drivers/serialJean-Christophe PLAGNIOL-VILLARD2009-03-29-0/+122
| | | | | | | | | | | | add CONFIG_CLPS7111_SERIAL to activate the driver Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
| * lpc2292: move serial driver to drivers/serialJean-Christophe PLAGNIOL-VILLARD2009-03-29-0/+106
| | | | | | | | | | | | add CONFIG_LPC2292_SERIAL to activate the driver Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
| * ks8695: move serial driver to drivers/serialJean-Christophe PLAGNIOL-VILLARD2009-03-29-0/+118
| | | | | | | | | | | | add CONFIG_KS8695_SERIAL to activate the driver Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
| * s3c64xx: move usb driver to drivers/usbJean-Christophe PLAGNIOL-VILLARD2009-03-29-0/+46
| | | | | | | | | | | | add CONFIG_USB_S3C64XX to activate the driver Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
| * imx31: move serial driver to drivers/serialJean-Christophe PLAGNIOL-VILLARD2009-03-29-0/+227
| | | | | | | | Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
| * netarm: move serial driver to drivers/serialJean-Christophe PLAGNIOL-VILLARD2009-03-29-0/+196
| | | | | | | | | | | | add CONFIG_NETARM_SERIAL to activate the driver Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
| * sa1100: move serial driver to drivers/serialJean-Christophe PLAGNIOL-VILLARD2009-03-29-0/+161
| | | | | | | | | | | | add CONFIG_SA1100_SERIAL to activate the driver Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
| * s3c44b0: move serial driver to drivers/serialJean-Christophe PLAGNIOL-VILLARD2009-03-29-0/+219
| | | | | | | | Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
| * s3c44b0: move rtc driver to drivers/rtcJean-Christophe PLAGNIOL-VILLARD2009-03-29-0/+103
| | | | | | | | Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
| * s3c44b0: move i2c driver to drivers/i2cJean-Christophe PLAGNIOL-VILLARD2009-03-29-0/+316
| | | | | | | | Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
* | Merge branch 'master' of git://git.denx.de/u-boot-i2cWolfgang Denk2009-04-01-5/+1
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| * | soft_i2c.c compiler/linker errorJens Scharsig2009-03-31-5/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch fix the compiler/linker errors common/cmd_i2c.c:1252: undefined reference to `i2c_get_bus_speed' common/cmd_i2c.c:1256: undefined reference to `i2c_set_bus_speed' if board use CONFIG_I2C_CMD_TREE and CONFIG_I2C_MULTI_BUS is not uesd/undef (wrong define order) and removes additional empty lines Signed-off-by: Jens Scharsig <esw@bus-elektronik.de>
* | | MPC85xx: Add MPC8569 CPU supportHaiying Wang2009-03-30-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | There is a workaround for MPC8569 CPU Errata, which needs to set Bit 13 of LBCR in 4K bootpage. We setup a temp TLB for eLBC controller in bootpage, then invalidate it after LBCR bit 13 is set. Signed-off-by: Haiying Wang <Haiying.Wang@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* | | MPC85xx: Load and enable QE microcode patch in IRAMHaiying Wang2009-03-30-0/+10
|/ / | | | | | | | | | | | | | | For the silicon which doesn't have ROM support in QE, it always needs to load a pre-built ucode binary to IRAM so that QE can work. Signed-off-by: Haiying Wang <Haiying.Wang@freescale.com> Signed-off-by: Hillel Avni <Hillel.Avni@freescale.com>
* | rtc: add support for 4543 RTC (manufactured by e.g. EPSON)Detlev Zundel2009-03-30-0/+119
| | | | | | | | | | Signed-off-by: Detlev Zundel <dzu@denx.de> Signed-off-by: Andreas Pfefferle <ap@denx.de>
* | drivers/twserial: Add protocol driver for "three wire serial" interface.Detlev Zundel2009-03-30-0/+157
|/ | | | | | This pretty unintelligent interface is used on some RTC chips. Signed-off-by: Detlev Zundel <dzu@denx.de>
* cs8900 compile fixLadislav Michl2009-03-29-1/+1
| | | | | | | | | | | cs8900.c: In function 'eth_init': cs8900.c:164: warning: passing argument 2 of 'eth_getenv_enetaddr' from incompatible pointer type cs8900.c:165: error: invalid operands to binary << cs8900.c:166: error: invalid operands to binary << cs8900.c:167: error: invalid operands to binary << Signed-off-by: Ladislav Michl <ladis@linux-mips.org> Acked-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
* Merge branch 'master' of git://git.denx.de/u-boot-at91Wolfgang Denk2009-03-26-2/+81
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| * at91: Support for the at91sam9g20 : Atmel 400Mhz ARM 926ej-s SOC.Nicolas Ferre2009-03-22-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | AT91sam9g20 is an evolution of the at91sam9260 with a faster clock speed. The AT91SAM9G20-EK board is an updated revision of the AT91SAM9260-EK board. It is essentially the same, with a few minor differences. Here is the chip page on Atmel website: http://www.atmel.com/dyn/products/product_card.asp?part_id=4337 Signed-off-by: Justin Waters <justin.waters@timesys.com> Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com> Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
| * at91sam9/at91cap: move nand drivers to drivers/mtd/nandJean-Christophe PLAGNIOL-VILLARD2009-03-22-0/+79
| | | | | | | | Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
* | Merge branch 'master' of git://git.denx.de/u-boot-blackfinWolfgang Denk2009-03-25-5/+3
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| * | Blackfin: spi: there is no PORTJ_FER MMR on BF537Sonic Zhang2009-03-23-5/+3
| | | | | | | | | | | | | | | | | | | | | | | | Since the PORTJ on the BF537 is peripheral-only (no GPIO functionality), then there is no PORTJ_FER register for us to worry about. Signed-off-by: Sonic Zhang <Sonic.Zhang@analog.com> Signed-off-by: Mike Frysinger <vapier@gentoo.org>
* | | Add wait flags to support board/chip specific delaysWolfgang Grandegger2009-03-23-9/+28
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The NAND flash on the TQM8548_BE modules requires a short delay after running the UPM pattern like the MPC8360ERDK board does. The TQM8548_BE requires a further short delay after writing out a buffer. Normally the R/B pin should be checked, but it's not connected on the TQM8548_BE. The corresponding Linux FSL UPM driver uses similar delay points at the same locations. To manage these extra delays in a more general way, I introduced the "wait_flags" field allowing the board-specific driver to specify various types of extra delay. Signed-off-by: Wolfgang Grandegger <wg@grandegger.com> Signed-off-by: Scott Wood <scottwood@freescale.com>
* | | Add support for TQM-specific chip select logic to FSL-UPMWolfgang Grandegger2009-03-23-1/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | For the NAND chips on the TQM8548 modules, a special chip-select logic is used. It uses dedicated address lines to be set via UPM machine address register (mar). This patch adds such support to the FSL-UPM driver. Signed-off-by: Wolfgang Grandegger <wg@grandegger.com> Signed-off-by: Scott Wood <scottwood@freescale.com>
* | | Add multi chip support to the FSL-UPM driverWolfgang Grandegger2009-03-23-8/+36
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch adds support for multi-chip NAND devices to the FSL-UPM driver. The "dev_ready" callback of the "struct fsl_upm_nand" is now called with the argument "chip_nr" to allow testing the proper chip select line. The NAND support of the MPC8360ERDK is updated as well. No other boards are currently using the FSL UPM driver. Signed-off-by: Wolfgang Grandegger <wg@grandegger.com> Signed-off-by: Scott Wood <scottwood@freescale.com>
* | | Enable multi chip support in the NAND layerWolfgang Grandegger2009-03-23-1/+7
|/ / | | | | | | | | | | | | | | | | | | This patch adds support for NAND_MAX_CHIPS to the MTD NAND layer. Multi-chips devices are displayed as shown: Device 0: 2x NAND 512MiB 3,3V 8-bit, sector size 128 KiB Signed-off-by: Wolfgang Grandegger <wg@grandegger.com> Signed-off-by: Scott Wood <scottwood@freescale.com>
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