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* Merge branch 'master' of git://git.denx.de/u-boot-netWolfgang Denk2009-11-11-28/+35
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| * mxc_fec: avoid free() calls to already freed pointers.javier Martin2009-11-11-5/+7
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Sometimes, inside NetLoop, eth_halt() is called before eth_init() has been called. This is harmless except for free() calls to pointers which have not been allocated yet. This patch initializes those pointers to NULL and allocates them only the first time. This way we can get rid of free calls in halt callback. This has been tested in i.MX27 Litekit board and eldk-4.2 toolchains. Signed-off-by: Javier Martin <javier.martin@vista-silicon.com> Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
| * mxc_fec: fix some erroneous PHY accesses.javier Martin2009-11-11-3/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch fixes erroneous access to the ethernet PHY which broke the driver. 1. Selector field in the auto-negotiation register must be 0x00001 for using 802.3, not 0x00000 which is reseved. 2. Access to the PHY address specified by CONFIG_FEC_MXC_PHYADDR, not 0x0 fixed address. This has been tested in i.MX27 Litekit board and eldk-4.2 toolchains. Now using proper defines for auto-negotiation register. Signed-off-by: Javier Martin <javier.martin@vista-silicon.com> Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
| * SMC91111: Clean up SMC_inx macros on xsengine and xaeniaxBen Warren2009-11-09-4/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch fixes the following warnings: Configuring for xaeniax board... smc91111_eeprom.c: In function 'print_macaddr': smc91111_eeprom.c:278: warning: suggest parentheses around + or - in operand of & smc91111_eeprom.c:281: warning: suggest parentheses around + or - in operand of & ... Configuring for xsengine board... smc91111_eeprom.c: In function 'print_macaddr': smc91111_eeprom.c:278: warning: suggest parentheses around + or - inside shift smc91111_eeprom.c:281: warning: suggest parentheses around + or - inside shift Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
| * Fix CS8900 regression on impa7 boardBen Warren2009-11-09-1/+1
| | | | | | | | | | | | | | | | | | | | The following error was seen on impa7 board, due to its use of a 32-bit bus on CS8900. cs8900.c:137:37: error: macro "get_reg_init_bus" passed 2 arguments, but takes just 1 This patch gives the macro the correct number of arguments Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
| * Fix cs8900 dev->priv not init issueHui.Tang2009-11-09-3/+4
| | | | | | | | | | | | | | Ensure all CS8900 data structures are assigned before accessing device Signed-off-by: Hui.Tang <zetalabs@gmail.com> Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
| * Fix DM9000 MAC address handlingBen Warren2009-10-29-12/+14
| | | | | | | | | | | | | | | | Proper behavior is to pull MAC address from NVRAM in the initialization() an stuff it in dev->address, then program the device from dev->address in the init() function. Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
* | fsl_pci_init_port end-point initialization is brokenEd Swarthout2009-11-04-1/+17
| | | | | | | | | | | | | | | | | | | | | | | | | | commit 70ed869e broke fsl pcie end-point initialization. Returning 0 is not correct. The function must return the first free bus number for the next controller. fsl_pci_init() must still be called and a bus allocated even if the controller is an end-point. Signed-off-by: Ed Swarthout <Ed.Swarthout@freescale.com> Acked-by: Vivek Mahajan <vivek.mahajan@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* | Revert "ppc/85xx/pci: fsl_pci_init: pcie agent mode support"Kumar Gala2009-11-04-16/+2
|/ | | | | | | | | | | This reverts commit 70ed869ea5f6b1d13d7b140c83ec0dcd8a127ddc. There isn't any need to modify the API for fsl_pci_init_port to pass the status of host/agent(end-point) status. We can determine that internally to fsl_pci_init_port. Revert the patch that makes the API change. Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* cfi: Add weak default function for flash_cmd_reset()Stefan Roese2009-10-28-133/+18
| | | | | | | | | | | | Currently the CFI driver issues both AMD and Intel reset commands. This is because the driver doesn't know yet which chips are connected. This dual reset seems to cause problems with the M29W128G chips as reported by Richard Retanubun. This patch now introduces a weak default function for the CFI reset command, still with both resets. This can be overridden by a board specific version if necessary. Signed-off-by: Stefan Roese <sr@denx.de> Cc: Richard Retanubun <RichardRetanubun@ruggedcom.com>
* Coding Style cleanup; update CHANGELOG, prepare -rc1v2009.11-rc1Wolfgang Denk2009-10-28-5/+5
| | | | Signed-off-by: Wolfgang Denk <wd@denx.de>
* drivers/net/phy/miiphybb.c: fix warning: no newline at end of fileWolfgang Denk2009-10-27-1/+1
| | | | | | | | Add missing newline. Signed-off-by: Wolfgang Denk <wd@denx.de> Cc: Luigi Mantellini <luigi.mantellini@idf-hit.com> Cc: Ben Warren <biggerbadderben@gmail.com>
* mpc85xx: Configure QE USB for MPC8569E-MDS boardsAnton Vorontsov2009-10-27-0/+2
| | | | | | | | Setup QE pin multiplexing for USB function, configure needed BCSRs and add some fdt fixups. Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* ppc/85xx/pci: fsl_pci_init: pcie agent mode supportVivek Mahajan2009-10-27-2/+16
| | | | | | | | | | | | | | | Originally written by Jason Jin and Mingkai Hu for mpc8536. When QorIQ based board is configured as a PCIe agent, then unlock/enable inbound PCI configuration cycles and init a 4K inbound memory window; so that a PCIe host can access the PCIe agents SDRAM at address 0x0 * Supported in fsl_pci_init_port() after adding pcie_ep as a param * Revamped copyright in drivers/pci/fsl_pci_init.c * Mods in 85xx based board specific pci init after this change Signed-off-by: Vivek Mahajan <vivek.mahajan@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* sf: add GPL-2 license infoMike Frysinger2009-10-24-0/+2
| | | | | | | Some of the new spi flash files were missing explicit license lines. Signed-off-by: Mike Frysinger <vapier@gentoo.org> CC: Haavard Skinnemoen <haavard.skinnemoen@atmel.com>
* Merge branch 'master-sync' of git://git.denx.de/u-boot-armWolfgang Denk2009-10-24-310/+1160
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| * ARM: OMAP3: Refactors the SM911x driverSteve Sakoman2009-10-24-6/+6
| | | | | | | | | | | | | | Move the test up in the function to not hang on systems without ethernet. Signed-off-by: Steve Sakoman <sakoman@gmail.com> Acked-by: Ben Warren <biggerbadderben@gmail.com>
| * s5pc1xx: SMDKC100: fix compile warningsMinkyu Kang2009-10-24-1/+1
| | | | | | | | | | | | | | fix the following compile warnings warning: dereferencing type-punned pointer will break strict-aliasing rules Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
| * Clean-up of s3c24x0 nand driverkevin.morfitt@fearnside-systems.co.uk2009-10-13-37/+25
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch re-formats the arm920t s3c24x0 nand driver in preparation for changes to add support for the Embest SBC2440-II Board. The changes are as follows: - re-indent the code using Lindent - make sure register layouts are defined using a C struct - replace the upper-case typedef'ed C struct names with lower case non-typedef'ed ones - make sure registers are accessed using the proper accessor functions - run checkpatch.pl and fix any error reports It assumes the following patch has been applied first: - [U-Boot][PATCH-ARM] CONFIG_SYS_HZ fix for ARM902T S3C24X0 Boards, 05/09/2009 - patches 1/4, 2/4 and 3/4 of this series Tested on an Embest SBC2440-II Board with local u-boot patches as I don't have any s3c2400 or s3c2410 boards but need this patch applying before I can submit patches for the SBC2440-II Board. Also, temporarily modified sbc2410x, smdk2400, smdk2410 and trab configs to use the mtd nand driver (which isn't used by any board at the moment), ran MAKEALL for all ARM9 targets and no new warnings or errors were found. Signed-off-by: Kevin Morfitt <kevin.morfitt@fearnside-systems.co.uk> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
| * Clean-up of s3c24x0 drivers excluding nand driverkevin.morfitt@fearnside-systems.co.uk2009-10-13-267/+296
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch re-formats the arm920t s3c24x0 driver files, excluding the nand driver, in preparation for changes to add support for the Embest SBC2440-II Board. The changes are as follows: - re-indent the code using Lindent - make sure register layouts are defined using a C struct - replace the upper-case typedef'ed C struct names with lower case non-typedef'ed ones - make sure registers are accessed using the proper accessor functions - run checkpatch.pl and fix any error reports It assumes the following patch has been applied first: - [U-Boot][PATCH-ARM] CONFIG_SYS_HZ fix for ARM902T S3C24X0 Boards, 05/09/2009 - patches 1/4 and 2/4 of this series Tested on an Embest SBC2440-II Board with local u-boot patches as I don't have any s3c2400 or s3c2410 boards but need this patch applying before I can submit patches for the SBC2440-II Board. Also, temporarily modified sbc2410x, smdk2400, smdk2410 and trab configs to use the mtd nand driver (which isn't used by any board at the moment), ran MAKEALL for all ARM9 targets and no new warnings or errors were found. Signed-off-by: Kevin Morfitt <kevin.morfitt@fearnside-systems.co.uk> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
| * s5pc1xx: support serial driverMinkyu Kang2009-10-13-0/+196
| | | | | | | | | | | | | | | | This patch includes the serial driver for s5pc1xx. s5pc1xx uart driver needs own register setting and clock configuration. So, need to special driver. Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
| * s5pc1xx: support onenand driverMinkyu Kang2009-10-13-0/+637
| | | | | | | | | | | | | | This patch includes the onenand driver for s5pc100 Signed-off-by: Minkyu Kang <mk7.kang@samsung.com> Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
* | smc911x: add support for LAN9220Daniel Mack2009-10-19-0/+2
|/ | | | | | Signed-off-by: Daniel Mack <daniel@caiaq.de> Cc: Sascha Hauer <s.hauer@pengutronix.de> Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
* SMC911X: Add chip auto detectionOlof Johansson2009-10-13-8/+13
| | | | | | | | | | Refactor the smc911x driver to allow for detecting when the chip is missing. I.e. the detect_chip() function is called earlier and will abort gracefully when the Chip ID read returns all 1's. Signed-off-by: Olof Johansson <olof@lixom.net> Acked-by: Dirk Behme <dirk.behme@googlemail.com> Acked-by: Ben Warren <biggerbadderben@gmail.com>
* OMAP3 MMC: Fix warning dereferencing type-punned pointerDirk Behme2009-10-13-27/+21
| | | | | | | | | Fix warning Dereferencing type-punned pointer will break strict-aliasing rules Signed-off-by: Dirk Behme <dirk.behme@googlemail.com> CC: Steve Sakoman <sakoman@gmail.com> Acked-by: Tom Rix <Tom.Rix@windriver.com>
* Merge branch 'master' of /home/wd/git/u-boot/custodiansWolfgang Denk2009-10-12-104/+242
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| * Rewrite the miiphybb (Bit-banged MII bus driver) in order to support an ↵Luigi 'Comio' Mantellini2009-10-10-104/+242
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | arbitrary number of mii buses. This feature is useful when your board uses different mii buses for different phys and all (or a part) of these buses are implemented via bit-banging mode. The driver requires that the following macros should be defined into the board configuration file: CONFIG_BITBANGMII - Enable the miiphybb driver CONFIG_BITBANGMII_MULTI - Enable the multi bus support If the CONFIG_BITBANGMII_MULTI is not defined, the board's config file needs to define at least the following macros: MII_INIT - Generic code to enable the MII bus (optional) MDIO_DECLARE - Declaration needed to access to the MDIO pin (optional) MDIO_ACTIVE - Activate the MDIO pin as out pin MDIO_TRISTATE - Activate the MDIO pin as input/tristate pin MDIO_READ - Read the MDIO pin MDIO(v) - Write v on the MDIO pin MDC_DECLARE - Declaration needed to access to the MDC pin (optional) MDC(v) - Write v on the MDC pin The previous macros make the driver compatible with the previous version (that didn't support the multi-bus). When the CONFIG_BITBANGMII_MULTI is also defined, the board code needs to fill the bb_miiphy_buses[] array with a record for each required bus and declare the bb_miiphy_buses_num variable with the number of mii buses. The record (struct bb_miiphy_bus) has the following fields/callbacks (see miiphy.h for details): char name[] - The symbolic name that must be equal to the MII bus registered name int (*init)() - Initialization function called at startup time (just before the Ethernet initialization) int (*mdio_active)() - Activate the MDIO pin as output int (*mdio_tristate)() - Activate the MDIO pin as input/tristate pin int (*set_mdio)() - Write the MDIO pin int (*get_mdio)() - Read the MDIO pin int (*set_mdc)() - Write the MDC pin int (*delay)() - Delay function void *priv - Private data used by board specific code The board code will look like: struct bb_miiphy_bus bb_miiphy_buses[] = { { .name = miibus#1, .init = b1_init, .mdio_active = b1_mdio_active, ... }, { .name = miibus#2, .init = b2_init, .mdio_active = b2_mdio_active, ... }, ... int bb_miiphy_buses_num = sizeof(bb_miiphy_buses) / sizeof(bb_miiphy_buses[0]); Signed-off-by: Luigi 'Comio' Mantellini <luigi.mantellini@idf-hit.com> Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
* | Leave x86emu op code tables in default sectionEd Swarthout2009-10-12-14/+8
|/ | | | | | | | Forcing the tables into got2 caused extra relocation when using -mrelocatable. This patch requires any board defining CONFIG_BIOSEMU to use -mrelocatable. Signed-off-by: Ed Swarthout <Ed.Swarthout@freescale.com> Acked-by: Jin Zhengxiong <Jason.Jin@freescale.com>
* Merge branch 'reloc'Wolfgang Denk2009-10-09-879/+7
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| * Conditionally perform common relocation fixupsPeter Tyser2009-10-03-0/+2
| | | | | | | | | | | | | | | | | | | | | | Add #ifdefs where necessary to not perform relocation fixups. This allows boards/architectures which support relocation to trim a decent chunk of code. Note that this patch doesn't add #ifdefs to architecture-specific code which does not support relocation. Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
| * fpga: Remove relocation fixupsPeter Tyser2009-10-03-830/+5
| | | | | | | | | | | | | | | | PPC boards are the only users of the current FPGA code which is littered with manual relocation fixups. Now that proper relocation is supported for PPC boards, remove FPGA manual relocation. Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
| * tsec: Remove PHY command relocation fixupsPeter Tyser2009-10-03-49/+0
| | | | | | | | Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
* | ppc_4xx: Apply new HW register namesNiklaus Giger2009-10-07-50/+50
| | | | | | | | | | | | | | | | Modify all existing *.c files to use the new register names as seen in the AMCC manuals. Signed-off-by: Niklaus Giger <niklaus.giger@member.fsf.org> Signed-off-by: Stefan Roese <sr@denx.de>
* | net: kirkwood_egiga.c: fixed build warningPrafulla Wadaskar2009-10-04-1/+3
| | | | | | | | | | | | | | | | if link up detection code is disabled through config option, it gives build warning. This patch fixes the same Signed-off-by: Prafulla Wadaskar <prafulla@marvell.com> Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
* | Convert SMC91111 Ethernet driver to CONFIG_NET_MULTI APIBen Warren2009-10-04-496/+309
| | | | | | | | | | | | | | | | | | | | | | | | | | | | All in-tree boards that use this controller have CONFIG_NET_MULTI added Also: - changed CONFIG_DRIVER_SMC91111 to CONFIG_SMC91111 - cleaned up line lengths - modified all boards that override weak function in this driver - modified all eeprom standalone apps to work with new driver - updated blackfin standalone EEPROM app after testing Signed-off-by: Ben Warren <biggerbadderben@gmail.com> Signed-off-by: Mike Frysinger <vapier@gentoo.org>
* | net: phy: mv88e61xx.c : fixed build warningPrafulla Wadaskar2009-10-04-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | following build warning was observed mv88e61xx.c: In function ‘mv88e61xx_busychk’: mv88e61xx.c:208: warning: dereferencing type-punned pointer will break strict-aliasing rules This patch fixes the same Patch tested for rd6281a board build Signed-off-by: Prafulla Wadaskar <prafulla@marvell.com> Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
* | net: Fix problem with 405EZ ethernet interruptJames Clough2009-10-04-0/+9
|/ | | | | | | | | | | | | On 405EZ the RX-/TX-interrupts are coalesced into one IRQ bit in the UIC. We need to acknowledge the RX-/TX-interrupts in the SDR0_ICINTSTAT reg as well. This problem was introduced with commit d1631fe1 [ppc4xx: Consolidate PPC4xx UIC defines] Signed-off-by: James Clough <james@rtetc.com> Signed-off-by: Stefan Roese <sr@denx.de> Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
* Merge branch 'master' of git://git.denx.de/u-boot-mpc85xxWolfgang Denk2009-09-30-0/+4
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| * ppc/85xx: get_law_entry isn't used in CONFIG_NAND_SPLKumar Gala2009-09-30-0/+4
| | | | | | | | | | | | | | Don't include get_law_entry as part of the NAND_SPL build since the code isnt used. Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* | Merge branch 'master' of git://git.denx.de/u-boot-nand-flashWolfgang Denk2009-09-30-2/+1
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| * | NAND: davinci: Fix warnings when 4-bit ECC not usedScott Wood2009-09-28-2/+1
| |/ | | | | | | | | | | | | | | | | I accidentally left v2 of "NAND: DaVinci:Adding 4 BIT ECC support" applied when I pushed the tree last merge window, and missed these fixes which were in v3 of that patch. Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com> Signed-off-by: Scott Wood <scottwood@freescale.com>
* | Merge branch 'master' of git://git.denx.de/u-boot-i2cWolfgang Denk2009-09-30-36/+69
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| * | fsl_i2c: Do not generate STOP after read.Joakim Tjernlund2009-09-28-5/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | __i2c_read always ends with a STOP condition thereby releasing the bus. It is cleaner to do the STOP magic in i2c_read(), like i2c_write() does. This may also help future multimaster systems which wants to hold on to the bus until all transactions are finished. Signed-off-by: Joakim Tjernlund <Joakim.Tjernlund@transmode.se>
| * | fsl_i2c: Impl. AN2919, rev 5 to calculate FDR/DFSRJoakim Tjernlund2009-09-28-35/+55
| | | | | | | | | | | | | | | | | | | | | | | | | | | The latest AN2919 has changed the way FDR/DFSR should be calculated. Update the driver according to spec. However, Condition 2 is not accounted for as it is not clear how to do so. Signed-off-by: Joakim Tjernlund <Joakim.Tjernlund@transmode.se> Acked-by: Wolfgang Grandegger <wg@grandegger.com>
| * | fsl_i2c: Add CONFIG_FSL_I2C_CUSTOM_{DFSR/FDR}Joakim Tjernlund2009-09-28-3/+11
| | | | | | | | | | | | | | | | | | | | | | | | | | | Some boards need a higher DFSR value than the spec currently recommends so give these boards the means to define there own. For completeness, add CONFIG_FSL_I2C_CUSTOM_FDR too. Signed-off-by: Joakim Tjernlund <Joakim.Tjernlund@transmode.se>
| * | fsl_i2c: Wait for STOP condition to propagateJoakim Tjernlund2009-09-28-4/+8
| |/ | | | | | | | | | | | | | | | | | | | | | | | | After issuing a STOP one must wait until the STOP has completed on the bus before doing something new to the controller. Also add an extra read of SR as the manual mentions doing that is a good idea. Remove surplus write of CR just before a write, isn't required and could potentially disturb the I2C bus. Signed-off-by: Joakim Tjernlund <Joakim.Tjernlund@transmode.se>
* | net: uec: Fix uccf.h and uec.h headers to include headers they depend onAnton Vorontsov2009-09-25-0/+4
| | | | | | | | | | | | | | | | Headers should include headers containing prototypes and defines they depend on, don't assume that they're included by somebody else. Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com> Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
* | net: uec_phy: Implement TXID and RXID RGMII modes for Marvell PHYsAnton Vorontsov2009-09-25-2/+14
|/ | | | | | | This will be needed for MPC8360E-MDS boards with rev. 2.1 CPUs. Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com> Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
* Merge branch 'master' of /home/wd/git/u-boot/custodiansWolfgang Denk2009-09-24-12/+118
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| * ppc/p4080: Add various p4080 related defines (and p4040)Kumar Gala2009-09-24-0/+2
| | | | | | | | | | | | | | | | | | | | | | There are various locations that we have chip specific info: * Makefile for which ddr code to build * Added p4080 & p4040 to cpu_type_list and SVR list * Added number of LAWs for p4080 * Set CONFIG_MAX_CPUS to 8 for p4080 Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
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