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* mtd: nand: mxs check maximum ecc that platfrom supportsPeng Fan2015-09-20-1/+8
| | | | | | | | | | | | Check maximum ecc strength for each platfrom to avoid the calculated ecc exceed the limitation. Signed-off-by: Peng Fan <Peng.Fan@freescale.com> Signed-off-by: Han Xu <b45815@freescale.com> Tested-By: Tim Harvey <tharvey at gateworks.com> Reviewed-by: Marek Vasut <marex@denx.de> Acked-by: Scott Wood <scottwood@freescale.com> Cc: Stefano Babic <sbabic@denx.de>
* imx: wdog: correct wcr register settingsPeng Fan2015-09-20-1/+2
| | | | | | | | | | | | | We should not simple use "writew(WCR_WDE, &wdog->wcr)" to set wcr, since this will override bits set before reset_cpu. Use clrsetbits_le16 instead of writew to fix this issue. Signed-off-by: Peng Fan <Peng.Fan@freescale.com> Cc: Stefano Babic <sbabic@denx.de> Cc: Fabio Estevam <fabio.estevam@freescale.com> Cc: Sebastian Siewior <bigeasy@linutronix.de> Tested-by: Fabio Estevam <fabio.estevam@freescale.com>
* net: designware: Add support to PCI designware devicesBin Meng2015-09-16-0/+42
| | | | | | | | The Designware ethernet controller is also seen on PCI bus, e.g. on Intel Quark SoC. Add this support in the DM version driver. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Acked-by: Simon Glass <sjg@chromium.org>
* dm: pci: Add an inline API to test if a device is on a PCI busBin Meng2015-09-16-2/+2
| | | | | | | | Introduce device_is_on_pci_bus() which can be utilized by driver to test if a device is on a PCI bus. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Acked-by: Simon Glass <sjg@chromium.org>
* Merge git://git.denx.de/u-boot-fdtTom Rini2015-09-16-1/+4
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| * fdt: add new fdt address parsing functionsStephen Warren2015-09-15-1/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | fdtdec_get_addr_size() hard-codes the number of cells used to represent an address or size in DT. This is incorrect in many cases depending on the DT binding for a particular node or property (e.g. it is incorrect for the "reg" property). In most cases, DT parsing code must use the properties #address-cells and #size-cells to parse addres properties. This change splits up the implementation of fdtdec_get_addr_size() so that the core logic can be used for both hard-coded and non-hard-coded cases. Various wrapper functions are implemented that support cases where hard-coded cell counts should or should not be used, and where the client does and doesn't know the parent node ID that contains the properties #address-cells and #size-cells. dev_get_addr() is updated to use the new functions. Core functionality in fdtdec_get_addr_size_fixed() is widely tested via fdtdec_get_addr_size(). I tested fdtdec_get_addr_size_auto_noparent() and dev_get_addr() by manually modifying the Tegra I2C driver to invoke them. Much of the core implementation of fdtdec_get_addr_size_fixed(), fdtdec_get_addr_size_auto_parent(), and fdtdec_get_addr_size_auto_noparent() comes from Thierry Reding's previous commit "fdt: Fix fdtdec_get_addr_size() for 64-bit". Based-on-work-by: Thierry Reding <treding@nvidia.com> Cc: Thierry Reding <treding@nvidia.com> Cc: Simon Glass <sjg@chromium.org> Cc: Michal Suchanek <hramrach@gmail.com> Signed-off-by: Stephen Warren <swarren@nvidia.com> Acked-by: Simon Glass <sjg@chromium.org> Dropped #define DEBUG at the top of fdtdec.c: Signed-off-by: Simon Glass <sjg@chromium.org>
* | arm: Remove unused ST-Ericsson u8500 archStefan Roese2015-09-15-803/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This arch does not seem to be supported / used at all in the current U-Boot mainline source tree any more. So lets remove the core u8500 code and code that was only referenced by this platform. Please note that this patch also removes these config options: - CONFIG_PL011_SERIAL_RLCR - CONFIG_PL011_SERIAL_FLUSH_ON_INIT As they only seem to be referenced by u8500 based boards. Without any such board in the current code, these config option don't make sense any more. Lets remove them as well. If someone still wants to use this platform, then please send patches to re-enable support by adding at least one board that references this code. Signed-off-by: Stefan Roese <sr@denx.de> Cc: Mathieu Poirier <mathieu.poirier@linaro.org> Cc: John Rigby <john.rigby@linaro.org> Cc: Simon Glass <sjg@chromium.org> Cc: Masahiro Yamada <yamada.masahiro@socionext.com> Cc: Tom Rini <trini@konsulko.com> Cc: Heiko Schocher <hs@denx.de> Cc: Albert Aribaud <albert.u.boot@aribaud.net> Reviewed-by: Masahiro Yamada <yamada.masahiro@socionext.com>
* | mtd: nand: fsmc: Fixes and cleanup for fsmc_nand_switch_ecc()Stefan Roese2015-09-15-6/+15
|/ | | | | | | | | | | | | | | | | | | This patch addresses some comments raised by Scott in the last versions. Here the changes in detail: - Removed __maybe_unused as its not needed - Added check for strength == 4 and error out for the unsupported ECC strength values - Don't set .caclulate, .correct, and .bytes for NAND_ECC_SOFT_BCH as this will be done in nand_scan_tail() - Set .caclulate back to fsmc_read_hwecc() in the HW case - Added comment that this function will only be called on SPEAr platforms, not supporting the BCH8 HW ECC (FSMC_VER8) Signed-off-by: Stefan Roese <sr@denx.de> Cc: Scott Wood <scottwood@freescale.com> Cc: Tom Rini <trini@konsulko.com> Acked-by: Scott Wood <scottwood@freescale.com>
* Merge branch 'rmobile' of git://git.denx.de/u-boot-shTom Rini2015-09-13-10/+36
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| * serial: serial-sh: SCIFA interface for R-Car Gen2 SoCsVladimir Barinov2015-08-31-9/+34
| | | | | | | | | | | | | | | | | | Add SCIFA console interface for R-Car Gen2 SoCs. SCIFA has different registers offsets and sizes then SCI. Hence it needs to put it's macro definitions separately. Signed-off-by: Vladimir Barinov <vladimir.barinov@cogentembedded.com> Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
| * gpio: sh-pfc: fix gpio input readVladimir Barinov2015-08-31-1/+2
| | | | | | | | | | | | | | | | Fix gpio_read: gpio input (INDT) and gpio output (OUTDT) registers have different offset. gpio_read must be performed from INDT. Signed-off-by: Vladimir Barinov <vladimir.barinov@cogentembedded.com> Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
* | pcie_imx: Use 'ms' for millisecondsFabio Estevam2015-09-13-3/+3
| | | | | | | | | | | | | | milliseconds should be written as 'ms' instead of 'mS'. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> Tested-by: Marek Vasut <marex@denx.de>
* | thermal: imx_thermal: Do not print on errorFabio Estevam2015-09-13-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | It is not very useful to have the message below on every boot (especially when we are using early silicon): U-Boot 2015.10-rc2-23945-g37cf215 (Sep 08 2015 - 14:12:14 -0300) CPU: Freescale i.MX6UL rev1.0 792 MHz (running at 396 MHz) CPU: Commercial temperature grade (0C to 95C)CPU: Thermal invalid data, fuse: 0x0 - invalid sensor device , so turn the error message into debug level. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
* | imx: imx7d: add imx-common cpu support for imx7dAdrian Alonso2015-09-13-1/+1
| | | | | | | | | | | | | | | | | | Add imx-common cpu support for imx7d SoC - Update reset_cause for imx7d - Enable watchdog driver built for imx7d Signed-off-by: Adrian Alonso <aalonso@freescale.com> Signed-off-by: Peng Fan <Peng.Fan@freescale.com>
* | thermal: imx: add imx7d soc thermal supportAdrian Alonso2015-09-13-6/+84
| | | | | | | | | | | | Add imx7 SoC thermal driver support Signed-off-by: Adrian Alonso <aalonso@freescale.com>
* | thermal: imx_thermal: rework driver to be reusedAdrian Alonso2015-09-13-8/+12
| | | | | | | | | | | | | | | | Rework imx_thermal driver to be used across i.MX processor that support thermal sensor Signed-off-by: Adrian Alonso <aalonso@freescale.com> Signed-off-by: Peng Fan <Peng.Fan@freescale.com>
* | usb: ci_udc: fix emissions of ZLPsStephen Warren2015-09-12-10/+8
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Commit 6a132416359e "ci_udc: Update the ci_udc driver to support bulk transfers" caused the value of "len" to change without updating subsquent users of that variable in ci_ep_submit_next_request(). This caused the code that detects when to emit ZLPs (Zero Length Packets) never to trigger, which in turn caused host timeouts when a ZLP was required, which in turn broke tests/dfu/, even despite the assertion in that commit's description that "These changes are tested for both the DFU and lthor." Fix this by modifying the added dtd iteration code not to modify "len", but rather to keep state in a separate variable. Rename the variables while we're at it so they describe their purpose better. Fixes: 6a132416359e ("ci_udc: Update the ci_udc driver to support bulk transfers") Cc: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com> Signed-off-by: Stephen Warren <swarren@nvidia.com>
* | usb: gadget: ci_udc: implement usb_ep_ops dequeue callbackPeng Fan2015-09-12-0/+26
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Implement endpoint dequeue callback function. Without this function, uboot will hang when executing fastboot comamnd. See following flow: "fastboot_tx_write_str->fastboot_tx_write->usb_ep_dequeue->ep->ops->dequeue" without implement ci_udc dequeue function, ep->ops->dequeue is NULL, then uboot will hang. Tested on mx6qsabresd board with fastboot enabled. Signed-off-by: Peng Fan <Peng.Fan@freescale.com> Tested-by: Fabio Estevam <fabio.estevam@freescale.com> Cc: "Łukasz Majewski" <l.majewski@samsung.com> Cc: Marek Vasut <marex@denx.de>
* | gpio: lpc32xx: fix issues with port3 gpioSylvain Lemieux2015-09-11-6/+35
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The current simplify lpc32xx gpio driver implementation assume a maximum of 32 GPIO per port; there are a total of 22 GPI, 24 GPO and 6 GPIO to managed on port 3. Update the driver to fix the following: 1) When requesting GPI_xx and GPO_xx on port 3 (xx is the same number) the second call to "gpio_request" will return -EBUSY. 2) The status of GPO_xx pin report the status of the corresponding GPI_xx pin when using the "gpio status" command. 3) The gpio driver may setup the direction register for the wrong gpio when calling "gpio_direction_input" (GPI_xx) or "gpio_direction_output" (GPO_xx) on port 3; the call to the direction is require to use the "gpio status" command. The following change were done in the driver: 1) port3 GPI are cache in a separate 32 bits in the array. 2) port3 direction register written only for GPIO pins. 3) port3 GPO & GPIO (as output) are read using "p3_outp_state". 4) LPC32XX_GPI_P3_GRP updated to match the change. Signed-off-by: Sylvain Lemieux <slemieux@tycoint.com>
* | bitops: introduce BIT() definitionHeiko Schocher2015-09-11-9/+0
| | | | | | | | | | | | | | | | | | | | | | introduce BIT() definition, used in at91_udc gadget driver. Signed-off-by: Heiko Schocher <hs@denx.de> [remove all other occurrences of BIT(x) definition] Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com> Acked-by: Stefan Roese <sr@denx.de> Acked-by: Anatolij Gustschin <agust@denx.de>
* | dfu: mmc: buffer file reads tooStephen Warren2015-09-11-12/+26
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | When writing to files in a filesystem on MMC, dfu_mmc.c buffers up the entire file content until the end of the transaction, at which point the file is written in one go. This allows writing files larger than the USB transfer size (CONFIG_SYS_DFU_DATA_BUF_SIZE); the maximum written file size is CONFIG_SYS_DFU_MAX_FILE_SIZE (the size of the temporary buffer). The current file reading code does not do any buffering, and so limits the maximum read file size to the USB transfer size. Enhance the code to do the same kind of buffering as the write path, so the same file size limits apply. Remove the size checking code from dfu_read() since all read paths now support larger files than the USB transfer buffer. Signed-off-by: Stephen Warren <swarren@nvidia.com> Acked-by: Lukasz Majewski <l.majewski@samsung.com> Tested-by: Lukasz Majewski <l.majewski@samsung.com>
* | dfu: don't keep freeing/reallocatingStephen Warren2015-09-11-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | DFU currently allocates buffer memory at the start of each data transfer operation and frees it at the end. Especially since memalign() is used to allocate the buffer, and various other allocations happen during the transfer, this can expose the code to heap fragmentation, which prevents the allocation from succeeding on subsequent transfers. Fix the code to allocate the buffer once when DFU mode is initialized, and free the buffer once when DFU mode is exited, to reduce the exposure to heap fragmentation. The failure mode is: // Internally to memalign(), this allocates a lot more than s to guarantee // that alignment can occur, then returns chunks of memory at the start/ // end of the allocated buffer to the heap. p = memalign(a, s); // Various other malloc()s occur here, some of which allocate the RAM // immediately before/after "p". // // DFU transfer is complete, so buffer is released. free(p); // By chance, no other malloc()/free() here, in DFU at least. // // A new DFU transfer starts, so the buffer is allocated again. // In theory this should succeed since we just free()d a buffer of the // same size. However, this fails because memalign() internally attempts // to allocate much more than "s", yet free(p) above only free()d a // little more than "s". p = memalign(a, s); Signed-off-by: Stephen Warren <swarren@nvidia.com> Acked-by: Lukasz Majewski <l.majewski@samsung.com> Tested-by: Lukasz Majewski <l.majewski@samsung.com>
* | usb: gadget: don't leak configs when unbindingStephen Warren2015-09-11-2/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | By the time g_dnl_unbind() is run, cdev->config has been set to NULL, so the free() there does nothing, and the config struct is leaked. Equally, struct usb_gadget contains a linked list of config structs, so the code should iterate over them all and free each one, rather than freeing one particular config struct. composite_unbind() already iterates over the list of config structs, and unlinks each from the linked list. Fix this loop to free() each struct as it's unlinked and otherwise forgotten. Signed-off-by: Stephen Warren <swarren@nvidia.com> Acked-by: Lukasz Majewski <l.majewski@samsung.com> Tested-by: Lukasz Majewski <l.majewski@samsung.com>
* | Move ALLOC_CACHE_ALIGN_BUFFER() to the new memalign.h headerSimon Glass2015-09-11-0/+20
| | | | | | | | | | | | | | Now that we have a new header file for cache-aligned allocation, we should move the stack-based allocation macro there also. Signed-off-by: Simon Glass <sjg@chromium.org>
* | Move malloc_cache_aligned() to its own headerSimon Glass2015-09-11-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | At present malloc.h is included everywhere since it recently was added to common.h in this commit: 4519668 mtd/nand/ubi: assortment of alignment fixes This seems wasteful and unnecessary. We have been trying to trim down common.h and put separate functions into separate header files and that change goes in the opposite direction. Move malloc_cache_aligned() to a new header so that this can be avoided. The header would perhaps be better named as alignmem.h but it needs to be included after common.h and people might be confused by this. With the name memalign.h it fits nicely after malloc() in most cases. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
* | mtd: nand: fsmc: Add BCH4 SW ECC support for SPEAr600Stefan Roese2015-09-11-0/+40
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch adds support for 4-bit ECC BCH4 for the SPEAr600 SoC. This can be used by boards equipped with a NAND chip that requires 4-bit ECC strength. The SPEAr600 HW ECC only supports 1-bit ECC strength. To enable SW BCH4, you need to specify this in your config header: #define CONFIG_NAND_ECC_BCH #define CONFIG_BCH And use the command "nandecc bch4" to select this ECC scheme upon runtime. Tested on SPEAr600 x600 board. Signed-off-by: Stefan Roese <sr@denx.de> Cc: Scott Wood <scottwood@freescale.com> Acked-by: Viresh Kumar <viresh.kumar@linaro.org>
* | arm: Remove xaeniax boardSimon Glass2015-09-11-72/+1
| | | | | | | | | | | | | | This board has not been converted to generic board by the deadline. Remove it. Signed-off-by: Simon Glass <sjg@chromium.org>
* | arm: Remove nhk8815 boards and nomadik archSimon Glass2015-09-11-207/+0
| | | | | | | | | | | | | | These boards have not been converted to generic board by the deadline. Remove them. Signed-off-by: Simon Glass <sjg@chromium.org>
* | driver: misc: correct Kconfig entryPeng Fan2015-09-11-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | Should use FSL_SEC_MON, not CONFIG_FSL_SEC_MON as Kconfig entry. Signed-off-by: Peng Fan <Peng.Fan@freescale.com> Cc: Simon Glass <sjg@chromium.org> Cc: Masahiro Yamada <yamada.m@jp.panasonic.com> Cc: Fabio Estevam <fabio.estevam@freescale.com> Cc: York Sun <yorksun@freescale.com> Cc: Stefan Roese <sr@denx.de> Cc: Tom Rini <trini@konsulko.com> Acked-by: Simon Glass <sjg@chromium.org>
* | Merge branch 'master' of http://git.denx.de/u-boot-sunxiTom Rini2015-09-11-0/+1
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| * | sunxi_nand_spl: Add config parameter for 4KiB page sized NAND devicesStefan Roese2015-09-10-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch adds support for NAND chips with 4KiB page size and 24/1024 ECC strength. Like the Micron MT29F32G08CBACAWP which is used on the ICnova-A20 SoM. Signed-off-by: Stefan Roese <sr@denx.de> Acked-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Hans de Goede <hdegoede@redhat.com>
* | | usb: gadget: at91_udc: add at91_udc into U-BootHeiko Schocher2015-09-11-517/+103
| | | | | | | | | | | | | | | | | | | | | add U-Boot specific changes to the at91_udc linux driver, so it works with U-Boot. Signed-off-by: Heiko Schocher <hs@denx.de>
* | | usb: gadget: at91_udc: port linux driver at91_udcHeiko Schocher2015-09-11-0/+2211
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | port at91_udc driver from linux: original commit Message: commit c94e289f195e0e13cf34d27f9338d28221a85751 Author: Arnd Bergmann <arnd@arndb.de> Date: Sat Apr 11 00:14:21 2015 +0200 usb: gadget: remove incorrect __init/__exit annotations A recent change introduced a link error for the composite printer gadget driver: `printer_unbind' referenced in section `.ref.data' of drivers/built-in.o: defined in discarded section `.exit.text' of drivers/built-in.o Evidently the unbind function should not be marked __exit here, because it is called through a callback pointer that is not necessarily discarded, __composite_unbind() is indeed called from the error path of composite_bind(), which can never work for a built-in driver. Looking at the surrounding code, I found the same problem in all other composite gadget drivers in both the bind and unbind functions, as well as the udc platform driver 'remove' functions. Those will break if anyone uses the 'unbind' sysfs attribute to detach a device from a built-in driver. This patch removes the incorrect annotations from all the gadget drivers. Signed-off-by: Heiko Schocher <hs@denx.de>
* | | net: designware: Fix build warningsBin Meng2015-09-09-4/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | When building dm version of designware eth driver on a platform with 64-bit phys_addr_t, it reports the following warnings: drivers/net/designware.c: In function 'designware_eth_probe': drivers/net/designware.c:599:2: warning: format '%lx' expects argument of type 'long unsigned int', but argument 3 has type 'phys_addr_t' [-Wformat] drivers/net/designware.c:600:21: warning: cast to pointer from integer of different size [-Wint-to-pointer-cast] drivers/net/designware.c:601:21: warning: cast to pointer from integer of different size [-Wint-to-pointer-cast] This commit fixes the build warnings. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
* | | dm: pci: Allow a PCI bus to be found without an aliasSimon Glass2015-09-09-4/+24
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | At present, until a PCI bus is probed, it cannot be found by its sequence number unless it has an alias. This is the same with any device. However with PCI this is more annoying than usual, since bus 0 is always the same device. Add a function that tries a little harder to locate PCI bus 0. This means that PCI enumeration will happen automatically on the first access. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
* | | net: pch_gbe: Add Kconfig optionBin Meng2015-09-09-0/+13
| | | | | | | | | | | | | | | | | | Add Kconfig option in preparation for moving board to use Kconfig. Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
* | | net: pch_gbe: Convert to driver modelBin Meng2015-09-09-62/+73
|/ / | | | | | | | | | | | | | | | | | | | | This commit converts pch_gbe ethernet driver to driver model. Since this driver is only used by Intel Crown Bay board, the conversion does not keep the non-dm version. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com> Acked-by: Simon Glass <sjg@chromium.org>
* | Merge git://git.denx.de/u-boot-usbTom Rini2015-09-07-3/+132
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| * | usb: ehci: remember init modeStephen Warren2015-09-07-1/+7
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | When an EHCI device is registered in device mode, the HW isn't actually initialized at all, and hence isn't left in a running state. Consequently, when the device is deregistered, ehci_shutdown() will fail, since the HW bits it expects to see set in response to its shutdown requests will not be sent, and the message "EHCI failed to shut down host controller." will be printed. Fix ehci-hcd.c to remember whether the device was registered in host or device mode, and only call ehci_shutdown() for host mode registrations. Signed-off-by: Stephen Warren <swarren@nvidia.com>
| * | dfu: tftp: Kconfig: Add Kconfig entry for dfu tftp featureLukasz Majewski2015-09-07-0/+10
| | | | | | | | | | | | | | | | | | | | | | | | The dfu tftp feature can be now enabled via Kconfig. This commit provides necessary code for it. Signed-off-by: Lukasz Majewski <l.majewski@majess.pl> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
| * | dfu: tftp: update: Add dfu_write_from_mem_addr() functionLukasz Majewski2015-09-07-0/+37
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This function allows writing via DFU data stored from fixed buffer address (like e.g. loadaddr env variable). Such predefined buffers are used in the update_tftp() code. In fact this function is a wrapper on the dfu_write() and dfu_flush(). Signed-off-by: Lukasz Majewski <l.majewski@majess.pl> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
| * | dfu: tftp: update: Provide tftp support for the DFU subsystemLukasz Majewski2015-09-07-0/+66
| | | | | | | | | | | | | | | | | | | | | | | | This commit adds initial support for using tftp for downloading and upgrading firmware on the device. Signed-off-by: Lukasz Majewski <l.majewski@majess.pl> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
| * | dfu: Delete superfluous initialization of the dfu_buf_size static variableLukasz Majewski2015-09-07-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | After extension of the dfu_get_buf() to also setup (implicitly) the dfu_buf_size variable it is not needed to set dfu_buf_size to CONFIG_SYS_DFU_DATA_BUF_SIZE. This variable is set in the dfu_get_buf() by not only considering CONFIG_SYS_DFU_DATA_BUF but more importantly the "dfu_bufsiz" env variable. Therefore, dfu_get_buf() should be used for initialization. Signed-off-by: Lukasz Majewski <l.majewski@majess.pl> Reviewed-by: Przemyslaw Marczak <p.marczak@samsung.com>
| * | usb: gadget: f_thor: Allocate request up to THOR_PACKET_SIZESiva Durga Prasad Paladugu2015-09-07-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Allocate request up to THOR_PACKET_SIZE not the ep0->maxpacket as the descriptors data depend on the number of descriptors and this 64 bytes were not enough and the buffer might overflow which results in memalign failures later. Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
| * | f_thor: Dont perform reset at the end of thorSiva Durga Prasad Paladugu2015-09-07-0/+10
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Dont perform reset at the end of thor download if configured to do reset off. Reset may not be required in all cases and hence provided an option to do so. The case would be to download the images to DDR instead of flash device. Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
* | | net: altera_tse: Zap unused variableMarek Vasut2015-09-04-2/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | Zap variable which is set but never used. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Dinh Nguyen <dinguyen@opensource.altera.com> Cc: Joe Hershberger <joe.hershberger@ni.com> Tested-by: Thomas Chou <thomas@wytron.com.tw>
* | | mmc: dw_mmc: Probe the MMC from OFMarek Vasut2015-09-04-13/+68
|/ / | | | | | | | | | | | | | | | | | | | | | | | | Rework the driver to probe the MMC controller from Device Tree and make it mandatory. There is no longer support for probing from the ancient qts-generated header files. This patch now also removes previous temporary workaround. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Dinh Nguyen <dinguyen@opensource.altera.com> Cc: Pantelis Antoniou <panto@antoniou-consulting.com> Cc: Tom Rini <trini@konsulko.com>
* | Merge git://git.denx.de/u-boot-rockchipTom Rini2015-09-03-22/+2650
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| * | mmc: Probe DM based mmc devices in u-bootSjoerd Simons2015-09-02-4/+39
| | | | | | | | | | | | | | | | | | | | | | | | | | | During mmc initialize probe all devices with the MMC Uclass if build with CONFIG_DM_MMC Signed-off-by: Sjoerd Simons <sjoerd.simons@collabora.co.uk> Acked-by: Simon Glass <sjg@chromium.org> Signed-off-by: Simon Glass <sjg@chromium.org>
| * | rockchip: Add SPI driverSimon Glass2015-09-02-0/+507
| | | | | | | | | | | | | | | | | | | | | Add a SPI driver for the Rockchip RK3288, using driver model. It should work for other Rockchip SoCs also. Signed-off-by: Simon Glass <sjg@chromium.org>
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