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* spi: fsl_qspi: fix an error of using GENMASKGong Qianyu2016-01-07-1/+1
| | | | | | | | | This commit fixes the change of below commit "spi: fsl_qspi: Use GENMASK" (sha1 :bad490a24212c068c5b718b9189f47ea4075d078) Signed-off-by: Gong Qianyu <Qianyu.Gong@freescale.com> Reviewed-by: Jagan Teki <jteki@openedev.com>
* spi: spi_flash: Fix the arguments of stm_is_locked_sr()Fabio Estevam2016-01-07-2/+2
| | | | | | | | | | | stm_is_locked_sr() takes the status register (SR) value as the last parameter, not the second. Based on a patch from Brian Norris for the linux kernel: http://git.infradead.org/linux-mtd.git/commit/a32d5b726ff8cf32bf491522b0ac8ae2545a063e Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com> Reviewed-by: Jagan Teki <jteki@openedev.com>
* net: designware: Zap trailing backslashMarek Vasut2015-12-22-7/+7
| | | | | | | | | Trailing backslashes are necessary only in macros, not in the actual code, so remove them. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Dinh Nguyen <dinguyen@opensource.altera.com> Cc: Joe Hershberger <joe.hershberger@ni.com>
* net: eth_designware: select PHYLIB in KconfigThomas Chou2015-12-22-4/+1
| | | | | | | | | | | | | | | Select PHYLIB in drivers/net/Kconfig. And remove CONFIG_PHYLIB from legacy board header files. This fixed the warnings when both ALTERA_TSE and ETH_DESIGNWARE are selected. Signed-off-by: Thomas Chou <thomas@wytron.com.tw> Reported-by: Pavel Machek <pavel@denx.de> Acked-by: Chin Liang See <clsee@altera.com> Acked-by: Pavel Machek <pavel@denx.de> Tested-by: Pavel Machek <pavel@denx.de> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
* Merge branch 'master' of git://www.denx.de/git/u-boot-socfpgaTom Rini2015-12-19-3/+148
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| * arm: socfpga: fix up a questionable macro for SDMMCDinh Nguyen2015-12-20-2/+3
| | | | | | | | | | | | | | | | Move the macro into the socfpga_dwmci_clksel(). Signed-off-by: Dinh Nguyen <dinguyen@opensource.altera.com> Signed-off-by: Marek Vasut <marex@denx.de> [fix parenthesis in the sdmmc_mask]
| * net: phy: micrel: Configure KSZ9021/KSZ9031 skew from OFMarek Vasut2015-12-20-1/+145
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add code to process the KSZ9021/KSZ9031 OF props if they are present and configure skew registers based on the information from the OF. This code is only enabled if the DM support for ethernet is also enabled. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Joe Hershberger <joe.hershberger@ni.com> Cc: Chin Liang See <clsee@altera.com> Cc: Dinh Nguyen <dinguyen@opensource.altera.com> V2: - Implement struct ksz90x1_reg_field to describe the skew register fields more accurately. - Fix RXDV/TXEN skew register default value and offset.
* | altera_qspi: initialize instr.mtd in flash_eraseThomas Chou2015-12-19-0/+1
|/ | | | | | | | Initialize instr.mtd in flash_erase(). This fixes the system hang issue when CONFIG_MTD_PARTITIONS is selected. Signed-off-by: Thomas Chou <thomas@wytron.com.tw> Acked-by: Marek Vasut <marex@denx.de>
* Merge branch 'master' of git://www.denx.de/git/u-boot-microblazeTom Rini2015-12-18-27/+46
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| * net: gem: Add driver dependencies to PHYLIBMichal Simek2015-12-18-4/+1
| | | | | | | | | | | | | | Clear driver dependecies via Kconfig. Remove PHYLIB dependency from the driver. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
| * net: gem: Fix typo in Kconfig entryMichal Simek2015-12-18-1/+1
| | | | | | | | | | Signed-off-by: Michal Simek <michal.simek@xilinx.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
| * net: gem: Separate recv and free_pkt functionsMichal Simek2015-12-18-20/+32
| | | | | | | | | | | | | | | | Use core to call net_process_received_packet() instead of call inside the driver. Signed-off-by: Michal Simek <michal.simek@xilinx.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
| * net: gem: Fix return value from recvMichal Simek2015-12-18-1/+1
| | | | | | | | | | | | | | | | recv function should return 0 instead of frame_len not to proceed the same packet again in core. Signed-off-by: Michal Simek <michal.simek@xilinx.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
| * net: gem: Setup default phy address to -1Michal Simek2015-12-18-1/+2
| | | | | | | | | | | | | | Undefined phy address is -1 not 0. Signed-off-by: Michal Simek <michal.simek@xilinx.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
| * spi: zynq_qspi: Add configuration to disable LQSPI featureNathan Rossi2015-12-18-0/+9
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | When the Zynq Boot ROM code loads the payload from QSPI it uses the LQSPI feature of the QSPI device, however it does not clean up its configuration before handing over to the payload which leaves the device confgured to by-pass the standard non-linear operating mode. This ensures the Linear QSPI mode is disabled before re-enabling the device. Signed-off-by: Nathan Rossi <nathan@nathanrossi.com> Cc: Jagan Teki <jteki@openedev.com> Cc: Siva Durga Prasad Paladugu <sivadur@xilinx.com> Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
* | Merge branch 'master' of git://git.denx.de/u-boot-usbTom Rini2015-12-17-236/+390
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| * usb: add support of generic OHCI devicesAlexey Brodkin2015-12-17-0/+54
| | | | | | | | | | | | | | | | | | | | | | This driver is meant to be used with any OHCI-compatible host controller in case if there's no need for platform-specific glue such as setup of controller or PHY's power mode via GPIOs etc. Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com> Cc: Simon Glass <sjg@chromium.org> Cc: Marek Vasut <marex@denx.de>
| * usb: host: ehci: samsung: Move hcor initialization after usb phy setupLukasz Majewski2015-12-17-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | With the old order of initialization the hcor pointer has been setup to the same address as Exynos EHCI base address (0x12110000 instead of 0x12110010). Such behaviour was caused by reading value of 0 instead of 0x10 from EHCI HCCPBASE register without doing proper clock initialization before. To fix this problem hcor initialization has been moved after USB PHY setup. Now ehci_readl(&ctx->hcd->cr_capbase) returns correct value. Signed-off-by: Lukasz Majewski <l.majewski@samsung.com>
| * usb: s3c-otg: Rename usb/s3c_udc.h to usb/dwc2_udc.hMarek Vasut2015-12-17-3/+3
| | | | | | | | | | | | | | | | | | | | | | The driver is actually for the Designware DWC2 controller. This patch renames the global s3c_udc.h header to dwc2_udc.h. The rename is done automatically: $ sed -i "s/s3c_udc\.h/dwc2_udc.h/g" \ `git grep "s3c_udc\.h" | cut -d : -f 1` Signed-off-by: Marek Vasut <marex@denx.de>
| * usb: s3c-otg: Rename s3c_udc_probe() functionMarek Vasut2015-12-17-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | The driver is actually for the Designware DWC2 controller. This patch is the second and final to rename global symbol, the s3c_udc_probe() function. The rename is done automatically: $ sed -i "s/s3c_udc_probe/dwc2_udc_probe/g" \ `git grep s3c_udc_probe | cut -d : -f 1` Signed-off-by: Marek Vasut <marex@denx.de>
| * usb: s3c-otg: Rename struct s3c_plat_otg_dataMarek Vasut2015-12-17-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | The driver is actually for the Designware DWC2 controller. This patch is the first to rename global symbol, the struct s3c_plat_otg_data. The rename is done automatically: $ sed -i "s/s3c_plat_otg_data/dwc2_plat_otg_data/g" \ `git grep s3c_plat_otg_data | cut -d : -f 1` Signed-off-by: Marek Vasut <marex@denx.de>
| * usb: s3c-otg: Rename USB_GADGET_S3C_UDC_OTG* to USB_GADGET_DWC2_OTG*Marek Vasut2015-12-17-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | The s3c-otg IP block is in fact a DWC2 OTG one, so finally rename the config option to make it less misleading. No functional change, just a mechanical change done using the following script: git grep USB_GADGET_S3C_UDC_OTG | cut -d : -f 1 | sort -u | \ while read line ; do sed -i "s/USB_GADGET_S3C_UDC_OTG/USB_GADGET_DWC2_OTG/g" $line ; done Signed-off-by: Marek Vasut <marex@denx.de>
| * usb: s3c-otg: Tweak the commentsMarek Vasut2015-12-17-4/+4
| | | | | | | | | | | | | | The driver is actually for the Designware DWC2 controller. Tweak the comments in the driver to reflect this fact. Signed-off-by: Marek Vasut <marex@denx.de>
| * usb: s3c-otg: Rename remaining macrosMarek Vasut2015-12-17-22/+22
| | | | | | | | | | | | | | | | The driver is actually for the Designware DWC2 controller. This patch renames the remaining S3C_* macros to match the DWC2 naming. Signed-off-by: Marek Vasut <marex@denx.de>
| * usb: s3c-otg: Rename sources to dwc2_*cMarek Vasut2015-12-17-6/+6
| | | | | | | | | | | | | | | | The driver is actually for the Designware DWC2 controller. This patch renames the local source files to dwc2_*c and adjusts the Makefile to use the new names. Signed-off-by: Marek Vasut <marex@denx.de>
| * usb: s3c-otg: Rename local headers to dwc2_*hMarek Vasut2015-12-17-8/+8
| | | | | | | | | | | | | | | | The driver is actually for the Designware DWC2 controller. This patch renames the local header files to dwc2_*h and adjusts the sources to use the new names. Signed-off-by: Marek Vasut <marex@denx.de>
| * usb: s3c-otg: Change the driver name to dwc2-udcMarek Vasut2015-12-17-3/+3
| | | | | | | | | | | | Just change the driver name. Signed-off-by: Marek Vasut <marex@denx.de>
| * usb: s3c-otg: Zap useless externsMarek Vasut2015-12-17-4/+2
| | | | | | | | | | | | | | The extern statements are useless, remove them. Also remove the extern ... controller, which is completely useless. Signed-off-by: Marek Vasut <marex@denx.de>
| * usb: s3c-otg: Rename remaining local s3c_*() functionsMarek Vasut2015-12-17-23/+23
| | | | | | | | | | | | | | | | The driver is actually for the Designware DWC2 controller. This patch renames the remaining local s3c_*() functions to reflect this. Signed-off-by: Marek Vasut <marex@denx.de>
| * usb: s3c-otg: Rename s3c_udc_*() functionsMarek Vasut2015-12-17-47/+47
| | | | | | | | | | | | | | | | | | The driver is actually for the Designware DWC2 controller. This patch renames the s3c_ep_*() functions to reflect this. The function s3c_udc_probe() is a special case and is not renamed by this patch yet. Signed-off-by: Marek Vasut <marex@denx.de>
| * usb: s3c-otg: Rename s3c_ep_*() functionsMarek Vasut2015-12-17-11/+11
| | | | | | | | | | | | | | The driver is actually for the Designware DWC2 controller. This patch renames the s3c_ep_*() functions to reflect this. Signed-off-by: Marek Vasut <marex@denx.de>
| * usb: s3c-otg: Rename s3c_ep0_*() functionsMarek Vasut2015-12-17-14/+14
| | | | | | | | | | | | | | The driver is actually for the Designware DWC2 controller. This patch renames the s3c_ep0_*() functions to reflect this. Signed-off-by: Marek Vasut <marex@denx.de>
| * usb: s3c-otg: Staticize functions in s3c_udc_otg_xfer_dma.cMarek Vasut2015-12-17-7/+7
| | | | | | | | | | | | Just staticize the functions, they are not used outside of the file. Signed-off-by: Marek Vasut <marex@denx.de>
| * usb: s3c-otg: Staticize s3c_udc_ep_set_stallMarek Vasut2015-12-17-3/+1
| | | | | | | | | | | | This function is local to s3c_udc_otg_xfer_dma.c , staticize it. Signed-off-by: Marek Vasut <marex@denx.de>
| * usb: s3c-otg: Rename struct s3c_requestMarek Vasut2015-12-17-28/+28
| | | | | | | | | | | | | | The driver is actually for the Designware DWC2 controller. This patch renames struct s3c_request to reflect this. Signed-off-by: Marek Vasut <marex@denx.de>
| * usb: s3c-otg: Rename struct s3c_epMarek Vasut2015-12-17-46/+46
| | | | | | | | | | | | | | The driver is actually for the Designware DWC2 controller. This patch renames struct s3c_ep to reflect this. Signed-off-by: Marek Vasut <marex@denx.de>
| * usb: s3c-otg: Rename struct s3c_dev_*_epMarek Vasut2015-12-17-4/+4
| | | | | | | | | | | | | | The driver is actually for the Designware DWC2 controller. This patch renames struct s3c_dev_*_ep to reflect this. Signed-off-by: Marek Vasut <marex@denx.de>
| * usb: s3c-otg: Rename struct s3c_usbotg_phy to dwc2_usbotg_phyMarek Vasut2015-12-17-5/+5
| | | | | | | | | | | | | | | | The driver is actually for the Designware DWC2 controller. This patch renames struct s3c_usbotg_phy to struct dwc2_usbotg_phy to make things more obvious and clear. Signed-off-by: Marek Vasut <marex@denx.de>
| * usb: s3c-otg: Split private bits from s3c_udc.hMarek Vasut2015-12-17-1/+105
| | | | | | | | | | | | | | | | | | Most of the functions are local to the s3c_udc driver, remove them from the s3c_udc.h header to stop those bits from propagating all over the place. Instead, move all the private stuff into new private s3c_udc_otg_priv.h header. Signed-off-by: Marek Vasut <marex@denx.de>
| * usb: s3c-otg: Rename struct s3c_usbotg_reg to dwc2_usbotg_regMarek Vasut2015-12-17-3/+3
| | | | | | | | | | | | | | | | The driver is actually for the Designware DWC2 controller. This patch renames struct s3c_usbotg_reg to struct dwc2_usbotg_reg to make things more obvious and clear. Signed-off-by: Marek Vasut <marex@denx.de>
| * usb: s3c-otg: Rename struct s3c_udc to dwc2_udcMarek Vasut2015-12-17-46/+46
| | | | | | | | | | | | | | | | The driver is actually for the Designware DWC2 controller. This patch renames struct s3c_udc to struct dwc2_udc to make things more obvious and clear. Signed-off-by: Marek Vasut <marex@denx.de>
| * usb: s3c-otg: Rename regs-otg.h to s3c_udc_otg_regs.hMarek Vasut2015-12-17-2/+2
| | | | | | | | | | | | | | Rename the header file, so it's obvious which driver it's part of. No functional change. Signed-off-by: Marek Vasut <marex@denx.de>
* | Merge branch 'master' of git://git.denx.de/u-boot-fsl-qoriqTom Rini2015-12-17-21/+5
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| * | net: fm: disables unused FM1-DTSEC1 MAC node in DTSShaohui Xie2015-12-17-0/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | We don't disable unused FM1-DTSEC1 MAC node in FMAN v2 since it is used by MDIO. For FMAN v3, MDIO uses dedicated controller, so we can disable unused FM1-DTSEC1 MAC node to avoid being probed in Linux. Signed-off-by: Shaohui Xie <Shaohui.Xie@freescale.com> [York Sun: revised commit message] Reviewed-by: York Sun <yorksun@freescale.com>
| * | armv8/ls1043a: remove print infoMingkai Hu2015-12-17-8/+1
| | | | | | | | | | | | | | | | | | | | | | | | Remove verbose message for FMan port. Signed-off-by: Mingkai Hu <Mingkai.Hu@freescale.com> [York Sun: Added commit message] Reviewed-by: York Sun <yorksun@freescale.com>
| * | driver: net: fsl-mc: remove MC firmware version checkStuart Yoder2015-12-17-13/+0
| |/ | | | | | | | | | | | | | | | | | | | | | | | | | | | | The MC version numbers provide no meaningful information about binary interface compatibility, so remove the check which refuses to start the MC unless a specific version is found. Version checking is supposed to be done at the individual object level, and individual drivers are responsible for their own version checking. Signed-off-by: Stuart Yoder <stuart.yoder@freescale.com> Acked-by: Prabhakar Kushwaha <prabhakar@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
* | Merge git://git.denx.de/u-boot-rockchipTom Rini2015-12-16-1/+3
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| * mmc: mmc: Don't use sprintf when using tiny-printfSjoerd Simons2015-12-13-1/+3
| | | | | | | | | | | | | | There is no sprintf implementation in tiny-printf, so don't try to use it when tiny-printf if used. Signed-off-by: Sjoerd Simons <sjoerd.simons@collabora.co.uk>
* | Merge branch 'master' of git://git.denx.de/u-boot-fsl-qoriqTom Rini2015-12-14-59/+306
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| * | drivers/crypto/fsl: fix endianness issue in RNGAneesh Bansal2015-12-15-6/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | For Setting and clearing the bits in SEC Block registers sec_clrbits32() and sec_setbits32() are used which work as per endianness of CAAM block. So these must be used with SEC register address as argument. If the value is read in a local variable, then the functions will not behave correctly where endianness of CAAM and core is different. Signed-off-by: Aneesh Bansal <aneesh.bansal@freescale.com> CC: Alex Porosanu <alexandru.porosanu@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
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