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* pci/layerscape: add support for LS1043A PCIe LUT register accessMingkai Hu2015-11-30-7/+7
| | | | | | | | | | | The endian and base address of PEX LUT register region is different between Chassis 2 and Chassis 3, so move the base address definition to chassis specific header file and add pex_lut_* functions to access LUT register. Signed-off-by: Mingkai Hu <Mingkai.Hu@freescale.com> Signed-off-by: Gong Qianyu <Qianyu.Gong@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
* armv8: ls2085a: Add support of LS2085A SoCPrabhakar Kushwaha2015-11-30-3/+4
| | | | | | | | | | | | | Freescale's LS2085A is a another personality of LS2080A SoC with support of AIOP and DP-DDR. This Patch adds support of LS2085A Personality. Signed-off-by: Pratiyush Mohan Srivastava <pratiyush.srivastava@freescale.com> Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com> [York Sun: Updated MAINTAINERS files Dropped #ifdef in cpu.h Add CONFIG_SYS_NS16550=y in defconfig] Reviewed-by: York Sun <yorksun@freescale.com>
* armv8: LS2080A: Rename LS2085A to reflect LS2080APrabhakar Kushwaha2015-11-30-5/+8
| | | | | | | | | | | LS2080A is a prime personality of Freescale’s LS2085A. It is a non-AIOP personality without support of DP-DDR, L2 switch, 1588, PCIe endpoint etc. So renaming existing LS2085A code base to reflect LS2080A (Prime personality) Signed-off-by: Pratiyush Mohan Srivastava <pratiyush.srivastava@freescale.com> Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com> [York Sun: Dropped #ifdef in cpu.c for cpu_type_list] Reviewed-by: York Sun <yorksun@freescale.com>
* driver: net: ldpaa: Fix Rx buffer alignmentPrabhakar Kushwaha2015-11-30-6/+11
| | | | | | | | | | | | | MC 0.7.1.2 enforces limitation i.e.: "Packets may be corrupted in several combinations of buffer size and frame offsets. Workaround: Use buffers that are of size that is a multiple of 256, and frame offset that is a multiple of 256" Updating the DPNI Eth driver to comply with the restriction. Signed-off-by: Bogdan Hamciuc <bogdan.hamciuc@freescale.com> Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
* driver: net: ldpaa: Add debug informationPrabhakar Kushwaha2015-11-30-0/+123
| | | | | | | | | | Add following debug information in the driver - Get various DPNI counter values - Get link status of DPNI objects - Get information of both ends of connection (DPMAC - DPNI) Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
* driver: net: ldpaa: Use DPMAC as net devicePrabhakar Kushwaha2015-11-30-44/+142
| | | | | | | | | | | | | | As per current implementation of DPAA2 ethernet driver DPNI is used as net device. DPNI is tangible objects can be multiple connected to same physical lane. Use DPMAC as net device where it represents physical lane. Below modification done in driver - Use global DPNI object - Connect DPMAC to DPNI - Create and destroy DPMAC Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
* driver: net: fsl-mc: Create DPAA2 object at run-timePrabhakar Kushwaha2015-11-30-36/+435
| | | | | | | | | | Freescale's DPAA2 ethernet driver depends upon the static DPL for the DPRC, DPNI, DPBP, DPIO objects. Instead of static objects, Create DPNI, DPBP, DPIO objects at run-time. Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
* driver: net: fsl-mc: Add DPAA2 commands to manage MCPrabhakar Kushwaha2015-11-30-198/+184
| | | | | | | | | | | Management complex Firmware, DPL and DPC are depolyed during u-boot boot sequence. Add new DPAA2 commands to manage Management Complex (MC) i.e. start mc, aiop and apply DPL from u-boot command prompt. Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
* driver: net: fsl-mc: Increase MC command timeoutPrabhakar Kushwaha2015-11-30-1/+1
| | | | | | | | | dpni_create API take takes more time as comapred to existing supported APIs of MC Flib. So increase MC command timeout. Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
* driver: ldpaa: Add api to return linked PHY ID of DPMACPrabhakar Kushwaha2015-11-30-0/+12
| | | | | | | | | | DPMAC represents physical line on the board. This physical line eventually asscociate with on-board PHY. So Add an api to return linked PHY ID of DPMAC object. Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
* driver: net: fsl-mc: Add APIs for DPMAC objects in FLIBPrabhakar Kushwaha2015-11-30-1/+224
| | | | | | | | | DPMAC object of Management complex controls Physical MAC and MDIO controller. It provides APIs for MDIO and link state updates. It also provides APIs for PHY/link configuration. Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
* driver: net: fsl-mc: Add create, destroy APIs in flibsPrabhakar Kushwaha2015-11-30-0/+167
| | | | | | | | | | Current Management Complex Flibs does not support APIs for adding and destroying the objects. Add APIs to create and destroy objects for DPBP, DPIO, DPNI and DPRC. Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
* armv8: lsch3: Fix lane protocol parsing logicPrabhakar Kushwaha2015-11-30-8/+7
| | | | | | | | | | Current implementation only consider SGMIIs for dpmac initialization. XFI serdes protocols also uses dpmac. Also, fix lane protocol parsing logic to consider both XFIs and SGMIIs. Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
* pci: fix address range check in __pci_hose_phys_to_bus()Marcel Ziswiler2015-11-23-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | The address range check may overflow if the memory region is located at the top of the 32-bit address space. This can e.g. be seen on TK1 if using the E1000 gigabit Ethernet driver where start and size are both 0x80000000 leading to the following messages: Apalis TK1 # tftpboot $loadaddr test_file Using e1000#0 device TFTP from server 192.168.10.1; our IP address is 192.168.10.2 Filename 'test_file'. Load address: 0x80408000 Loading: pci_hose_phys_to_bus: invalid physical address This patch fixes this by changing the order of the addition vs. subtraction in the range check just like already done in __pci_hose_bus_to_phys(). Reported-by: Ivan Mercier <ivan.mercier@nexvision.fr> Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Stephen Warren <swarren@nvidia.com> Acked-by: Simon Glass <sjg@chromium.org>
* i2c, avr32: fix compiler warning "input is not relaxable"Heiko Schocher2015-11-23-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | compiling U-Boot for avr32 boards shows since commit 3d1957f0ea01 "dm: i2c: Add support for multiplexed I2C buses" this warning: Building current source for 4 boards (4 threads, 8 jobs per thread) avr32: + atstk1002 +(atstk1002) drivers/i2c/built-in.o: warning: input is not relaxable avr32: + grasshopper +(grasshopper) drivers/i2c/built-in.o: warning: input is not relaxable avr32: + atngw100 +(atngw100) drivers/i2c/built-in.o: warning: input is not relaxable avr32: + atngw100mkii +(atngw100mkii) drivers/i2c/built-in.o: warning: input is not relaxable 0 4 0 /4 0:00:16 : atngw100mkii Fix it. Signed-off-by: Heiko Schocher <hs@denx.de> Reviewed-by: Roger Meier <r.meier@siemens.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Andreas Bießmann <andreas.devel@googlemail.com>
* Merge branch 'master' of http://git.denx.de/u-boot-sunxiTom Rini2015-11-22-2/+15
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| * sunxi: Add basic H3 supportJens Kuske2015-11-22-2/+3
| | | | | | | | | | | | | | | | Add initial sun8i H3 support, only uart + mmc are supported for now. Signed-off-by: Jens Kuske <jenskuske@gmail.com> Reviewed-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Hans de Goede <hdegoede@redhat.com>
| * sunxi: musb: Implement dfu_usb_get_reset()Siarhei Siamashka2015-11-22-0/+12
| | | | | | | | | | | | | | | | | | | | | | | | | | This is necessary to distinguish between the "dfu-util --detach" and the "dfu-util --reset" requests. The default weak implementation of dfu_usb_get_reset() unconditionally reboots the device, but we want to be able to continue the boot.scr execution after writing the kernel, fdt and ramdisk to RAM via DFU. Signed-off-by: Siarhei Siamashka <siarhei.siamashka@gmail.com> Reviewed-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Hans de Goede <hdegoede@redhat.com>
* | ns16550: move CONFIG_SYS_NS16550 to KconfigThomas Chou2015-11-21-0/+10
| | | | | | | | | | | | Move CONFIG_SYS_NS16550 to Kconfig, and run moveconfig.py. Signed-off-by: Thomas Chou <thomas@wytron.com.tw>
* | ns16550: zap CONFIG_NS16550_SERIALThomas Chou2015-11-21-16/+0
| | | | | | | | | | | | | | | | | | Zap CONFIG_NS16550_SERIAL, as the unification of ns16550 drivers is completed. Signed-off-by: Thomas Chou <thomas@wytron.com.tw> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Acked-by: Simon Glass <sjg@chromium.org>
* | ns16550: unify serial_omapThomas Chou2015-11-21-55/+0
| | | | | | | | | | | | | | | | Unify serial_omap, and use the generic binding. Signed-off-by: Thomas Chou <thomas@wytron.com.tw> Reviewed-by: Tom Rini <trini@konsulko.com> Acked-by: Simon Glass <sjg@chromium.org>
* | ns16550: unify serial_tegraThomas Chou2015-11-21-55/+0
| | | | | | | | | | | | | | | | Unify serial_tegra, and use the generic binding. Signed-off-by: Thomas Chou <thomas@wytron.com.tw> Reviewed-by: Tom Rini <trini@konsulko.com> Acked-by: Simon Glass <sjg@chromium.org>
* | ns16550: unify serial_dwThomas Chou2015-11-21-40/+0
| | | | | | | | | | | | | | | | Unify serial_dw, and use the generic binding. Signed-off-by: Thomas Chou <thomas@wytron.com.tw> Reviewed-by: Tom Rini <trini@konsulko.com> Acked-by: Simon Glass <sjg@chromium.org>
* | ns16550: unify serial_keystoneThomas Chou2015-11-21-49/+0
| | | | | | | | | | | | | | | | Unify serial_keystone, and use the generic binding. Signed-off-by: Thomas Chou <thomas@wytron.com.tw> Reviewed-by: Tom Rini <trini@konsulko.com> Acked-by: Simon Glass <sjg@chromium.org>
* | ns16550: unify serial_rockchipThomas Chou2015-11-21-54/+1
| | | | | | | | | | | | | | | | | | Unify serial_rockchip, and use the generic binding. Signed-off-by: Thomas Chou <thomas@wytron.com.tw> Reviewed-by: Tom Rini <trini@konsulko.com> Tested-by: Ariel D'Alessandro <ariel@vanguardiasur.com.ar> Acked-by: Simon Glass <sjg@chromium.org>
* | ns16550: unify serial_ppcThomas Chou2015-11-21-42/+1
| | | | | | | | | | | | | | | | | | Unify serial_ppc, and use the generic binding. Signed-off-by: Thomas Chou <thomas@wytron.com.tw> Reviewed-by: Tom Rini <trini@konsulko.com> [trini: Add TODO comment] Signed-off-by: Tom Rini <trini@konsulko.com>
* | ns16550: unify serial_x86Thomas Chou2015-11-20-55/+1
| | | | | | | | | | | | | | | | | | Unify serial_x86, and use the generic binding. Signed-off-by: Thomas Chou <thomas@wytron.com.tw> Reviewed-by: Tom Rini <trini@konsulko.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Acked-by: Simon Glass <sjg@chromium.org>
* | ns16550: add generic binding to unify the driversThomas Chou2015-11-20-0/+55
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add generic binding to unify ns16550 drivers. There are several drivers using almost the same code, such as serial_dw, serial_keystone, serial_omap, serial_ppc, serial_rockchip, serial_tegra.c, and serial_x86. But each is platform specific. The key difference between these drivers is the way to get input clock frequency. With this unified approach, fixed clock frequency should be extracted from "clock-frequency" property of device tree blob. If this property is not available, the macro CONFIG_SYS_NS16550_CLK will be used. It can be a constant or a function to get clock, eg, get_serial_clock(). Signed-off-by: Thomas Chou <thomas@wytron.com.tw> Reviewed-by: Tom Rini <trini@konsulko.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Heiko Schocher <hs@denx.de> Acked-by: Simon Glass <sjg@chromium.org>
* | ns16550: change map_sysmem to map_physmemThomas Chou2015-11-20-3/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | Change map_sysmem() to map_physmem(,,MAP_NOCACHE). Though map_sysmem() can be used to map system memory, it might be wrong to use it for I/O ports. The map_physmem() serves the same purpose to translate physical address to virtual address with the additional flag to take care of cache property. Most drivers use map_physmem() since I/O ports access should be uncached. As ns16550 is a driver, it should use map_physmem() rather than map_sysmem(). Signed-off-by: Thomas Chou <thomas@wytron.com.tw> Acked-by: Simon Glass <sjg@chromium.org>
* | debug_uart: restore ns16550 as defaultThomas Chou2015-11-20-0/+1
|/ | | | | | | | | | | | | | Since commit 220e8021af96 ("nios2: convert altera_jtag_uart to driver model"), the default debug uart was changed. Most people use ns16550 UART, so restore it as default. Signed-off-by: Thomas Chou <thomas@wytron.com.tw> Reported-by: Ezequiel Garcia <ezequiel@vanguardiasur.com.ar> Reported-by: Ariel D'Alessandro <ariel@vanguardiasur.com.ar> Reviewed-by: Tom Rini <trini@konsulko.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Heiko Schocher <hs@denx.de> Acked-by: Simon Glass <sjg@chromium.org>
* usb: sandbox: Add a USB emulation driverSimon Glass2015-11-19-0/+242
| | | | | | | | | Add a simple USB keyboard driver for sandbox. It provides a function to 'load' it with input data, which it will then stream through to the normal U-Boot input subsystem. When the input data is exhausted, the keyboard stops providing data. Signed-off-by: Simon Glass <sjg@chromium.org>
* usb: sandbox: Add support for interrupt operationsSimon Glass2015-11-19-0/+31
| | | | | | | Allow USB device emulation to support interrupt URBs so that we can use USB keyboards with sandbox. Signed-off-by: Simon Glass <sjg@chromium.org>
* dm: usb: Remove inactive children after a bus scanSimon Glass2015-11-19-0/+23
| | | | | | | | | | Each scan of the USB bus may return different results. Existing driver-model devices are reused when found, but if a device no longer exists it will stay around, de-activated, but bound. Detect these devices and remove them after the scan completes. Signed-off-by: Simon Glass <sjg@chromium.org>
* dm: usb: Deprecate usb_get_dev_index()Simon Glass2015-11-19-0/+9
| | | | | | | | This function should not be used with driver model. While there are users of USB Ethernet that use driver model for USB but not Ethernet, we have to keep it around. Add a comment to that effect. Signed-off-by: Simon Glass <sjg@chromium.org>
* Revert "dm: Export device_remove_children / device_unbind_children"Simon Glass2015-11-19-4/+18
| | | | | | This reverts commit bb52b367f6ca4a3a918e77737f4ff6a1089912d9. Signed-off-by: Simon Glass <sjg@chromium.org>
* Revert "dm: usb: Use device_unbind_children to clean up usb devs on stop"Simon Glass2015-11-19-3/+0
| | | | | | | | This reverts commit 6cda369509e0d3fa5f9e33c9d71589c4523799fa. We want to avoid having the USB stack rely on unbind. Signed-off-by: Simon Glass <sjg@chromium.org>
* Revert "dm: usb: Rename usb_find_child to usb_find_emul_child"Simon Glass2015-11-19-9/+10
| | | | | | | | This reverts commit 9b510df703d282effba4f56ac567aa8011d56e6b. We want to avoid having the USB stack rely on unbind. Signed-off-by: Simon Glass <sjg@chromium.org>
* sandbox: usb: Allow finding a USB emulator for a deviceSimon Glass2015-11-19-2/+15
| | | | | | | | Each USB device has an emulator. Currently this can only be found by supplying the 'pipe' value, which contains the device number. Add a way to find it directly from the emulated device. Signed-off-by: Simon Glass <sjg@chromium.org>
* sandbox: usb: Allow up to 4 emulated devices on a hubSimon Glass2015-11-19-1/+1
| | | | | | To support more advanced testing, support 4 devices instead of 2. Signed-off-by: Simon Glass <sjg@chromium.org>
* sandbox: usb: Allow dynamic emulated USB device descriptorsSimon Glass2015-11-19-20/+28
| | | | | | | | We would like the serial number to come from the device tree node name of the emulated device. This avoids them all having the same name. Adjust the code to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
* Move console definitions into a new console.h fileSimon Glass2015-11-19-1/+26
| | | | | | | | The console includes a global variable and several functions that are only used by a small subset of U-Boot files. Before adding more functions, move the definitions into their own header file. Signed-off-by: Simon Glass <sjg@chromium.org>
* sandbox: cros_ec: fix uninitialized use of lenDaniel Schwierzeck2015-11-19-0/+1
| | | | | | | | | | | | | | | | Building with gcc-5.2 raises this warning: drivers/misc/cros_ec_sandbox.c: In function cros_ec_sandbox_packet: drivers/misc/cros_ec_sandbox.c:483:5: warning: len may be used uninitialized in this function [-Wmaybe-uninitialized] if (len < 0) ^ If the function process_cmd() is called with req_hdr->command == EC_CMD_ENTERING_MODE, the value of len will be returned uninitialized. Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com> Acked-by: Simon Glass <sjg@chromium.org>
* input: Ban digit numbers if 'Num Lock' is not onBin Meng2015-11-19-0/+6
| | | | | | | | When 'Num Lock' is not on, we should not send these digit numbers (0-9 and dot) to the output buffer. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Acked-by: Simon Glass <sjg@chromium.org>
* input: Change LED state bits to conform i8042 compatible keyboardBin Meng2015-11-19-3/+3
| | | | | | | | | | | | When sending LED update command to an i8042 compatible keyboard, bit1 is 'Num Lock' and bit2 is 'Caps Lock' in the data byte. But input library defines bit1 as 'Caps Lock' and bit2 as 'Num Lock'. This causes a wrong LED to be set on an i8042 compatible keyboard. Change the LED state bits to be i8042 compatible, and change the keyboard flags as well. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Acked-by: Simon Glass <sjg@chromium.org>
* input: Call keyboard's update_leds() method when the LEDs changeBin Meng2015-11-19-0/+15
| | | | | | | | | | We should request keyboard to turn on/off its LED when detecting any changes on the LEDs. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Acked-by: Simon Glass <sjg@chromium.org> Minor changes to allow this to build without CONFIG_DM_KEYBOARD: Signed-off-by: Simon Glass <sjg@chromium.org>
* input: Save keyboard's LED state to correct placeBin Meng2015-11-19-1/+1
| | | | | | | | Currently keyboard's LED state is wrongly saved to config->leds in process_modifier(). It should really be config->flags. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Acked-by: Simon Glass <sjg@chromium.org>
* input: Convert 'keyboard' driver to use input librarySimon Glass2015-11-19-252/+38
| | | | | | | | | | This has duplicated scan code tables and logic. We can use the input library to implement most of the features here. This needs testing. The only supported board appears to be TQM5200. Unfortunately no maintainer is listed for this board. Signed-off-by: Simon Glass <sjg@chromium.org>
* video: input: Clean up after i8042 conversionSimon Glass2015-11-19-16/+4
| | | | | | | | | Now that i8042 uses driver model, adjust other mentions of it and remove old code that is no-longer used. Update the README and unify the keyboard text into one place. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
* i8042: Handle a duplicate power-on-reset responseSimon Glass2015-11-19-2/+19
| | | | | | | | | | Sometimes we seem to get 0xaa twice which causes the config read to fail. This causes chromebook_link to fail to set up the keyboard. Add a check for this and read the config again when detected. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
* input: Convert i8042 to driver modelSimon Glass2015-11-19-35/+76
| | | | | | | | | Adjust this driver to support driver model. The only users are x86 boards so this should be safe. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Tested-by: Bin Meng <bmeng.cn@gmail.com>
generated by cgit v1.1 at 2024-12-27 11:49:42 +0000