summaryrefslogtreecommitdiff
path: root/drivers
Commit message (Collapse)AuthorAgeLines
* serial: ns16550: Remove hard-coded baud_divisor settingAxel Lin2015-04-28-1/+0
| | | | | | | | | This was accidentally added by commit dd0b0122bacc "serial: ns16550: Add an option to specify the debug UART register shift". Remove it. Signed-off-by: Axel Lin <axel.lin@ingics.com> Acked-by: Simon Glass <sjg@chromium.org>
* dm: core: drop device removal error path correctlyMasahiro Yamada2015-04-28-3/+3
| | | | | | | | Trivial bug fix for commit 5a87c4174d18 (dm: core: Drop device removal error path when not supported). Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Acked-by: Simon Glass <sjg@chromium.org>
* Merge branch 'master' of git://git.denx.de/u-boot-spiTom Rini2015-04-28-60/+70
|\
| * sf: Fix to compute proper sector_sizeJagannadha Sutradharudu Teki2015-04-28-1/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Upto now flash sector_size is assigned from params which isn't necessarily a sector size from vendor, so based on the SECT_* flags from flash_params the erase_size will compute and it will become the sector_size finally. Bug report (from Bin Meng): => sf probe SF: Detected SST25VF016B with page size 256 Bytes, erase size 4 KiB, total 2 MiB, mapped at ffe00000 => sf erase 0 +100 SF: 65536 bytes @ 0x0 Erased: OK Signed-off-by: Jagannadha Sutradharudu Teki <jagannadh.teki@gmail.com> Reported-by: Bin Meng <bmeng.cn@gmail.com> Tested-by: Bin Meng <bmeng.cn@gmail.com>
| * dm: sf: Make SST flash write op work againBin Meng2015-04-28-0/+9
| | | | | | | | | | | | | | | | | | | | | | | | | | With SPI flash moving to driver model, commit fbb0991 "dm: Convert spi_flash_probe() and 'sf probe' to use driver model" ignored the SST flash-specific write op (byte program & word program), which actually broke the SST flash from wroking. This commit makes SST flash work again under driver model, by adding SST flash-specific handling in the spi_flash_std_write(). Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Jagannadha Sutradharudu Teki <jagannadh.teki@gmail.com>
| * dm: sf: Save flash flags to struct spi_flashBin Meng2015-04-28-0/+3
| | | | | | | | | | | | | | | | Add a new member 'flags' in struct spi_flash to store the flash flags during spi_flash_validate_params(). Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Jagannadha Sutradharudu Teki <jagannadh.teki@gmail.com>
| * spi: omap3: Fix timeout handlingDavid Dueck2015-04-27-8/+12
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The timeout value is never reset during the transfer. This means that when transferring more data we eventually trigger the timeout. This was reported on the mailing list: "Spansion SPI flash read timeout with AM335x" Signed-off-by: David Dueck <davidcdueck@googlemail.com> CC: Tom Rini <trini@konsulko.com> CC: Stefan Roese <sr@denx.de> CC: Andy Pont <andy.pont@sdcsystems.com> Tested-by: David Dueck <davidcdueck@googlemail.com> Reviewed-by: Jagannadha Sutradharudu Teki <jagannadh.teki@gmail.com>
| * Revert "spi: add config option to enable the WP pin function on st micron ↵Jagannadha Sutradharudu Teki2015-04-23-34/+0
| | | | | | | | | | | | | | | | | | | | | | | | flashes" This reverts commit 562f8df18da62ae02c4ace1e530451fe82c3312d. Note: Even un-reverting this patch couldn't works as expected, based on the latest testing from Heiko Schocher. Signed-off-by: Jagannadha Sutradharudu Teki <jagannadh.teki@gmail.com> Cc: Heiko Schocher <hs@denx.de>
| * dm: spi: Correct SPI claim/release_bus() methodsSimon Glass2015-04-23-7/+12
| | | | | | | | | | | | | | | | | | | | | | These methods should be passed a slave device, not a bus. This matches the old SPI interface. It is important to know which device is claiming the bus so passing a bus is not that useful. Reported-by: Haikun Wang <haikun.wang@freescale.com> Signed-off-by: Simon Glass <sjg@chromium.org> Tested-by: Peng Fan <Peng.Fan@freescale.com> Reviewed-by: Jagannadha Sutradharudu Teki <jagannadh.teki@gmail.com>
| * mtd: spi: check return value of spi_setup_slavePeng Fan2015-04-22-0/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Need to check value of spi_setup_slave and spi_setup_slave_fdt. If their return value 'bus' is NULL, there is no need to pass it to following spi_flash_probe_tail. If 'bus' is null, the original function flow is as following: spi_flash_probe |->spi_setup_slave |->spi_probe_bus_tail |->spi_flash_probe_slave |->spi_free_slave Alougth check the pointer in spi_free_slave is ok, checking the return value of spi_setup_slave and spi_setup_slave_fdt is better. Before this fix: " => sf probe 0:2 FSL_QSPI: Not a valid cs ! SF: Failed to set up slave data abort pc : [<fff66dcc>] lr : [<fff7628c>] reloc pc : [<87814dcc>] lr : [<8782428c>] sp : fdf4fcf0 ip : e630396c fp : fe0d0888 r10: fffa2538 r9 : fdf4feb8 r8 : 02625a00 r7 : 00000002 r6 : fff94ec0 r5 : 00000000 r4 : 9355553c r3 : 1af0593c r2 : cb3fe030 r1 : fff94eb8 r0 : e59ff018 Flags: nZCv IRQs off FIQs off Mode SVC_32 Resetting CPU ... " After this fix: " => sf probe 0:2 FSL_QSPI: Not a valid cs ! Failed to initialize SPI flash at 0:2 " No data abort using this patch. Signed-off-by: Peng Fan <Peng.Fan@freescale.com> Reviewed-by: Jagannadha Sutradharudu Teki <jagannadh.teki@gmail.com>
| * zynq: spi: Remove unnecessary error conditionSiva Durga Prasad Paladugu2015-04-22-3/+0
| | | | | | | | | | | | | | | | | | | | Removed the unnecessary error check from spi_xfer as the bitlen zero is possible now to deassert the chip select for which no data is required to be transfered. Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com> Reviewed-by: Jagannadha Sutradharudu Teki <jagannadh.teki@gmail.com>
| * sf: Poll both the read status and flag statusSiva Durga Prasad Paladugu2015-04-22-7/+25
| | | | | | | | | | | | | | | | | | Poll both the Read status and Flag status registers for sucessful erase and program operations for the Micron devices with E_FSR flag set in params table. Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com> Reviewed-by: Jagannadha Sutradharudu Teki <jagannadh.teki@gmail.com>
* | Merge branch 'master' of git://git.denx.de/u-boot-fsl-qoriqTom Rini2015-04-24-329/+4785
|\ \
| * | ls2085a: esdhc: Add esdhc support for ls2085aYangbo Lu2015-04-23-2/+34
| | | | | | | | | | | | | | | | | | | | | This patch adds esdhc support for ls2085a. Signed-off-by: Yangbo Lu <yangbo.lu@freescale.com> Signed-off-by: York Sun <yorksun@freescale.com>
| * | armv8/ls2085aqds: NAND boot supportScott Wood2015-04-23-1/+13
| | | | | | | | | | | | | | | | | | | | | | | | | | | This adds NAND boot support for LS2085AQDS, using SPL framework. Details of forming NAND image can be found in README. Signed-off-by: Scott Wood <scottwood@freescale.com> [York Sun: Remove +S from defconfig after commit 252ed872] Signed-off-by: York Sun <yorksun@freescale.com>
| * | driver/ifc: Add 64KB page supportJaiprakash Singh2015-04-23-24/+52
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | IFC has two register pages.Till IFC version 1.4 each register page is 4KB each.But IFC ver 2.0 register page size is 64KB each.IFC regiters structure is break into two viz FCM and RUNTIME.FCM(Flash control machine) registers are defined in PAGE0 and controls IFC generic functionality. RUNTIME registers are defined in PAGE1 and controls NAND and GPCM funcinality. FCM and RUNTIME structures defination is common for IFC version 1.4 and 2.0. Signed-off-by: Jaiprakash Singh <b44839@freescale.com> Signed-off-by: York Sun <yorksun@freescale.com>
| * | board/ls2085qds: Add support ethernetPrabhakar Kushwaha2015-04-23-0/+84
| | | | | | | | | | | | | | | | | | | | | | | | | | | Add support of ethernet: - eth.c: mapping lane to slot for (0x2A, 0x07) - ls2085a.c: To enable/disable dpmac and get link type Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com> Signed-off-by: York Sun <yorksun@freescale.com>
| * | driver/ldpaa: Add support of WRIOP static data structurePrabhakar Kushwaha2015-04-23-5/+147
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Wire rate IO Processor (WRIOP) provide support of receive and transmit ethernet frames from the ethernet MAC. Here Each WRIOP block supports upto 64 DPMACs. Create a house keeping data structure to support upto 16 DPMACs and store external phy related information. Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com> Signed-off-by: York Sun <yorksun@freescale.com>
| * | net/memac_phy: reuse driver for little endian SoCsShaohui Xie2015-04-23-24/+45
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The memac for PHY management on little endian SoCs is similar on big endian SoCs, so we modify the driver by using I/O accessor function to handle the endianness, so the driver can be reused on little endian SoCs, we introduce CONFIG_SYS_MEMAC_LITTLE_ENDIAN for little endian SoCs, if the CONFIG_SYS_MEMAC_LITTLE_ENDIAN is defined, the I/O access is little endian, if not, the I/O access is big endian. Move fsl_memac.h out of powerpc include. Signed-off-by: Shaohui Xie <Shaohui.Xie@freescale.com> Signed-off-by: York Sun <yorksun@freescale.com>
| * | drivers/fsl-mc: Changed MC firmware loading for new boot architectureJ. German Rivera2015-04-23-124/+370
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Changed MC firmware loading to comply with the new MC boot architecture. Flush D-cache hierarchy after loading MC images. Add environment variables "mcboottimeout" for MC boot timeout in milliseconds, "mcmemsize" for MC DRAM block size. Check MC boot status before calling flib functions. Signed-off-by: J. German Rivera <German.Rivera@freescale.com> Signed-off-by: York Sun <yorksun@freescale.com>
| * | net/phy/cortina: Fix compilation warningpankaj chauhan2015-04-23-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | Fix comilation warning which is emitted when firmware address is more than 32 bit. Signed-off-by: pankaj chauhan <pankaj.chauhan@freescale.com> Signed-off-by: York Sun <yorksun@freescale.com>
| * | driver/ldpaa_eth: Update ldpaa ethernet driverPrabhakar Kushwaha2015-04-23-24/+38
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Fix flush_dcache_range() input parameter to use start and end addresses. Change ethernet interface name to DPNI. Update entry criteria for ldpaa_eth_stop. Ethernet stack first stop the device before performing next operation. At the time of Ethernet driver registration, net_dev->state is set as ETH_STATE_INIT So take care net_dev->state as ETH_STATE_INIT in ldpaa_eth_stop. Undef CONFIG_PHYLIB temorarily because ldpaa_eth driver currently does not support PHYLIB. Instead of clearing pull descriptor one time, clear it before issuing any volatile dequeue command. Volatile command does not return frame immidiately, wait till a frame is available in DQRR. This frame can be valid or expired. Flush buffer before releasing to BMan ensure the core does not have any cachelines that the WRIOP will DMA to. Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com> Signed-off-by: pankaj chauhan <pankaj.chauhan@freescale.com> Signed-off-by: Roy Pledge <Roy.Pledge@freescale.com> Signed-off-by: York Sun <yorksun@freescale.com>
| * | drivers/net/e1000.c: Cleanup whitespaceMinghuan Lian2015-04-23-4/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | The patch removes unnecessary whitespace to fix checkpatch's warning: unnecessary whitespace before a quoted newline Signed-off-by: Minghuan Lian <Minghuan.Lian@freescale.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com> Reviewed-by: York Sun <yorksun@freescale.com>
| * | driver/ddr/fsl: Add workaround for DDR erratum A008511York Sun2015-04-23-1/+95
| | | | | | | | | | | | | | | | | | | | | | | | This erratum only applies to general purpose DDR controllers in LS2. It shouldn't be applied to DP-DDR controller. Check DDRC versoin number before applying workaround. Signed-off-by: York Sun <yorksun@freescale.com>
| * | driver/ddr/fsl: Add built-in memory test for DDR4 driverYork Sun2015-04-23-0/+73
| | | | | | | | | | | | | | | | | | | | | | | | | | | Add built-in memory test to catch errors after DDR is initialized, before any other transactions. To enable this test, define CONFIG_FSL_DDR_BIST. An environmental variable "ddr_bist" is checked before starting test. It takes a while (several seconds) depending on system memory size. Signed-off-by: York Sun <yorksun@freescale.com>
| * | driver/ddr/fsl: Fix driver to support empty first slotYork Sun2015-04-23-28/+56
| | | | | | | | | | | | | | | | | | | | | | | | CS0 was not allowed to be empty by u-boot driver in the past to simplify the driver. This may be inconvenient for some debugging. This patch lifts the restrictions. Controller interleaving still requires CS0 populated. Signed-off-by: York Sun <yorksun@freescale.com>
| * | drivers/ddr/fsl: Update DDR driver for DDR4York Sun2015-04-23-10/+88
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add/update registers for DDR4, including DQ mappings. Allow raw timing method used for all controllers. Update mode_9 register to 0x500 for improved stability. Check DDR controller version number individually in case a SoC has multiple DDR controllers of different versions. Increase read-write turnaround for DDR4 high speeds. Signed-off-by: York Sun <yorksun@freescale.com>
| * | driver/i2c/mxc: Enable I2C bus 3 and 4York Sun2015-04-23-3/+14
| | | | | | | | | | | | | | | | | | | | | | | | | | | Some SoCs have more than two I2C busses. Instead of adding ifdef to the driver, macros are put into board header file where CONFIG_SYS_I2C_MXC is defined. Signed-off-by: York Sun <yorksun@freescale.com> CC: Heiko Schocher <hs@denx.de>
| * | nand/fsl_ifc: Increase eccstat[] for IFC 2.0Scott Wood2015-04-23-2/+9
| | | | | | | | | | | | | | | | | | | | | | | | IFC 2.0 doubled the SRAM size, which means double the number of ECCSTAT registers. Fix the resulting array overflow. Signed-off-by: Scott Wood <scottwood@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
| * | driver/fsl_ifc: Add support to finalize CS1, CS3 address bindingPrabhakar Kushwaha2015-04-23-0/+9
| | | | | | | | | | | | | | | | | | | | | | | | | | | For fsl-lsch3, IFC is binded with address within 32-bit at fist. After u-boot relocates to DDR, CS1, CS3 can be binded to higher address to support large space. Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com> Signed-off-by: York Sun <yorksun@freescale.com>
| * | driver/ldpaa_eth: Add LDPAA Ethernet driverPrabhakar Kushwaha2015-04-23-3/+871
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | LDPAA Ethernet driver is a freescale's new ethernet driver based on Layerscape architecture. Every ethernet driver controls on DPNI object. Where all DPNIs share one common DPBP and DPIO object to support Rx and Tx flows. Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com> CC: Cristian Sovaiala <cristian.sovaiala@freescale.com> CC: Bogdan Hamciuc <bogdan.hamciuc@freescale.com> CC: J. German Rivera <German.Rivera@freescale.com> [York Sun: s/NetReceive/net_process_received_packet] Reviewed-by: York Sun <yorksun@freescale.com>
| * | driver/fsl-mc: Add support of MC FlibsPrabhakar Kushwaha2015-04-21-106/+2444
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Freescale's Layerscape Management Complex (MC) provide support various objects like DPRC, DPNI, DPBP and DPIO. Where: DPRC: Place holdes for other MC objectes like DPNI, DPBP, DPIO DPBP: Management of buffer pool DPIO: Used for used to QBMan portal DPNI: Represents standard network interface These objects are used for DPAA ethernet drivers. Signed-off-by: J. German Rivera <German.Rivera@freescale.com> Signed-off-by: Lijun Pan <Lijun.Pan@freescale.com> Signed-off-by: Stuart Yoder <stuart.yoder@freescale.com> Signed-off-by: Geoff Thorpe <Geoff.Thorpe@freescale.com> Signed-off-by: Haiying Wang <Haiying.Wang@freescale.com> Signed-off-by: Cristian Sovaiala <cristian.sovaiala@freescale.com> Signed-off-by: pankaj chauhan <pankaj.chauhan@freescale.com> Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
| * | armv8/fsl-lsch3: Add Freescale Debug Server driverBhupesh Sharma2015-04-21-0/+251
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The Debug Server driver is responsible for loading the Debug server FW on the Service Processor (Cortex-A5 core) on LS2085A like SoCs and then polling for the successful initialization of the same. TOP MEM HIDE is adjusted to ensure the space required by Debug Server FW is accounted for. MC uses the DDR area which is calculated as: MC DDR region start = Top of DDR - area reserved by Debug Server FW Signed-off-by: Bhupesh Sharma <bhupesh.sharma@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
| * | QE/DeepSleep: add QE deepsleep support for mpc85xxZhao Qiang2015-04-21-0/+88
| | | | | | | | | | | | | | | | | | | | | | | | Muram will power off during deepsleep, and the microcode of qe in muram will be lost, it should be reload when resume. Signed-off-by: Zhao Qiang <B45475@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
| * | drivers:usb: Check if USB Erratum A005697 is applicable on BSC913xNikhil Badola2015-04-21-0/+9
| | | | | | | | | | | | | | | | | | | | | | | | | | | Check if USB Erratum A005697 is applicable on BSC913x and add corresponding property in the device tree via device tree fixup which is used by linux driver Signed-off-by: Nikhil Badola <nikhil.badola@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
| * | pci/layerscape: fix link and class issues to support ls2085aMinghuan Lian2015-04-21-14/+33
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | 1. LS2085a provides PCIE_LUT_DBG register rather than PCIE_LDBG to show the link status, so the patch fixes it. 2. Increase the delay time to make sure that link training has finished. 3. Return invalid value when accessing multi-function device 4. For LS2085a DBI_RO_WR_EN bit is cleared as default, so we must set this bit before change DBI register value. Signed-off-by: Roy Zang <tie-fei.zang@freescale.com> Signed-off-by: Minghuan Lian <Minghuan.Lian@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
| * | pci/layerscape: remove unnecessary pcie_layerscape.hMinghuan Lian2015-04-21-3/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The patch uses the common function name ft_pci_setup to replace ft_pcie_setup, then removes unnecessary pcie_layerscape.h because all the functions have been declared in common.h. Signed-off-by: Minghuan Lian <Minghuan.Lian@freescale.com> Reviewed-by: Tom Rini <trini@konsulko.com> Reviewed-by: York Sun <yorksun@freescale.com>
| * | drivers:usb: Add device-tree fixup to identify socs having dual phyNikhil Badola2015-04-21-1/+6
| |/ | | | | | | | | | | | | | | | | | | Identify soc(s) having dual phy so as to add "utmi_dual" as phy_mode for all these socs. This is required for supporting deel-sleep feature in linux for usb driver Signed-off-by: Ramneek Mehresh <ramneek.mehresh@freescale.com> Signed-off-by: Nikhil Badola <nikhil.badola@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
* | Merge branch 'master' of git://git.denx.de/u-boot-dmTom Rini2015-04-23-87/+214
|\ \
| * | dm: core: Select device tree control correctly for SPLSimon Glass2015-04-23-6/+8
| | | | | | | | | | | | | | | | | | | | | Some boards will not use device tree for SPL even with driver model. Add the logic to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
| * | dm: core: Drop device removal error path when not supportedSimon Glass2015-04-23-10/+16
| | | | | | | | | | | | | | | | | | | | | | | | When CONFIG_DM_DEVICE_REMOVE is not enabled, such as in SPL, we cannot remove or unbind devices and do not expect to get errors when binding and probing devices. So drop the error path to reduce code size. Signed-off-by: Simon Glass <sjg@chromium.org>
| * | dm: Add a panic_str() function to reduce code sizeSimon Glass2015-04-23-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | The printf() in panic() adds about 1.5KB of code size to SPL when compiled with Thumb-2. Provide a smaller version that does not support printf()-style arguments and use it in two commonly compiled places. Signed-off-by: Simon Glass <sjg@chromium.org>
| * | dm: core: Remove unbind operations when not requiredSimon Glass2015-04-23-0/+4
| | | | | | | | | | | | | | | | | | | | | | | | The CONFIG_DM_DEVICE_REMOVE option takes out code related to removing devices. It should also remove the 'unbind' code since if we cannot remove we probably don't need to unbind. Signed-off-by: Simon Glass <sjg@chromium.org>
| * | dm: core: Allow sequence alias support to be removed for SPLSimon Glass2015-04-23-13/+24
| | | | | | | | | | | | | | | | | | | | | | | | In many cases SPL only uses a single serial port and there is no need for alias sequence support. We will just use the serial port pointed to by stdout-path in the /chosen node. Signed-off-by: Simon Glass <sjg@chromium.org>
| * | serial: ns16550: Remove unnecessary init on UART setupSimon Glass2015-04-22-1/+0
| | | | | | | | | | | | | | | | | | | | | It is not necessary to write a zero baud rate to the device, and for some chips this will cause problems. Drop this code. Signed-off-by: Simon Glass <sjg@chromium.org>
| * | dm: ns16550: Support non-byte register spacing with driver modelSimon Glass2015-04-22-4/+6
| | | | | | | | | | | | | | | | | | | | | Allow this driver to support boards where the register shift is not 0. This fixes some compiler warnings which appear in that case. Signed-off-by: Simon Glass <sjg@chromium.org>
| * | serial: ns16550: Add an option to specify the debug UART register shiftSimon Glass2015-04-22-10/+25
| | | | | | | | | | | | | | | | | | | | | | | | This UART permits different register spacing. To support the debug UART on devices which have a spacing other than 1 byte, allow the shift value to be specified. Signed-off-by: Simon Glass <sjg@chromium.org>
| * | dm: usb: Add a terminator to the string destructor listSimon Glass2015-04-22-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | The terminator is missing. Add it for completeness. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Joe Hershberger <joe.hershberger@ni.com> Tested-by: Joe Hershberger <joe.hershberger@ni.com>
| * | dm: core: Handle recursive unbinding of uclass devicesSimon Glass2015-04-22-2/+10
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Since a device can have children in the same uclass as itself, we need to handle unbinding carefully: we must allow that unbinding a device in a uclass may cause another device in the same uclass to be unbound. Adjust the code to cope. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Joe Hershberger <joe.hershberger@ni.com> Tested-by: Joe Hershberger <joe.hershberger@ni.com>
| * | dm: core: remove type 'static' of function uclass_get_device_tail()Przemyslaw Marczak2015-04-22-11/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Uclass API provides a few functions for get/find the device. To provide a complete function set of uclass-internal functions, for use by the drivers, the function uclass_get_device_tail() should be non-static. Signed-off-by: Przemyslaw Marczak <p.marczak@samsung.com> Cc: Simon Glass <sjg@chromium.org> Acked-by: Simon Glass <sjg@chromium.org>
generated by cgit v1.1 at 2024-12-14 10:55:06 +0000