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* usb: mv_udc: Properly align the endpoint QH and qTD listMarek Vasut2013-07-29-8/+18
| | | | | | | | | | | | | | | | The endpoint QH list has to be aligned to 10-bit boundary. We also have to make sure the list is aligned on a cacheline boundary. Make sure it is. Furthermore, check if the memory allocation for the QH list didn't fail. Moveover, improve the comment about the QH list structure. Finally, the qTD item list has to be aligned only to 5-bit boundary, not 10-bit as it is now, fix this as well. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Fabio Estevam <fabio.estevam@freescale.com> Cc: Lei Wen <leiwen@marvell.com> Cc: Otavio Salvador <otavio@ossystems.com.br> Cc: Stefano Babic <sbabic@denx.de>
* usb: mv_udc: Move QH and qTD into mv_drvMarek Vasut2013-07-29-13/+13
| | | | | | | | | | | Both the endpoint queue head and the endpoint item list is a controller specific thing. Move them both into controller private data. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Fabio Estevam <fabio.estevam@freescale.com> Cc: Lei Wen <leiwen@marvell.com> Cc: Otavio Salvador <otavio@ossystems.com.br> Cc: Stefano Babic <sbabic@denx.de>
* usb: mv_udc: Init mv_drv.gadget.ops staticallyMarek Vasut2013-07-29-3/+3
| | | | | | | | | | There is no need to init this field at runtime, so init it statically. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Fabio Estevam <fabio.estevam@freescale.com> Cc: Lei Wen <leiwen@marvell.com> Cc: Otavio Salvador <otavio@ossystems.com.br> Cc: Stefano Babic <sbabic@denx.de>
* usb: mv_udc: Remove QH_MAXNUM macroMarek Vasut2013-07-29-3/+4
| | | | | | | | | | | | The QH_MAXNUM is used in absolutelly incorrect manner and is not even needed. Remove it and correctly replace it's occurance with 2 * NUM_ENDPOINTS . Signed-off-by: Marek Vasut <marex@denx.de> Cc: Fabio Estevam <fabio.estevam@freescale.com> Cc: Lei Wen <leiwen@marvell.com> Cc: Otavio Salvador <otavio@ossystems.com.br> Cc: Stefano Babic <sbabic@denx.de>
* usb: mv_udc: Clean up the initial variable checkMarek Vasut2013-07-29-6/+5
| | | | | | | | | | | | | Clean up the code that checks the validity of a USB gadget driver in usb_gadget_register_driver(). Moreover, limit the speed of the driver to either FULL or HIGH, this is more precise and once we have xHCI support, also more correct. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Fabio Estevam <fabio.estevam@freescale.com> Cc: Lei Wen <leiwen@marvell.com> Cc: Otavio Salvador <otavio@ossystems.com.br> Cc: Stefano Babic <sbabic@denx.de>
* usb: mv_udc: Make use of struct ehci_ctrlMarek Vasut2013-07-29-18/+23
| | | | | | | | | | | | | | | | | | | | The usb_lowlevel_init() call already fills and passes back struct ehci_ctrl , which readily contains correctly determined address of the port register block address computed from values from controller configuration registers. Leverage this and make use of this value as this makes the code mode universal, but also gets us rid of the CONFIG_USB_REG_BASE configuration option. Moreover, this patch cleans up the usb_gadget_register_driver() call a little by correcting the error handling. Note the usb_lowlevel_init() and mvudc_probe() are now called in reversed order, but this has no impact on the code. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Fabio Estevam <fabio.estevam@freescale.com> Cc: Lei Wen <leiwen@marvell.com> Cc: Otavio Salvador <otavio@ossystems.com.br> Cc: Stefano Babic <sbabic@denx.de>
* usb: ehci: Split out struct ehci_ctrl definitionMarek Vasut2013-07-29-10/+14
| | | | | | | | | | | | Move the struct ehci_ctrl defition from ehci-hcd.c into ehci.h so it can be re-used by drivers. In particular, the mv_udc driver can benefit from this move. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Fabio Estevam <fabio.estevam@freescale.com> Cc: Lei Wen <leiwen@marvell.com> Cc: Otavio Salvador <otavio@ossystems.com.br> Cc: Stefano Babic <sbabic@denx.de>
* usb: mv_udc: Clean up the EP initializationMarek Vasut2013-07-29-12/+26
| | | | | | | | | | | | | | | Move the constant values that are programmed into mv_ep.ep into separate static const structure so they can be memcpy()'d when the initialization happens. Moveover, we only every init NUM_ENDPOINTS, not 2 * NUM_ENDPOINTS, so fix this bug as well. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Fabio Estevam <fabio.estevam@freescale.com> Cc: Lei Wen <leiwen@marvell.com> Cc: Otavio Salvador <otavio@ossystems.com.br> Cc: Stefano Babic <sbabic@denx.de>
* usb: mv_udc: Move endpoint array into driver dataMarek Vasut2013-07-29-24/+24
| | | | | | | | | | | | | The endpoints are operated on a per-controller basis, move the endpoint array into controller's private data. Also shuffle the struct mv_ep structure definition just above the definition of the struct mv_drv so they're well grouped together. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Fabio Estevam <fabio.estevam@freescale.com> Cc: Lei Wen <leiwen@marvell.com> Cc: Otavio Salvador <otavio@ossystems.com.br> Cc: Stefano Babic <sbabic@denx.de>
* usb: mv_udc: Unbreak the mv_udc driverMarek Vasut2013-07-29-2/+9
| | | | | | | | | | | | The mv_udc driver is broken for a while and doesn't even compile. This patch fixes the issues and gets the driver into working state again. This driver was tested on Freescale i.MX233/i.MX28 . Signed-off-by: Marek Vasut <marex@denx.de> Cc: Fabio Estevam <fabio.estevam@freescale.com> Cc: Lei Wen <leiwen@marvell.com> Cc: Otavio Salvador <otavio@ossystems.com.br> Cc: Stefano Babic <sbabic@denx.de>
* Merge branch 'master' of git://www.denx.de/git/u-boot-cfi-flashTom Rini2013-07-26-1/+1
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| * cfi_flash: use buffer length in unmap_physmem()Kuo-Jung Su2013-07-25-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | While the flash_detect_legacy() of drivers/mtd/cfi_flash.c feed unmap_physmem() with MAP_NOCACHE as 2nd parameter, the do_spi_flash_read_write() of common/cmd_sf.c feed unmap_physmem() with the length of the mapped buffer as 2nd parameter. It's apparently a bug, and I personally think the 2nd parameter should be the length of the mapped buffer. Signed-off-by: Kuo-Jung Su <dantesu@faraday-tech.com> CC: Albert Aribaud <albert.u.boot@aribaud.net> CC: Stefan Roese <sr@denx.de> Signed-off-by: Stefan Roese <sr@denx.de>
* | Merge branch 'master' of git://git.denx.de/u-boot-nds32Tom Rini2013-07-25-86/+8
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| * | pci: move pci_ftpci100.h to include/faraday/ftpci100.hGabor Juhos2013-07-24-98/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Even though the header files is used only by the pci_ftpci100 driver, it contains declaration for a function which is used by external code. Move the header file to a common location which lets external code use it. Compile tested only. Cc: Macpaul Lin <macpaul@andestech.com> Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
| * | pci: add prototype for pci_ftpci_init() functionGabor Juhos2013-07-24-0/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The pci_ftpci_init() function is implemented in 'drivers/pci/pci_ftpci100.c' however it is always called by external code. Add function declaration into ftpci100.h to make it visible for external code. Compile tested only. Cc: Macpaul Lin <macpaul@andestech.com> Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
| * | block: constify sect_buf argument of ide_write_dataGabor Juhos2013-07-24-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add a const keyword to the sect_buf argument of ide_write_data to fix the following warning: cmd_ide.c: In function '__ide_output_data': cmd_ide.c:548: warning: passing argument 2 of 'ide_write_data' discards qualifiers from pointer target type /devel/u-boot.git/include/ide.h:76: note: expected 'ulong *' but argument is of type 'const ulong *' Also modify the driver-model documentation to match with the new prototype. Compile tested only. Cc: Macpaul Lin <macpaul@andestech.com> Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
| * | mmc: ftsdc010_mci: fix build error if CONFIG_FTSDC010_SDIO is not definedGabor Juhos2013-07-24-1/+5
| |/ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The FTSDC010_DCR_FIFO_RST symbol is conditionally defined in <faraday/ftsdc010.h> and it is available available when CONFIG_FTSDC010_SDIO is enabled. However the actual driver code unconditionally uses the FTSDC010_DCR_FIFO_RST constant and this causes build error if CONFIG_FTSDC010_SDIO is not enabled. The following error happens when compiling for the adp-ag101 board: ftsdc010_mci.c: In function 'ftsdc010_request': ftsdc010_mci.c:178: error: 'FTSDC010_DCR_FIFO_RST' undeclared (first use in this function) ftsdc010_mci.c:178: error: (Each undeclared identifier is reported only once ftsdc010_mci.c:178: error: for each function it appears in.) The patch ensures that the FTSDC010_DCR_FIFO_RST symbol gets used only if CONFIG_FTSDC010_SDIO is defined. Compile tested only. Cc: Kuo-Jung Su <dantesu@faraday-tech.com> Cc: Macpaul Lin <macpaul@andestech.com> Signed-off-by: Gabor Juhos <juhosg@openwrt.org> Reviewed-by: Kuo-Jung Su <dantesu@faraday-tech.com>
* | qemu-malta: Update for SPDX license identifiersTom Rini2013-07-25-3/+1
| | | | | | | | Signed-off-by: Tom Rini <trini@ti.com>
* | Merge branch 'master' of git://git.denx.de/u-boot-mipsTom Rini2013-07-25-1/+180
|\ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | Conflict over SPDX changes means that one change was effectively dropped as it was fixing typos in a removed hunk of text. Conflicts: arch/mips/cpu/mips64/start.S Signed-off-by: Tom Rini <trini@ti.com>
| * | MIPS: qemu-malta: add PCI supportGabor Juhos2013-07-24-0/+179
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Qemu emulates the Galileo GT64120 System Controller which provides a CPU bus to PCI bus bridge. The patch adds driver for this bridge and enables PCI support for the emulated Malta board. Signed-off-by: Gabor Juhos <juhosg@openwrt.org> Cc: Daniel Schwierzeck <daniel.schwierzeck@googlemail.com>
| * | net: pcnet: use pci_virt_to_mem to obtain buffer addressesGabor Juhos2013-07-24-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The pcnet driver uses the pci_phys_to_mem function to get the memory address of the DMA buffers. This This assumes an 1:1 mapping between the PCI and physical memory which is not true on all platforms. On MIPS platform U-Boot is running within a mapped memory region, and the pci_phys_to_mem macro can't be used to obtain the memory address of the buffers. Signed-off-by: Gabor Juhos <juhosg@openwrt.org> Cc: Daniel Schwierzeck <daniel.schwierzeck@googlemail.com>
* | | drivers/i2c: Update fti2c010.[ch], i2c_core.c to use SPDX identifiersTom Rini2013-07-25-17/+3
| | | | | | | | | | | | | | | Acked-by: Heiko Schocher <hs@denx.de> Signed-off-by: Tom Rini <trini@ti.com>
* | | Merge branch 'master' of git://git.denx.de/u-boot-i2cTom Rini2013-07-24-333/+1236
|\ \ \ | |/ / |/| | | | | | | | | | | | | | | | | | | | | | | | | | The sandburst-specific i2c drivers have been deleted, conflict was just over the SPDX conversion. Conflicts: board/sandburst/common/ppc440gx_i2c.c board/sandburst/common/ppc440gx_i2c.h Signed-off-by: Tom Rini <trini@ti.com>
| * | i2c: add Faraday FTI2C010 I2C controller supportKuo-Jung Su2013-07-23-0/+451
| | | | | | | | | | | | | | | | | | | | | | | | | | | Faraday FTI2C010 is a multi-function I2C controller which supports both master and slave mode. This patch simplily implements the master mode only. Signed-off-by: Kuo-Jung Su <dantesu@faraday-tech.com> CC: Heiko Schocher <hs@denx.de>
| * | I2C: mxc_i2c: Add support for Vybrid VF610 platformAlison Wang2013-07-23-7/+55
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch adds support for Vybrid VF610 platform. There are some differences between i.MX6 and Vybrid for I2C controller. (1) The registers' offset are different. (2) The I2C clock divider values are different. (3) In I2C control register, the enable/disable/reset bit is inverted for Vybrid comparing to i.MX6. (4) In I2C status register, the interrupt flag bit is cleared by writing "1" for Vybrid. For i.MX6, this bit is cleared by writing "0". (5) In I2C status register, the arbitration lost flag bit is cleared by writing "1" for Vybrid. For i.MX6, this bit is cleared by writing "0". Signed-off-by: Alison Wang <b18965@freescale.com>
| * | i2c, ppc4xx_i2c: switch to new multibus/multiadapter supportDirk Eibach2013-07-23-98/+97
| | | | | | | | | | | | | | | | | | | | | Signed-off-by: Dirk Eibach <dirk.eibach@gdsys.cc> Cc: Heiko Schocher <hs@denx.de> Cc: Stefan Roese <sr@denx.de> Tested-by: Stefan Roese <sr@denx.de>
| * | tegra: i2c: Enable new CONFIG_SYS_I2C frameworkSimon Glass2013-07-23-49/+33
| | | | | | | | | | | | | | | | | | | | | | | | This enables CONFIG_SYS_I2C on Tegra, updating existing boards and the Tegra i2c driver to support this. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Heiko Schocher <hs@denx.de>
| * | tegra: i2c: Add function to know about current busSimon Glass2013-07-23-17/+61
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Rather than using a variable in various places, add a single function, tegra_i2c_get_bus(), which returns a pointer to information about a bus. This will make it easier to move to the new i2c framework. Signed-off-by: Simon Glass <sjg@chromium.org>
| * | i2c, fsl_i2c: switch to new multibus/multiadapter supportHeiko Schocher2013-07-23-134/+86
| | | | | | | | | | | | | | | | | | | | | | | | | | | - added to fsl_i2c driver new multibus/multiadpater support - adapted all config files, which uses this driver Signed-off-by: Heiko Schocher <hs@denx.de> Cc: Simon Glass <sjg@chromium.org> Cc: Stephen Warren <swarren@wwwdotorg.org>
| * | i2c, soft-i2c: switch to new multibus/multiadapter supportHeiko Schocher2013-07-23-48/+58
| | | | | | | | | | | | | | | | | | | | | | | | | | | - added to soft_i2c driver new multibus/multiadpater support - adapted all config files, which uses this driver Signed-off-by: Heiko Schocher <hs@denx.de> Cc: Simon Glass <sjg@chromium.org> Cc: Stephen Warren <swarren@wwwdotorg.org>
| * | i2c: add i2c_core and prepare for new multibus supportHeiko Schocher2013-07-23-0/+415
| |/ | | | | | | | | | | | | | | | | | | | | | | | | | | This Patch introduce the new i2c_core file, which holds the I2C core functions, for the rework of the multibus/ multiadapter support. Also adds changes in i2c.h for the new I2C multibus/multiadapter support. This new support can be activated with the CONFIG_SYS_I2C define. Signed-off-by: Heiko Schocher <hs@denx.de> Signed-off-by: Simon Glass <sjg@chromium.org> Cc: Mike Frysinger <vapier@gentoo.org> Cc: Stephen Warren <swarren@wwwdotorg.org>
* | Add LGPL-2.1+ SPDX-License-Identifier to source filesWolfgang Denk2013-07-24-4/+1
| | | | | | | | Signed-off-by: Wolfgang Denk <wd@denx.de>
* | Add GPL-2.0+ SPDX-License-Identifier to source filesWolfgang Denk2013-07-24-8826/+601
|/ | | | | | Signed-off-by: Wolfgang Denk <wd@denx.de> [trini: Fixup common/cmd_io.c] Signed-off-by: Tom Rini <trini@ti.com>
* net: phy: Set SUPPORTED_1000baseX_Half flag in ESTATUS_1000_XHALF caseFabio Estevam2013-07-19-1/+1
| | | | | | | | | | | | | Commit de1d786e (add support for Xilinx 1000BASE-X phy (GTX)) introduced the checking for ESTATUS_1000_XHALF, but it incorrectly sets the SUPPORTED_1000baseX_Full flag in this case. Set the SUPPORTED_1000baseX_Half flag instead. Acked-by: Charles Coldwell <coldwell@gmail.com> Reviewed-By: Sascha Silbe <t-uboot@infra-silbe.de> Reviewed-by: Joe Hershberger <joe.hershberger@ni.com> Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
* phy: fix 10/100Mbps operation on 1Gbps-capable linksSascha Silbe2013-07-19-1/+9
| | | | | | | | | | | | | | | | | de1d786 [add support for Xilinx 1000BASE-X phy (GTX)] introduced a check for the extended status register in order to support 1Gbps-capable PHYs that don't have the 1000BASE-T registers. Since Extended Status only indicates what the PHY (i.e. the local side) is capable of, this broke communication with non-1Gbps peers. Only check the extended status if the 1000BASE-T registers are actually missing so we don't end up setting speed to 1Gbps even though the previous test (for the combination of local and peer support for 1Gbps) already indicated we can't do 1Gbps with the current peer. Signed-off-by: Sascha Silbe <t-uboot@infra-silbe.de> Tested-by: Fabio Estevam <fabio.estevam@freescale.com> Reviewed-by: Joe Hershberger <joe.hershberger@ni.com>
* Merge branch 'master' of git://git.denx.de/u-boot-mmcTom Rini2013-07-16-5/+4
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| * fsl_esdhc: Touch only relevant sys ctrl bitsDirk Behme2013-07-16-3/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | Dealing with the sys ctrl register should touch only the relevant bits and not accidently the whole register. On i.MX6, the sys control register contains bits which shouldn't be reset to 0, e.g. SYS_CTRL[3-0] and IPP_RST_N (SYS_CTRL[23]). Do this by read/modify/write instead of just a 32bit write. Signed-off-by: Dirk Behme <dirk.behme@de.bosch.com> Acked-by: Stefano Babic <sbabic@denx.de> Signed-off-by: Andy Fleming <afleming@freescale.com>
| * drivers/mmc/dw_mmc - remove extra arch specific "asm/arch/clk.h" inclusionAlexey Brodkin2013-07-16-1/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | 1. No contents of "asm/arch/clk.h" is used within "dw_mmc.c". 2. If arch doesn't have "asm/arch/clk.h" driver won't build. Without mentioned inclusion dw_mmc driver could be built for arches other than ARM. For ARM driver still builds without it. Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com> Cc: Mischa Jonker <mjonker@synopsys.com> Cc: Andy Fleming <afleming@gmail.com> Cc: Rajeshwari Shinde <rajeshwari.s@samsung.com> Cc: Amar <amarendra.xt@samsung.com> Cc: Minkyu Kang <mk7.kang@samsung.com> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Andy Fleming <afleming@freescale.com>
| * Powerpc: eSDHC: Fix mmc read write err in uboot of T4240QDS boardHaijun.Zhang2013-07-16-1/+1
| | | | | | | | | | | | | | | | | | Fill the right command type when using CMD12 to stop data transfer. Signed-off-by: Haijun Zhang <Haijun.Zhang@freescale.com> CC: Fleming Andrew-AFLEMING <AFLEMING@freescale.com> CC: Scott Wood <scottwood@freescale.com> Signed-off-by: Andy Fleming <afleming@freescale.com>
* | Add Atmel I2C tpmDirk Eibach2013-07-16-0/+122
| | | | | | | | | | | | | | | | | | Add support for Atmel TPM devices with two wire interface. Signed-off-by: Dirk Eibach <dirk.eibach@gdsys.cc> Signed-off-by: Reinhard Pfau <reinhard.pfau@gdsys.cc> Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Andy Fleming <afleming@freescale.com>
* | i2c: fsl_i2c: i2c_read(): dont try to write address w/ alen=0Reinhard Pfau2013-07-16-3/+6
|/ | | | | | | | | if alen is 0: no longer start a write cycle before reading data. Signed-off-by: Dirk Eibach <dirk.eibach@gdsys.cc> Signed-off-by: Reinhard Pfau <reinhard.pfau@gdsys.cc> Acked-by: Heiko Schocher <hs@denx.de> Signed-off-by: Andy Fleming <afleming@freescale.com>
* Merge branch 'master' of git://git.denx.de/u-boot-nand-flashTom Rini2013-07-12-6/+4
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| * mtd: mxc_nand: Fix crash after MTD resyncMarek Vasut2013-07-12-6/+4
| | | | | | | | | | | | | | | | | | | | | | | | The driver triggered a BUG() in nand_base.c:3214/nand_scan_tail() because the ecc.strength was not set in NAND_ECC_HW_SYNDROME ECC mode. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Benoit Thebaudeau <benoit.thebaudeau@advansee.com> Cc: Fabio Estevam <fabio.estevam@freescale.com> Cc: Scott Wood <scottwood@freescale.com> Cc: Stefano Babic <sbabic@denx.de>
* | Merge branch 'master' of git://git.denx.de/u-boot-armTom Rini2013-07-12-116/+434
|\ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | Fix a trivial conflict in arch/arm/dts/exynos5250.dtsi about gpio and serial. Conflicts: arch/arm/dts/exynos5250.dtsi Signed-off-by: Tom Rini <trini@ti.com>
| * \ Merge branch 'u-boot-imx/master' into 'u-boot-arm/master'Albert ARIBAUD2013-07-12-1/+22
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| | * | net: fec: Avoid MX28 bus sync issueMarek Vasut2013-07-12-0/+22
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The MX28 multi-layer AHB bus can be too slow and trigger the FEC DMA too early, before all the data hit the DRAM. This patch ensures the data are written in the RAM before the DMA starts. Please see the comment in the patch for full details. This patch was produced with an amazing help from Albert Aribaud, who pointed out it can possibly be such a bus synchronisation issue. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Albert ARIBAUD <albert.u.boot@aribaud.net> Cc: Fabio Estevam <fabio.estevam@freescale.com> Cc: Stefano Babic <sbabic@denx.de> Tested-by: Fabio Estevam <fabio.estevam@freescale.com> Tested-by: Alexandre Pereira da Silva <aletes.xgr@gmail.com>
| | * | net: fec: Remove bogus flush_dcache_range() callMarek Vasut2013-07-12-1/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Remove incorrectly called and duplicate flush_dcache_range() call from fec_mxc driver. The call is not needed, since the caches are already flushed in fec_tbd_init(), moreover the second argument should be the ending address, not size. Signed-off-by: Marek Vasut <marex@denx.de> Reported-by: Albert Aribaud <albert.u.boot@aribaud.net> Cc: Stefano Babic <sbabic@denx.de> Cc: Tom Rini <trini@ti.com>
| * | | ARM: Tegra: USB: EHCI: Add support for Tegra30/Tegra114Jim Lin2013-07-11-36/+268
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Tegra30 and Tegra114 are compatible except PLL parameters. Tested on Tegra30 Cardhu, and Tegra114 Dalmore platforms. All works well. Signed-off-by: Jim Lin <jilin@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com>
| * | | Merge branch 'u-boot-samsung/master' into 'u-boot-arm/master'Albert ARIBAUD2013-07-10-18/+97
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| | * | | EXYNOS: Resolve the i2c compilation errorAmar2013-07-10-8/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch resolves the below mentioned compilation error of i2c driver for non-FDT case Compilation error: s3c24x0_i2c.c: In function 'board_i2c_init': s3c24x0_i2c.c:544:18: error: 'CONFIG_MAX_I2C_NUM' undeclared (first use in this function) s3c24x0_i2c.c:544:18: note: each undeclared identifier is reported only once for each function it appears in s3c24x0_i2c.c:545:3: warning: implicit declaration of function Signed-off-by: Rajeshwari Shinde <rajeshwari.s@samsung.com> Signed-off-by: Amar <amarendra.xt@samsung.com> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
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