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* Merge branch 'next' of ../nextWolfgang Denk2010-12-22-70/+1313
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| * MTD/NAND: fix nand_base.c to use get_timer() correctlyReinhard Meyer2010-12-17-6/+9
| | | | | | | | | | | | | | | | | | This is part of the timer cleanup effort. In the future we only use get_timer() in its intended way to program timeout loops. reset_timer() shall not be used anymore. Signed-off-by: Reinhard Meyer <u-boot@emk-elektronik.de>
| * nand: constify id/manu tablesMike Frysinger2010-12-17-5/+5
| | | | | | | | | | | | These id tables need not be writable. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
| * RTC driver for PT7C4338 chip.Priyanka Jain2010-12-17-0/+145
| | | | | | | | | | | | | | | | | | | | | | PT7C4338 chip is being manufactured by Pericom Technology Inc. It is a serial real-time clock which provides: 1)Low-power clock/calendar. 2)Programmable square-wave output. It has 56 bytes of nonvolatile RAM. Signed-off-by: Priyanka Jain <Priyanka.Jain@freescale.com> Acked-by: Timur Tabi <timur@freescale.com>
| * Merge branch 'next' of git://www.denx.de/git/u-boot-cfi-flash into nextWolfgang Denk2010-12-17-3/+58
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| | * cfi_flash: Add optional config register write to cfi-detectionStefan Roese2010-12-17-0/+43
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch adds the possibility to (optinally) write to the flash configuration register. The Intel style CFI chips support such a register that can be used to configure the operation mode to a non-default value. This method will be used by the t3corp board, which needs to configure the DS617 Xilinx flash for async read mode. Signed-off-by: Stefan Roese <sr@denx.de>
| | * cfi_flash: Use flash_read32() in sector_erased()Stefan Roese2010-12-17-3/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The function sector_erased() is modified to not use pointer access, but to use the correct accessor functions. This fixes a problem on the t3corp board with the Xilinx DS617 flash chips. Here a board specific accessor function is needed to read from flash in 32bit mode. This patch enables such an operation mode. Signed-off-by: Stefan Roese <sr@denx.de>
| | * cfi_flash: Fix problems with status/id read modeStefan Roese2010-12-17-0/+12
| | | | | | | | | | | | | | | | | | | | | | | | | | | This patch adds some calls to set the flash chip in the read-status- register- or read-id-mode before the corresponding register is read back. This problem was detected while porting the common CFI driver to support the Xilinx DS617 flash chips. Signed-off-by: Stefan Roese <sr@denx.de>
| * | sf: winbond: add support for W25Q16/32/128 partsWojtek Skulski2010-12-17-10/+29
| | | | | | | | | | | | | | | | | | | | | While we're here, cut out the useless id defines too. Signed-off-by: Wojtek Skulski <skulski@pas.rochester.edu> Signed-off-by: Mike Frysinger <vapier@gentoo.org>
| * | sf: new driver for EON devicesChong Huang2010-12-17-0/+280
| |/ | | | | | | | | | | Signed-off-by: Chong Huang <chuang@ucrobotics.com> Signed-off-by: Haitao Zhang <minipanda@linuxrobot.org> Signed-off-by: Mike Frysinger <vapier@gentoo.org>
| * Serial: Add UART support for Marvell ARMADA 100 SoCs.Prafulla Wadaskar2010-12-16-2/+3
| | | | | | | | | | | | | | | | ARMADA 100 SoCs has NS16550 compatible UART peripheral This patch enables the same for ARMADA100 platforms Signed-off-by: Mahavir Jain <mjain@marvell.com> Signed-off-by: Prafulla Wadaskar <prafulla@marvell.com>
| * Serial: ns16550: Add support for CONFIG_SYS_NS16550_IER macroPrafulla Wadaskar2010-12-16-2/+6
| | | | | | | | | | | | | | | | | | | | On some processors this ier register configuration is different for ex. Marvell Armada100 This patch introduce CONFIG_SYS_NS16550_IER macro support to unconditionally initialize this register. Signed-off-by: Prafulla Wadaskar <prafulla@marvell.com>
| * gpio: Add Multi-Function-Pin configuration driver for Marvell SoCsPrafulla Wadaskar2010-12-16-0/+88
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Most of the Marvell SoCs has Multi Function Pin (MFP) configuration registers For ex. ARMADA100. These registers are programmed to expose the specific functionality associated with respective SoC Pins This driver provides configuration APIs, using them, configuration need to be done in board specific code for ex- following code configures MFPs 107 and 108 for UART_TX/RX functionality int board_early_init_f(void) { u32 mfp_cfg[] = { /* Console on UART1 */ MFP107_UART1_RXD, MFP108_UART1_TXD, MFP_EOC /*End of configureation*/ }; /* configure MFP's */ mfp_config(mfp_cfg); return 0; } Signed-off-by: Prafulla Wadaskar <prafulla@marvell.com>
| * Merge branch 'master' of ../master into nextWolfgang Denk2010-12-16-27/+536
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| * | OMAP3: SPI driverDirk Behme2010-12-11-0/+470
| | | | | | | | | | | | | | | | | | CC: Ruslan N. Araslanov <byaaka@yandex.ru> Signed-off-by: Ruslan Araslanov <ruslan.araslanov@vitecmm.com> Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
| * | ARMV7: OMAP4: twl6030 add battery charging supportBalaji T K2010-12-11-2/+122
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add battery charging support twl6030 driver. Add support for battery voltage and current measurements. Add command to get battery status and start/stop battery charging from USB. Signed-off-by: Balaji T K <balajitk@ti.com> Tested-by: Steve Sakoman <steve.sakoman@linaro.org> Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
| * | Merge branch 'next' of git://git.denx.de/u-boot-arm into nextWolfgang Denk2010-11-30-1/+40
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| | * | da850: Add RMII support for EMACSudhakar Rajashekhara2010-11-30-1/+40
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch is a port of the work by Sudhakar Rajeshekhara in commit ab3effbcad8851cc65dc5241a01c064d2030a3b2 of git://arago-project.org/git/people/sandeep/u-boot-davinci.git. The da850 UI board has on it an RMII PHY which can be used if the MDC line to the MII PHY on the baseboard is disabled and the RMII PHY is enabled by configuring the values of some GPIO pins on the IO expander of the UI board. This patch implements disabling that line via GPIO2[6], configuring the UI board's IO expander and setting only the pinmux settings that are needed for RMII operation. Tested on da850evm by adding a define for CONFIG_DRIVER_TI_EMAC_USE_RMII. Signed-off-by: Sudhakar Rajashekhara <sudhakar.raj@ti.com> Signed-off-by: Ben Gardiner <bengardiner@nanometrics.ca> CC: Sandeep Paulraj <s-paulraj@ti.com> CC: Ben Warren <biggerbadderben@gmail.com> CC: Mike Frysinger <vapier@gentoo.org> CC: Sughosh Ganu <urwithsughosh@gmail.com> Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
| * | | pl01x: use C structs and readl/writelRabin Vincent2010-11-30-39/+52
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Use C structs for registers, and use readl/writel instead of custom accessors. Acked-by: Michael Brandt <michael.brandt@stericsson.com> Signed-off-by: Rabin Vincent <rabin.vincent@stericsson.com>
| * | | add Xilinx_abort_fn to Xilinx_Spartan3_Slave_Serial_fnsWolfgang Wegner2010-11-30-0/+6
| |/ / | | | | | | | | | | | | | | | | | | | | | Currently the hardware was left in an undefined state in case Spartan3 serial load failed. This patch adds Xilinx_abort_fn to give the board a possibility to clean up in this case. Signed-off-by: Wolfgang Wegner <w.wegner@astro-kom.de>
* | | Move DECLARE_GLOBAL_DATA_PTR to file scopeJohn Rigby2010-12-21-5/+8
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | It can be optimised out by the compiler otherwise resulting in obscure errors like a board not booting. This has been documented in README since 2006 when these were first fixed up for GCC 4.x. Signed-off-by: John Rigby <john.rigby@linaro.org> Fix some additional places. Signed-off-by: Wolfgang Denk <wd@denx.de> Acked-By: Albert ARIBAUD <albert.aribaud@free.fr>
* | | fsl_esdhc: Fix the voltage validation processLi Yang2010-12-18-5/+15
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The current code use all the voltage range support by the host controller to do the validation. This will cause problem when the host supports Low Voltage Range. Change the validation voltage to be based on board setup. Signed-off-by: Li Yang <leoli@freescale.com> Tested-by: Stefano Babic <sbabic@denx.de> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* | | fsl_esdhc: Fix max clock frequencyJerry Huang2010-12-18-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | The max clock of MMC is 52MHz Signed-off-by: Jerry Huang <Changm-Ming.Huang@freescale.com> Tested-by: Stefano Babic <sbabic@denx.de> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* | | fsl_esdhc: Use mmc_set_clock to set initial speedJerry Huang2010-12-18-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | After booting the u-boot, and first using some SD card (such as Sandisk 2G SD card), because the field 'clock' of struct mmc is zero, this will cause the read transfer is always active and SDHC DATA line is always active, therefore, driver can't handle the next command. Therefore, we use mmc_set_clock to setup both the data structure and HW to the initial clock speed of 400000Hz. Signed-off-by: Jerry Huang <Chang-Ming.Huang@freescale.com> Tested-by: Stefano Babic <sbabic@denx.de> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* | | video/mx3fb: fix clock dividerStefano Babic2010-12-17-1/+1
| |/ |/| | | | | | | | | | | | | | | | | | | Fix clock divider for COM57H5M10XRC display. The previous setting caused flicker. Tested on Qong (EVBLite with COM57H5M10XRC). Signed-off-by: Stefano Babic <sbabic@denx.de> Acked-by: Wolfgang Denk <wd@denx.de> Acked-by: Anatolij Gustschin <agust@denx.de>
* | fsl_esdhc: Set the eSHDC DMACTL[SNOOP] bit after resetting the controllerP.V.Suresh2010-12-13-4/+4
| | | | | | | | | | | | | | | | | | eSDHC host controller reset results in clearing of snoop bit also. This patch sets the SNOOP bit after the completion of host controller reset. Without this patch mmc reads are not consistent. Signed-off-by: P.V.Suresh <pala@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* | fsl_upm: Add MxMR/MDR synchronizationJohn Schmoller2010-12-13-0/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | According to Freescale reference manuals (eg section "13.4.4.2 Programming the UPMs" of the P4080 Reference Manual): "Since the result of any update to the MxMR/MDR register must be in effect before the dummy read or write to the UPM region, a write to MxMR/MDR should be followed immediately by a read of MxMR/MDR." The UPM on a custom P4080-based board did not work without performing a read of MxMR/MDR after a write. Signed-off-by: John Schmoller <jschmoller@xes-inc.com> Signed-off-by: Peter Tyser <ptyser@xes-inc.com> Acked-by: Scott Wood <scottwood@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* | tsec: Revert to setting TBICR_ANEG_ENABLE by default for SGMIIKumar Gala2010-12-13-5/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The following commit: commit 46e91674fb4b6d06c6a4984c0b5ac7d9a16923f4 Author: Peter Tyser <ptyser@xes-inc.com> Date: Tue Nov 3 17:52:07 2009 -0600 tsec: Force TBI PHY to 1000Mbps full duplex in SGMII mode Removed setting Auto-Neg by default, however this is believed to be proper default configuration for initialization of the TBI interface. Instead we explicitly set CONFIG_TSEC_TBICR_SETTINGS for the XPedite5370 & XPedite5500 boards that use a Broadcomm PHY which require Auto-Neg to be disabled to function properly. This addresses a breakage on the P2020 DS & MPC8572 DS boards when used with an SGMII riser card. We also remove setting CONFIG_TSEC_TBICR_SETTINGS on the P1_P2_RDB family of boards as now the default setting is sufficient for them. Additionally, we clean up the code a bit to remove an unnecessary second define. Signed-off-by: Kumar Gala <galak@kernel.crashing.org> Acked-by: Peter Tyser <ptyser@xes-inc.com> Tested-by: Peter Tyser <ptyser@xes-inc.com>
* | Merge branch 'master' of git://git.denx.de/u-boot-imxWolfgang Denk2010-12-09-15/+2
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| * | imx: Get fec mac address from fuseLiu Hui-R643432010-11-21-15/+2
| | | | | | | | | | | | | | | | | | | | | The patch is to support getting FEC MAC address from fuse bank. Signed-off-by: Jason Liu <r64343@freescale.com> Tested-by: Stefano Babic <sbabic@denx.de>
* | | Merge branch 'master' of git://git.denx.de/u-boot-armWolfgang Denk2010-12-08-0/+1
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| * | | AT91: gen_atmel_mci.c: fix bug when Slot B is usedReinhard Meyer2010-12-07-0/+1
| | |/ | |/| | | | | | | Signed-off-by: Reinhard Meyer <u-boot@emk-elektronik.de>
* | | fix s3c2410_nand timing default valuesDavid Müller (ELSOFT AG)2010-12-06-3/+9
| | | | | | | | | | | | | | | | | | | | | The attached patch fixes wrong timing default values and adds the possibility to specify board specific timing value in the board config file. Signed-off-by: David Mueller <d.mueller@elsoft.ch>
* | | video: move fsl_diu_fb driver to drivers/videoAnatolij Gustschin2010-12-01-0/+514
|/ / | | | | | | | | | | | | | | | | Since the driver is used not only on Freescale boards, we move it to a common place for video drivers as suggested by Wolfgang. The patch also cleans up the top level Makefile. Signed-off-by: Anatolij Gustschin <agust@denx.de>
* | cfi_flash: fix bug introduced while recent change to flash_get_size()Anatolij Gustschin2010-11-28-3/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | commit ec50a8e389863ac35bfd9d9a2e8b30187318e59e "cfi_flash: handle 'chip size exceeds address window' situation" added 3rd argument to flash_get_size() but didn't fix all the function calls from the board specific code. Many boards have their own flash_get_size() definitions in the board code and use them there, but some boards (e.g. tqm834x, tqm85xx, pdm360ng) use flash_get_size() from the cfi_flash.c driver. The bug shows up if the value of the "max_size" argument (which is not defined when calling the function with two arguments) happens to be less than "info->size". In this case on the affected boards we end up with a bank of reduced size and in the worst case might even be not able to update U-Boot or to boot the kernel from flash: => fli Bank # 1: CFI conformant FLASH (32 x 16) Size: 0 kB in 1 Sectors AMD Standard command set, Manufacturer ID: 0x01, Device ID: 0x227E Erase timeout: 4096 ms, write timeout: 1 ms Buffer write timeout: 3 ms, buffer size: 64 bytes Sector Start Addresses: F0000000 RO Bank # 2: CFI conformant FLASH (32 x 16) Size: 128 MB in 512 Sectors AMD Standard command set, Manufacturer ID: 0x01, Device ID: 0x227E Erase timeout: 4096 ms, write timeout: 1 ms Buffer write timeout: 3 ms, buffer size: 64 bytes Sector Start Addresses: F8000000 F8040000 F8080000 F80C0000 F8100000 F8140000 F8180000 F81C0000 F8200000 F8240000 ... E.g., updating U-Boot is not possible now: => protect off ${u-boot_addr} +${u-boot_size} Error: end address (0xf007ffff) not in flash! Bad address format => era ${u-boot_addr} +${u-boot_size} Error: end address (0xf007ffff) not in flash! Bad address format This patch removes the 3rd argument of flash_get_size() again and sets "max_size" in the function itself instead of passing it as a function argument. Signed-off-by: Anatolij Gustschin <agust@denx.de>
* | 74xx_7xx: Cleanup for partial linking and --gc-sectionsWolfgang Denk2010-11-27-1/+2
| | | | | | | | | | Signed-off-by: Wolfgang Denk <wd@denx.de> Acked-by: Stefan Roese <sr@denx.de>
* | 824x: Cleanup for partial linking and --gc-sectionsWolfgang Denk2010-11-27-3/+7
| | | | | | | | | | Signed-off-by: Wolfgang Denk <wd@denx.de> Acked-by: Stefan Roese <sr@denx.de>
* | ppc4xx/NAND: Reduce size of NAND SPL imageStefan Roese2010-11-27-2/+2
| | | | | | | | | | | | | | | | | | | | This is needed for the canyonlands_nand build target. Without it the resulting image won't fit into 4k. Signed-off-by: Stefan Roese <sr@denx.de> Cc: Scott Wood <scottwood@freescale.com> Acked-by: Scott Wood <scottwood@freescale.com> Acked-by: Stefan Roese <sr@denx.de>
* | e1000: fix compile warningWolfgang Denk2010-11-26-1/+2
| | | | | | | | | | | | | | | | | | Get rid of compiler warning: e1000.c: In function 'e1000_transmit': e1000.c:5028: warning: passing argument 1 of 'virt_to_phys' discards qualifiers from pointer target type Signed-off-by: Wolfgang Denk <wd@denx.de> Acked-by: Stefan Roese <sr@denx.de>
* | Merge branch 'master' of git://git.denx.de/u-boot-usbWolfgang Denk2010-11-26-2/+5
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| * | usb: Remove usb_dev_init() from ehci-ppc4xx.cStefan Roese2010-11-26-1/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | Calling usb_dev_init() from within the EHCI host driver is wrong. The EHCI host driver should have no dependency/interconnection to the USB device driver. Signed-off-by: Stefan Roese <sr@denx.de> Cc: Remy Bohmer <linux@bohmer.net>
| * | usb: Clear CMD_RUN while issuing CMD_RESET in ehci_reset()Stefan Roese2010-11-26-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch fixes a problem noticed on lwmon5 (PPC440EPx) using the common EHCI driver, when "usb reset" is issued multiple times. Upon the 2nd (and further) "usb reset" command, the command fails with the following messages: => usb reset (Re)start USB... USB: Register 1111 NbrPorts 1 USB EHCI 1.00 scanning bus for devices... 5 USB Device(s) found scanning bus for storage devices... 2 Storage Device(s) found => usb reset (Re)start USB... USB: EHCI fail to reset Error, couldn't init Lowlevel part This patch fixes this problem. Now "usb reset" can be called multiple times. Signed-off-by: Stefan Roese <sr@denx.de> Cc: Remy Bohmer <linux@bohmer.net>
| * | usb: Add WATCHDOG_RESET call to polling loopStefan Roese2010-11-26-0/+2
| | | | | | | | | | | | | | | | | | | | | | | | This watchdog reset call is needed here, otherwise the lwmon5 board (PPC440EPx based) will reset upon the "usb reset" command. Signed-off-by: Stefan Roese <sr@denx.de> Cc: Remy Bohmer <linux@bohmer.net>
| * | usb: fix for USB_ST_STALLED status reporting in ehci_submit_async()Anatolij Gustschin2010-11-26-0/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Checking the status field of the qTD token in the current code do not take into acount cases where endpoint stall (halted) bit is set together with XactErr status bit. As a result clearing stall on an endpoint won't be done if this status bit was also set. Check for halted bit and report USB_ST_STALLED status if the host controller also indicates endpoit stall condition. Signed-off-by: Anatolij Gustschin <agust@denx.de>
* | | Merge branch 'master' of git://git.denx.de/u-boot-armWolfgang Denk2010-11-26-25/+82
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| * | mmc: omap: timeout counter fixNishanth Menon2010-11-19-25/+82
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Having a loop with a counter is no timing guarentee for timing accuracy or compiler optimizations. For e.g. the same loop counter which runs when the MPU is running at 600MHz will timeout in around half the time when running at 1GHz. or the example where GCC 4.5 compiles with different optimization compared to GCC 4.4. use timer to keep track of time elapse and we use an emperical number - 1sec for a worst case timeout. This should never happen, and is adequate imaginary condition for us to fail with timeout. Signed-off-by: Nishanth Menon <nm@ti.com> Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
* | | Merge branch 'master' of /home/wd/git/u-boot/custodiansWolfgang Denk2010-11-19-70/+94
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| * | | GRETH: removed space in network driver device name.Daniel Hellstrom2010-11-18-2/+2
| | | | | | | | | | | | | | | | Signed-off-by: Daniel Hellstrom <daniel@gaisler.com>
| * | | GRETH: fixed 2 decriptor table typosDaniel Hellstrom2010-11-18-2/+2
| | | | | | | | | | | | | | | | Signed-off-by: Daniel Hellstrom <daniel@gaisler.com>
| * | | GRETH: Added extra RESET, this is needed if GRETH was stopped during an ↵Daniel Hellstrom2010-11-18-0/+10
| | | | | | | | | | | | | | | | | | | | | | | | ethernet frame reception. Signed-off-by: Daniel Hellstrom <daniel@gaisler.com>
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