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* ls102xa: esdhc: Add esdhc support for LS102xAWang Huan2014-09-08-2/+2
| | | | | | | | | | | For LS1, esdhc is big-endian IP. Accessing the registers should be in big-endian mode. So we use esdhc_read32() to read Host controller capabilities register for LS1. For LS1, when using CMD12, cmdtype need to be set to ABORT, otherwise, next read command will hang. Signed-off-by: Alison Wang <alison.wang@freescale.com>
* ls102xa: etsec: Add etsec support for LS102xAAlison Wang2014-09-08-0/+7
| | | | | | | | | This patch is to add etsec support for LS102xA. First, Little-endian descriptor mode should be enabled. So RxBDs and TxBDs are interpreted with little-endian byte ordering. Second, TSEC_SIZE and TSEC_MDIO_OFFSET are different from PowerPC, redefine them for LS1021xA. Signed-off-by: Alison Wang <alison.wang@freescale.com>
* net: mdio: Use mb() to be compatible for both ARM and PowerPCAlison Wang2014-09-08-3/+6
| | | | | | | Use mb() instead of sync assembly instruction to be compatible for both ARM and PowerPC. Signed-off-by: Alison Wang <alison.wang@freescale.com>
* net: Merge asm/fsl_enet.h into fsl_mdio.hClaudiu Manoil2014-09-08-6/+2
| | | | | | | | | | | | | | | fsl_enet.h defines the mapping of the usual MII management registers, which are included in the MDIO register block common to Freescale ethernet controllers. So it shouldn't depend on the CPU architecture but it should be actually part of the arch independent fsl_mdio.h. To remove the arch dependency, merge the content of asm/fsl_enet.h into fsl_mdio.h. Some files (like fm_eth.h) were simply including fsl_enet.h only for phy.h. These were updated to include phy.h instead. Signed-off-by: Claudiu Manoil <claudiu.manoil@freescale.com>
* ls102xa: i2c: Add i2c support for LS102xAWang Huan2014-09-08-2/+2
| | | | | | | | | | | The existing i.MX's I2C driver mxc_i2c.c is compatible with the controller of LS102xA. As I2C's registers are 8-bit on LS102xA, I2C_QUIRK_REG is enabled to use 8-bit driver. This patch is to add I2C 1,2,3 support for LS102xA. Signed-off-by: Alison Wang <alison.wang@freescale.com>
* arm: ls102xa: Add Freescale LS102xA SoC supportWang Huan2014-09-08-1/+1
| | | | | | | | | | | | | | | | | | The QorIQ LS1 family is built on Layerscape architecture, the industry's first software-aware, core-agnostic networking architecture to offer unprecedented efficiency and scale. Freescale LS102xA is a set of SoCs combines two ARM Cortex-A7 cores that have been optimized for high reliability and pack the highest level of integration available for sub-3 W embedded communications processors with Layerscape architecture and with a comprehensive enablement model focused on ease of programmability. Signed-off-by: Alison Wang <alison.wang@freescale.com> Signed-off-by: Jason Jin <jason.jin@freescale.com> Signed-off-by: Jingchang Lu <jingchang.lu@freescale.com> Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com>
* USB: gadget: s3c: get rid of debug compile warningBo Shen2014-09-02-8/+8
| | | | | | | | | | When enable debug option to compile, it will give the following warning, this patch is used to get rid of it. --->8--- warning: 'flags' is used uninitialized in this function [-Wuninitialized] ---8<--- Signed-off-by: Bo Shen <voice.shen@atmel.com>
* USB: gadget: atmel: get rid of debug compile warningBo Shen2014-09-02-6/+6
| | | | | | | | | | When enable debug option to compile, it will give the following warning, this patch is used to get rid of it. --->8--- warning: 'flags' is used uninitialized in this function [-Wuninitialized] ---8<--- Signed-off-by: Bo Shen <voice.shen@atmel.com>
* usb: ci_udc: implement dfu_usb_get_resetStephen Warren2014-09-02-0/+7
| | | | | | | | This allows the USB code to determine whether a USB bus reset was issued, which in turn allows the code to differentiate between a detach (return to shell prompt) and a board reset/reboot request. Signed-off-by: Stephen Warren <swarren@nvidia.com>
* udc: dfu: s3c_udc: Provide function to check if USB reset was assertedLukasz Majewski2014-09-02-0/+5
| | | | | | | | | | | New dfu_usb_get_reset() method is necessary to distinct two different use cases of dfu-util program. This method checks if the USB bus reset has been really performed after DFU DETACH. Without this function the previous DFU behavior is preserved. Signed-off-by: Lukasz Majewski <l.majewski@samsung.com>
* dfu: Provide means to find difference between dfu-util -e and -RLukasz Majewski2014-09-02-6/+27
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This commit provides distinction between DFU device detach and reset. The -R behavior is preserved with proper handling of the dfu-util's -e switch, which detach the DFU device. By running dfu-util -e; one can force device to finish the execution of dfu command on target and execute some other scripted commands. Moreover, some naming has been changed - the dfu_reset() method now is known as dfu_detach(). New name better reflects the purpose of the code. It was also necessary to increase the number of usb_gadget_handle_interrupts() calls since we also must wait for detection of the USB reset event. Example usage: 1. -e (detach) switch dfu-util -a0 -D file1.bin;dfu-util -a3 -D uImage;dfu-util -e access to u-boot prompt. 2. -R (reset) switch dfu-util -a0 -D file1.bin;dfu-util -R -a3 -D uImage target board reset Signed-off-by: Lukasz Majewski <l.majewski@samsung.com> Reviewed-by: Stephen Warren <swarren@nvidia.com> Tested-by: Stephen Warren <swarren@nvidia.com>
* Merge branch 'master' of git://git.denx.de/u-boot-niosTom Rini2014-08-31-3/+143
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| * serial: move nios2-yanu.h into opencores_yanu driverThomas Chou2014-08-30-1/+86
| | | | | | | | | | | | | | | | | | The nios2-yanu.h contains hardware registers and bits of opencores yanu. As there is no other user of this header , it should be moved into the driver. Signed-off-by: Thomas Chou <thomas@wytron.com.tw> CC: Renato Andreola <renato.andreola@imagos.it>
| * nios2: divide nios2-io.h into each specific drivers and remove itThomas Chou2014-08-30-2/+57
| | | | | | | | | | | | | | | | | | | | The nios2-io.h defines hardware registers and bits of several FPGA IP cores. It could be divided in to the specific drivers, including altera timer, altera sysid, altera uart and altera jtag uart. The altera pio and altera spi drivers use their own hardware definitions. The removal of nios2-io.h will help modularity and maintenance. Signed-off-by: Thomas Chou <thomas@wytron.com.tw>
* | arm/kirkwood/nand: allow forced disabling for subpage writesHolger Brunck2014-08-30-0/+3
| | | | | | | | | | | | | | | | | | | | Make it configurable to disable subpage writes like the DaVinci NAND driver already does. Signed-off-by: Holger Brunck <holger.brunck@keymile.com> cc: Valentin Longchamp <valentin.longchamp@keymile.com> cc: Prafulla Wadaskar <prafulla@marvell.com> cc: Scott Wood <scottwood@freescale.com>
* | arm: bcm281xx: net: Add Ethernet DriverJiandong Zheng2014-08-30-0/+1535
| | | | | | | | | | | | | | | | | | | | | | The Broadcom StarFighter2 Ethernet driver is used in multiple Broadcom SoC(s) and: - supports multiple MAC blocks, - provides support for the Broadcom GMAC. This driver requires MII and PHYLIB. Signed-off-by: Jiandong Zheng <jdzheng@broadcom.com> Signed-off-by: Steve Rae <srae@broadcom.com>
* | socfpga: cleanup socfpga_dw_mmcPavel Machek2014-08-30-4/+4
| | | | | | | | | | | | | | Cleanups as suggested by wd on mailing list. Signed-off-by: Pavel Machek <pavel@denx.de> Acked-by: Chin Liang See <clsee@altera.com>
* | socfpga: fix clock manager register definitionPavel Machek2014-08-29-2/+2
|/ | | | | | | | | Structure defining clock manager hardware was wrong, leading to wrong registers being accessed and hang in MMC init. This fixes structure to match hardware. Signed-off-by: Pavel Machek <pavel@denx.de>
* Merge branch 'master' of git://www.denx.de/git/u-boot-imxTom Rini2014-08-29-5/+201
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| * pci: mx6: fix occasional link failuresTim Harvey2014-08-20-4/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | According to the IMX6 reference manuals, REF_SSP_EN (Reference clock enable for SS function) must remain deasserted until the reference clock is running at the appropriate frequency. Without this patch we find a high link failure rate (>5%) on certain IMX6 boards at various temperatures. Signed-off-by: Tim Harvey <tharvey@gateworks.com> Acked-by: Marek Vasut <marex@denx.de> Reviewed-by: Fabio Estevam <fabio.estevam@freescale.com>
| * Merge branch 'master' of git://git.denx.de/u-boot-armStefano Babic2014-08-11-45/+1056
| |\ | | | | | | | | | | | | | | | | | | Conflicts: boards.cfg Signed-off-by: Stefano Babic <sbabic@denx.de>
| * | pmic: pmic_pfuze100: Use a shorter name for PMIC nameFabio Estevam2014-08-08-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | It is redundant to use 'PFUZE100_PMIC' as the PMIC name because we already know it is a PMIC. Call it simply 'PFUZE100' instead. Cc: Tim Harvey <tharvey@gateworks.com> Cc: Markus Niebel <Markus.Niebel@tq-group.com> Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
| * | Merge branch 'master' of git://git.denx.de/u-boot-armStefano Babic2014-08-08-353/+1286
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| * | | spi: add config option to enable the WP pin function on st micron flashesHeiko Schocher2014-07-23-0/+34
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | enable the W#/Vpp signal to disable writing to the status register on ST MICRON flashes like the N25Q128 thorugh the new config option CONFIG_SYS_SPI_ST_ENABLE_WP_PIN Signed-off-by: Heiko Schocher <hs@denx.de> Cc: Jagannadha Sutradharudu Teki <jagannadh.teki@gmail.com>
| * | | pwm, imx6: add support for pwm modul on imx6Heiko Schocher2014-07-23-0/+162
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | add basic support for the pwm modul found on imx6. Pieces of this code are based on linux code from drivers/pwm/pwm-imx.c Commit "cd3de83f1476 Linux 3.16-rc4" Signed-off-by: Heiko Schocher <hs@denx.de> Acked-by: Stefano Babic <sbabic@denx.de> Cc: Wolfgang Denk <wd@denx.de>
* | | | net: cpsw: am335x: Drop constant link checking from rx/tx path'sStefan Roese2014-08-28-18/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | We noticed on the DXR2 platform (AM335x with a SMSC LAN9303 switch connected to the CPSW MAC) that the network performance in U-Boot is quite poor. Only when the transfer is started without a cable connected, and the cable is plugged after the first timeout "T" occured, an increased in performance can be seen. Debugging has revealed, that the cpsw driver has constant link checking builtin into the rx and tx functions. This results in the bad performance and seems to be unnecessary. The link has already been checked in the init function, before the transfer is started. This usually is sufficient. BTW: I have seen no other network driver in U-Boot so far, that constantly checks for link in the rx / tx functions. The performance numbers on the DXR2 board are: 0.56 MiB/s cpsw_check_link() in rx and tx path 0.87 MiB/s cpsw_check_link() only in tx path 1.0 MiB/s cpsw_check_link() only in rx path 2.7 MiB/s no cpsw_check_link() in rx and tx path So with this patch the network performance on DXR2 increases from 0.56 to 2.7 MiB/s (nearly 5 times as fast). Signed-off-by: Stefan Roese <sr@denx.de> Tested-by: Samuel Egli <samuel.egli@siemens.com> Tested-by: Heiko Schocher <hs@denx.de> Cc: Vladimir Koutny <vladimir.koutny@streamunlimited.com> Cc: Mugunthan V N <mugunthanvnm@ti.com> Cc: Joe Hershberger <joe.hershberger@gmail.com> Cc: Tom Rini <trini@ti.com>
* | | | Merge branch 'master' of git://git.denx.de/u-boot-armTom Rini2014-08-28-0/+218
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| * | | Merge branch 'u-boot-sunxi/master' into 'u-boot-arm/master'Albert ARIBAUD2014-08-09-0/+218
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| | * | | sunxi: add USB EHCI driverRoman Byshko2014-07-31-0/+202
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The Allwinner aka sunxi SoCs have one or more USB host controllers. This adds a driver for their EHCI. Signed-off-by: Roman Byshko <rbyshko@gmail.com> Acked-by: Marek Vasut <marex@denx.de> Signed-off-by: Hans de Goede <hdegoede@redhat.com>
| | * | | ahci: provide sunxi SATA driver using AHCI platform frameworkIan Campbell2014-07-31-0/+16
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This enables the necessary clocks, in AHB0 and in PLL6_CFG. This is done for sun7i only since I don't have access to any other sunxi platforms with sata included. The PHY setup is derived from the Alwinner releases and Linux, but is mostly undocumented. The Allwinner AHCI controller also requires some magic (and, again, undocumented) DMA initialisation when starting a port. This is added under a suitable ifdef. This option is enabled for Cubieboard, Cubieboard2 and Cubietruck based on contents of Linux DTS files, including SATA power pin config taken from the DTS. All build tested, but runtime tested on Cubieboard2 and Cubietruck only. Signed-off-by: Ian Campbell <ijc@hellion.org.uk> Acked-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Hans de Goede <hdegoede@redhat.com>
* | | | | mtd,ubi,ubifs: sync with linux v3.15Heiko Schocher2014-08-25-47/+206
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | snyc with linux v3.15: commit 1860e379875dfe7271c649058aeddffe5afd9d0d Author: Linus Torvalds <torvalds@linux-foundation.org> Date: Sun Jun 8 11:19:54 2014 -0700 Linux 3.15 Signed-off-by: Heiko Schocher <hs@denx.de> Cc: Scott Wood <scottwood@freescale.com> Cc: Tom Rini <trini@ti.com>
* | | | | mtd, ubi, ubifs: update for the sync with linux v3.14Heiko Schocher2014-08-25-0/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | while playing with the new mtd/ubi/ubifs sync, found some small updates for it: - add del_mtd_partition() to include/linux/mtd/mtd - mtd: add a debug_printf - remove some not used functions Signed-off-by: Heiko Schocher <hs@denx.de> Cc: Scott Wood <scottwood@freescale.com> Cc: Tom Rini <trini@ti.com>
* | | | | mtd, ubi, ubifs: resync with Linux-3.14Heiko Schocher2014-08-25-4438/+10961
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | resync ubi subsystem with linux: commit 455c6fdbd219161bd09b1165f11699d6d73de11c Author: Linus Torvalds <torvalds@linux-foundation.org> Date: Sun Mar 30 20:40:15 2014 -0700 Linux 3.14 A nice side effect of this, is we introduce UBI Fastmap support to U-Boot. Signed-off-by: Heiko Schocher <hs@denx.de> Signed-off-by: Tom Rini <trini@ti.com> Cc: Marek Vasut <marex@denx.de> Cc: Sergey Lapin <slapin@ossfans.org> Cc: Scott Wood <scottwood@freescale.com> Cc: Joerg Krause <jkrause@posteo.de>
* | | | | lib, linux: move linux specific defines to linux/compat.hHeiko Schocher2014-08-25-68/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | - move linux specific defines from usb and video code into linux/compat.h - move common linux specific defines from include/ubi_uboot.h to linux/compat.h - add for new mtd/ubi/ubifs sync new needed linux specific defines to linux/compat.h Signed-off-by: Heiko Schocher <hs@denx.de> Cc: Marek Vasut <marex@denx.de> Cc: Anatolij Gustschin <agust@denx.de> [trini: Add spin_lock_irqsave/spin_unlock_irqrestore dummies from usb/lin_gadet_compat.h] Signed-off-by: Tom Rini <trini@ti.com>
* | | | | Merge branch 'agust@denx.de' of git://git.denx.de/u-boot-stagingTom Rini2014-08-25-2/+3
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| * | | | | RTC: add support for DS1339 (using DS1307 driver)Markus Niebel2014-08-14-1/+2
| | | | | | | | | | | | | | | | | | | | | | | | Signed-off-by: Markus Niebel <Markus.Niebel@tq-group.com>
| * | | | | driver/qe: update status of QE microcodevijay rai2014-08-14-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This Patch updates error print for QE which should be easily understood Signed-off-by: Vijay Rai <vijay.rai@freescale.com>
| * | | | | pci: fix overflow in __pci_hose_bus_to_phys w/ large RAMStephen Warren2014-08-14-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | If a 32-bit system has 2GB of RAM, and the base address of that RAM is 2GB, then start+size will overflow a 32-bit value (to a value of 0). To avoid such an overflow, convert __pci_hose_bus_to_phys() to calculate the offset of a bus address into a PCI region, rather than comparing a bus address against the end of a PCI region. Signed-off-by: Stephen Warren <swarren@nvidia.com>
* | | | | | e1000: add i210 supportMarek Vasut2014-08-21-27/+180
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add i210 support to the e1000 driver. Signed-off-by: Marek Vasut <marex@denx.de> Acked-by: Tim Harvey <tharvey@gateworks.com>
* | | | | | e1000: Implement dcache supportMarek Vasut2014-08-21-22/+49
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Implement proper support for cache flushing and invalidation into the Intel e1000 NIC driver. Signed-off-by: Marek Vasut <marex@denx.de> Acked-by: Tim Harvey <tharvey@gateworks.com>
* | | | | | powerpc: mpc8xx: remove svm_sc8xx boardMasahiro Yamada2014-08-21-4/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This board has been orphaned for a while and old enough. Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
* | | | | | omap: remove omap5912osk board supportMasahiro Yamada2014-08-21-1507/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Emails to the board maintainer "Rishi Bhattacharya <rishi@ti.com>" have been bouncing. Tom suggested to remove this board. Remove also omap1510_udc.c because this is the last board to enable it. Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com> Suggested-by: Tom Rini <trini@ti.com>
* | | | | | drivers: net: remove dead driversMasahiro Yamada2014-08-21-459/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The following configs are not defined at all: - CONFIG_INCA_IP_SWITCH - CONFIG_PBL2800_ETHER - CONFIG_PHY_ICPLUS Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
* | | | | | Merge branch 'master' of git://git.denx.de/u-boot-mpc85xxTom Rini2014-08-20-1/+6
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| * | | | | powerpc/T4240QDS/eth: some fix for XFIShaohui Xie2014-08-20-0/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | XFI is supported on T4QDS-XFI board, which removed slot3, and four LANEs of serdes2 are routed to a SFP+ cages, which to house fiber cable or direct attach cable(copper), the copper cable is used to emulate the 10GBASE-KR scenario. So, for XFI usage, there are two scenarios, one will use fiber cable, another will use copper cable. For fiber cable, there is NO PHY, while for copper cable, we need to use internal PHY which exist in Serdes to do auto-negotiation and link training, which implemented in kernel. We use hwconfig to define cable type for XFI, and fixup dtb based on the cable type. For copper cable, set below env in hwconfig: fsl_10gkr_copper:<10g_mac_name> the <10g_mac_name> can be fm1_10g1, fm1_10g2, fm2_10g1, fm2_10g2. The four <10g_mac_name>s do not have to be coexist in hwconfig. For XFI ports, if a given 10G port will use the copper cable for 10GBASE-KR, set the <10g_mac_name> of the port in hwconfig, otherwise, fiber cable will be assumed to be used for the port. For ex. if four XFI ports will both use copper cable, the hwconfig should contain: fsl_10gkr_copper:fm1_10g1,fm1_10g2,fm2_10g1,fm2_10g2 For fiber cable: 1. give PHY address to a XFI port, otherwise, the XFI ports will not be available in U-boot, there is no PHY physically for XFI when using fiber cable, this is just to make U-boot happy and we can use the XFI ports in U-boot. 2. fixup dtb to use fixed-link in case of fiber cable which has no PHY. Kernel requests that a MAC must have a PHY or fixed-link. When using XFI protocol, the MAC 9/10 on FM1 should init as 10G interface. Change serdes 2 protocol 56 to 55 which has same feature as 56 since 56 is not valid any longer. Signed-off-by: Shaohui Xie <Shaohui.Xie@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
| * | | | | driver/qe: update status of QE microcodeVijay Rai2014-08-20-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This Patch updates error print for QE which should be easily understood Signed-off-by: Vijay Rai <vijay.rai@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
* | | | | | video: ipu_disp: squash clang warningJeroen Hofstee2014-08-11-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Since rgb2ycbcr_coeff and friends are declared const, but assigned to a void pointer, clang will warn that the const is implicity casted away. If the pointer is changed to void const * gcc will warn when it is implicitly casted to a const int array. Just add a correctly typed pointer instead to prevent these casts and hence the warnings. Cc: Troy Kisky <troy.kisky@boundarydevices.com> Cc: Stefano Babic <sbabic@denx.de> Signed-off-by: Jeroen Hofstee <jeroen@myspectrum.nl>
* | | | | | video: ipu_disp: wait for DP SF end irq when disabling sync BG flowsLiu Ying2014-08-11-19/+19
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Instead of waiting for DC triple buffer to be cleared, this patch changes to wait for a relevant DP sync flow end interrupt to come when disabling sync BG flows. In this way, we align the implement to the freescale internal IPUv3 driver. After applying this patch, an uboot hang up issue at the arch_preboot_os() stage, where we disable a relevant ipu display channel, is not observed any more on some MX6DL platforms. Signed-off-by: Liu Ying <Ying.Liu@freescale.com>
* | | | | | video: Add support for TI's AM335x LCD-ControllerHannes Petermaier2014-08-10-0/+237
|/ / / / / | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | - Adds support for a minimal framebuffer driver of TI's AM335x SoC to be compatible with Wolfgang Denk's LCD-Framework (CONFIG_LCD, common/lcd.c) Signed-off-by: Hannes Petermaier <oe5hpm@oevsv.at>
* | | | | omap: clean-up dead configsMasahiro Yamada2014-08-09-230/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The following configs are not defined at all. - CONFIG_OMAP1510 - CONFIG_OMAP_1510P1 - CONFIG_OMAP_SX1 - CONFIG_OMAP3_DMA - CONFIG_OMAP3_ZOOM2 - CONFIG_OMAP_INNOVATOR Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com> Cc: Tom Rini <trini@ti.com>
generated by cgit v1.1 at 2024-12-21 13:47:37 +0000