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* VIDEO: MX5: Switch MX5 to CONFIG_VIDEOStefano Babic2011-10-17-74/+36
| | | | | | | | | | | | | | | | | The framebuffer driver for MX5 is based on CONFIG_LCD. In the current implementation, there is a serious bug because the required memory is allocated before relocation, but the driver knows only later which is the resolution of the display. The patch switches the driver to CONFIG_VIDEO and the memory is allocated by the driver itself. We also need to switch the vision2 board code and config file in the same commit so that this commit will be bisectable. Signed-off-by: Stefano Babic <sbabic@denx.de> CC: Anatolij Gustschin <agust@denx.de> Tested-by: Stefano Babic <sbabic@denx.de> Signed-off-by: Anatolij Gustschin <agust@denx.de>
* video: update the Freescale DIU driver to use linux/fb.hTimur Tabi2011-10-17-49/+5
| | | | | | | | Update the Freescale DIU video driver (fsl_diu_fb.c) to use linux/fb.h. Some data structures from this header file were just copied into fsl_diu_fb.c. Signed-off-by: Timur Tabi <timur@freescale.com>
* pci: move pcidelay code to new location just before PCI bus scanAnatolij Gustschin2011-10-15-13/+17
| | | | | | | | | | | | | | | | | | | | PCI cards might need some time after reset to respond. On some boards (mpc5200 or mpc8260 based) the PCI bus reset is deasserted at pci_init_board() time, so we currently can not use available "pcidelay" option for waiting before PCI bus scan since this waiting takes place before calling pci_init_board(). By moving the pcidelay code to the new location using of the "pcidelay" option is possible on mpc5200 or mpc8260 based boards, too. Since pci_hose_scan() could be called multiple times, restrict the function to wait only during its first call and to ignore pcidelay for any further call (as pointed out by Matthias). Signed-off-by: Anatolij Gustschin <agust@denx.de> Cc: Matthias Fuchs <matthias.fuchs@esd.eu> Acked-by: Stefan Roese <sr@denx.de> Acked-by: Matthias Fuchs <matthias.fuchs@esd.eu> Tested-by: Matthias Fuchs <matthias.fuchs@esd.eu>
* net: axi_ethernet: Add driver to u-bootMichal Simek2011-10-15-0/+665
| | | | | | | | | | Add axi_ethernet driver for little-endian Microblaze. RX/TX BDs and rxframe buffer are shared among all axi_ethernet MACs. Only one MAC can work in one time. Signed-off-by: Michal Simek <monstr@monstr.eu> Acked-by: Mike Frysinger <vapier@gentoo.org>
* net: emaclite: Fix coding styleMichal Simek2011-10-15-30/+27
| | | | | | Coding style should follow linux coding style. Signed-off-by: Michal Simek <monstr@monstr.eu>
* net: emaclite: Use PKTSIZE directlyMichal Simek2011-10-15-6/+4
| | | | | | Do not setup additional ENET_MAX_MTU macro. Signed-off-by: Michal Simek <monstr@monstr.eu>
* net: emaclite: Setup RX/TX ping pong for every instanceMichal Simek2011-10-15-55/+68
| | | | | | | Setup RX/TX ping-pong buffer for every emaclite IP separately. The next patch move initialization directly to board code. Signed-off-by: Michal Simek <monstr@monstr.eu>
* phylib: wait for TN2020 to achieve SERDES lane alignment at startupTimur Tabi2011-10-13-0/+33
| | | | | | | | | | Before the Teranetics TN2020 PHY can be used, the SERDES lanes need to be aligned, so wait for lane alignment before completing the startup sequence. Note that this process can take up to three seconds. Signed-off-by: Timur Tabi <timur@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* powerpc/p3060: remove all references to RCW bits EC1_EXT, EC2_EXT, and EC3Timur Tabi2011-10-13-17/+0
| | | | | | | | The EC1_EXT, EC2_EXT, and EC3 bits in the RCW don't officially exist on the P3060 and should always be set to zero. Signed-off-by: Timur Tabi <timur@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* Merge branch 'master' of git://git.denx.de/u-boot-mipsWolfgang Denk2011-10-12-0/+262
|\ | | | | | | | | | | | | * 'master' of git://git.denx.de/u-boot-mips: MIPS: Jz4740: Add qi_lb60 board support MIPS: Jz4740: Add NAND driver MIPS: Ingenic XBurst Jz4740 processor support
| * MIPS: Jz4740: Add NAND driverXiangfu Liu2011-10-12-0/+262
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Jz4740 NAND flash controller can support: * MLC NAND as well as SLC NAND * all 8-bit/16-bit NAND flash devices * HAMMING and RS hardware ECC * automatic boot up from NAND flash devices nand_ecclayout is set up for 2GiB NAND chip mounted in Qi LB60. We'll bring up boot-from-NAND support in nand_spl/ in the future. Signed-off-by: Xiangfu Liu <xiangfu@openmobilefree.net> Acked-by: Daniel <zpxu@ingenic.cn> Signed-off-by: Shinya Kuribayashi <skuribay@pobox.com>
* | Merge branch 'master' of git://git.denx.de/u-boot-ubiWolfgang Denk2011-10-12-6/+6
|\ \ | | | | | | | | | | | | | | | * 'master' of git://git.denx.de/u-boot-ubi: UBI: init eba tables before wl when attaching a device ubifs bad superblock bug
| * | UBI: init eba tables before wl when attaching a deviceHolger Brunck2011-10-12-6/+6
| |/ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This fixes that u-boot gets stuck when a bitflip was detected during "ubi part <ubi_device>". If a bitflip was detected UBI tries to copy the PEB to a different place. This needs that the eba table are initialized, but this was done after the wear levelling worker detects the bitflip. So changes the initialisation of these two tasks in u-boot. This is a u-boot specific patch and not needed in the linux layer, because due to commit 1b1f9a9d00447d UBI: Ensure that "background thread" operations are really executed we schedule these tasks in place and not as in linux after the inital task which schedule this new task is finished. Signed-off-by: Holger Brunck <holger.brunck@keymile.com> cc: Stefan Roese <sr@denx.de> Signed-off-by: Stefan Roese <sr@denx.de>
* | Merge branch 'master' of git://git.denx.de/u-boot-nand-flashWolfgang Denk2011-10-12-13/+13
|\ \ | | | | | | | | | | | | * 'master' of git://git.denx.de/u-boot-nand-flash: NAND: davinci: choose correct 1-bit h/w ECC reg
| * | NAND: davinci: choose correct 1-bit h/w ECC regLaurence Withers2011-10-10-13/+13
| |/ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | In nand_davinci_readecc(), select the correct NANDF<n>ECC register based on CONFIG_SYS_NAND_CS rather than hardcoding the choice of NANDF1ECC. This allows 1-bit hardware ECC to work with chip select other than CS2. Note this now matches the usage in nand_davinci_enable_hwecc(), which already had the correct handling, and allows refactoring to a single function encapsulating the register read. Without this fix, writing NAND pages to a chip not wired to CS2 would result in in the ECC calculation always returning FFFFFF for each 512-byte segment, and reading back a correctly written page (one with ECC intact) would always fail. With this fix, the ECC is written and verified correctly. Signed-off-by: Laurence Withers <lwithers@guralp.com> Signed-off-by: Scott Wood <scottwood@freescale.com>
* | fsl_sata: Fix compile error when CONFIG_LBA48 is not definedTang Yuantian2011-10-09-5/+10
| | | | | | | | | | | | | | | | If CONFIG_LBA48 is not defined, the element lba48 of struct sata_dev_desc is not avaible, and can't be used. Signed-off-by: Tang Yuantian <b29983@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* | powerpc/85xx: fix null pointer dereference when init the SGMII TBI PHYTimur Tabi2011-10-09-2/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Function dtsec_configure_serdes() needs to know where the TBI PHY registers are in order to configure SGMII for proper SerDes operation. During SGMII initialzation, fm_eth_init_mac() passing NULL for 'phyregs' when it called init_dtsec(), because it was believed that phyregs was not used. In fact, it is used by dtsec_configure_serdes() to configure the TBI PHY registers. We also need to define the PHY registers in struct fm_mdio. Signed-off-by: Timur Tabi <timur@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* | phylib: Work around bug in Teranetics PHYAndy Fleming2011-10-09-1/+20
|/ | | | | | | | | | | The Teranetics PHY does not properly report the link state for fiber connections. The new PHY code actually checked the link, and so the FM driver would refuse to talk over a linkless PHY. But the link may actually be up, so now we always report it as up for fiber connections on the tn2020. Signed-off-by: Andy Fleming <afleming@freescale.com>
* drivers/usb/host/ohci-hcd.c: fix warning: variable ... set but not usedWolfgang Denk2011-10-09-2/+1
| | | | | | | | | | Fix: ohci-hcd.c: In function 'dl_transfer_length': ohci-hcd.c:968:8: warning: variable 'tdINFO' set but not used [-Wunused-but-set-variable] Signed-off-by: Wolfgang Denk <wd@denx.de> Cc: Remy Bohmer <linux@bohmer.net> Acked-by: Remy Bohmer <linux@bohmer.net>
* drivers/net/smc91111.c: fix warning: variable ... set but not usedWolfgang Denk2011-10-09-8/+0
| | | | | | | | | Fix: smc91111.c: In function 'smc_phy_configure': smc91111.c:1194:6: warning: variable 'failed' set but not used [-Wunused-but-set-variable] smc91111.c:1190:7: warning: variable 'phyaddr' set but not used [-Wunused-but-set-variable] Signed-off-by: Wolfgang Denk <wd@denx.de>
* CFI: fix warning: variable ... set but not usedWolfgang Denk2011-10-09-0/+4
| | | | | | | | | | | | | | | Fix: cfi_mtd.c: In function 'cfi_mtd_init': cfi_mtd.c:226:19: warning: variable 'mtd_list' set but not used [-Wunused-but-set-variable] cfi_mtd.c: In function 'cfi_mtd_init': cfi_mtd.c:225:6: warning: unused variable 'devices_found' cfi_mtd.c: In function 'cfi_mtd_init': cfi_mtd.c:226:19: warning: variable 'mtd_list' set but not used [-Wunused-but-set-variable] [-Wunused-variable] Signed-off-by: Wolfgang Denk <wd@denx.de> Cc: Stefan Roese <sr@denx.de> Acked-by: Stefan Roese <sr@denx.de>
* netconsole: support packets longer than 512 bytesMichael Walle2011-10-09-4/+7
| | | | | | | | Esp. while printing the environment the output is usually longer than 512 bytes. Instead of cutting the message, send multiple 512 bytes packets. Signed-off-by: Michael Walle <michael@walle.cc> Acked-by: Mike Frysinger <vapier@gentoo.org>
* serial: uartlite: Support for SERIAL_MULTIMichal Simek2011-10-09-19/+121
| | | | | | Add support for SERIAL MULTI for uartlite. Signed-off-by: Michal Simek <monstr@monstr.eu>
* net: drop !NET_MULTI codeMike Frysinger2011-10-05-11/+2
| | | | | | | | | | | This is long over due. All but two net drivers have been converted, but those have now been dropped. The only thing left to do is actually delete all references to NET_MULTI and code that is compiled when that is not defined. So here we scrub the core code. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
* net: drop !NET_MULTI ns7520 driverMike Frysinger2011-10-05-851/+0
| | | | | | | This driver was never converted to NET_MULTI, and no board uses it. So punt it and be done. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
* net: drop !NET_MULTI bcm570x/tigon3 driversMike Frysinger2011-10-05-12876/+0
| | | | | | | | | | | These drivers have never been converted to NET_MULTI, and they are only used by one board (BMW). So drop the drivers until someone feels like rewriting them for NET_MULTI support. Rather than punting the BMW board completely, just disable net support in its board config. Seems to build fine without it. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
* PPC: Cleanup tqm8xx_pcmcia.cMarek Vasut2011-10-05-73/+81
| | | | | | Signed-off-by: Marek Vasut <marek.vasut@gmail.com> Tested-by: Wolfgang Denk <wd@denx.de> Acked-by: Wolfgang Denk <wd@denx.de>
* Merge branch 'master' of git://git.denx.de/u-boot-nand-flashWolfgang Denk2011-10-04-72/+41
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | * 'master' of git://git.denx.de/u-boot-nand-flash: PPC: Fix socrates NAND problem PPC: Fix fsl_upm.c by renaming nand handling functions NAND: Make page, erase, oob size available via cmd_nand mtd: eLBC NAND: remove elbc_fcm_ctrl->oob_poi NAND: Add -y option to nand scrub command NAND: Add nand read.raw and write.raw commands NAND: Really ignore bad blocks when scrubbing spl, nand: add 4bit HW ecc oob first nand_read_page function mxc_nand: fix a problem writing more than 32MB mxc_nand: fixed some typos (cosmetic) nand: increase chip_delay in mv kirkwood nand driver
| * PPC: Fix fsl_upm.c by renaming nand handling functionsMarek Vasut2011-10-03-8/+8
| | | | | | | | | | | | | | | | This avoids colision with nand subsystem's functions. Signed-off-by: Marek Vasut <marek.vasut@gmail.com> Cc: Scott Wood <scottwood@freescale.com> Signed-off-by: Scott Wood <scottwood@freescale.com>
| * mtd: eLBC NAND: remove elbc_fcm_ctrl->oob_poimhench2011-10-03-30/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | The eLBC NAND driver currently follows up each program/write operation with a read-back of the page, in order to [ostensibly] fill in ECC data for the caller. However, the page address used for this read is always -1, so the read will never work correctly. Remove this useless (and potentially problematic) block of code. v2: fix broken mailer Signed-off-by: mhench <mhench@elutions.com> Signed-off-by: Scott Wood <scottwood@freescale.com>
| * NAND: Really ignore bad blocks when scrubbingMarek Vasut2011-10-03-22/+9
| | | | | | | | | | | | | | | | | | | | Signed-off-by: Marek Vasut <marek.vasut@gmail.com> Cc: Scott Wood <scottwood@freescale.com> Cc: Stefano Babic <sbabic@denx.de> Cc: Wolfgang Denk <wd@denx.de> Cc: Detlev Zundel <dzu@denx.de> [scottwood@freescale.com: use chip instead of redundant priv_nand] Signed-off-by: Scott Wood <scottwood@freescale.com>
| * mxc_nand: fix a problem writing more than 32MBHelmut Raiger2011-10-03-1/+12
| | | | | | | | | | | | | | | | | | | | | | | | | | | | When writing 0x4000 to the unlockend_blkaddr register, large writes to a 2k page NAND sometimes fail. The current kernel driver writes 0xFFFF to this register for V2 of the nand controller. However on an i.MX31 this also fixes writes larger than 32MB. The datasheet is very unspecific, but (0x4000=16384)*2000 roughly fits the limits we're encountering with NAND writes. This problem might be NAND chip specific. Signed-off-by: Helmut Raiger <helmut.raiger@hale.at> Signed-off-by: Scott Wood <scottwood@freescale.com>
| * mxc_nand: fixed some typos (cosmetic)Helmut Raiger2011-10-03-10/+9
| | | | | | | | | | Signed-off-by: Helmut Raiger <helmut.raiger@hale.at> Signed-off-by: Scott Wood <scottwood@freescale.com>
| * nand: increase chip_delay in mv kirkwood nand driverStefan Bigler2011-10-03-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | The new SAMSUNG NAND Flash K9F1G08U0D require a bigger chip_delay. The Data Transfer from Cell to Register is >= 35us. Other Vendors and older chips normally use >= 25us. To have enough margin 40us is selected. Signed-off-by: Stefan Bigler <stefan.bigler@keymile.com> Signed-off-by: Holger Brunck <holger.brunck@keymile.com> cc: Prafulla Wadaskar <prafulla@marvell.com> cc: Stefan Roese <sr@denx.de> Signed-off-by: Scott Wood <scottwood@freescale.com>
* | Merge branch 'master' of git://git.denx.de/u-boot-mpc85xxWolfgang Denk2011-10-04-3/+3236
|\ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | * 'master' of git://git.denx.de/u-boot-mpc85xx: powerpc/p3060: Add SoC related support for P3060 platform powerpc/85xx: Add support for setting up RAID engine liodns on P5020 powerpc/85xx: Refactor some defines out of corenet_ds.h fm-eth: Add ability for board code to disable a port powerpc/mpc8548: Add workaround for erratum NMG_LBC103 powerpc/mpc8548: Add workaround for erratum NMG_DDR120 powerpc/mpc85xxcds: Fix PCI speed powerpc/mpc8548cds: Fix booting message powerpc/p4080: Add support for secure boot flow powerpc/85xx: Add Secure Boot support on P1010RDB for NOR, NAND & SPIFLASH powerpc/85xx: Add PBL & SECUREBOOT support on P3041/P5020DS boards powerpc/p2041rdb: remove watch dog related codes powerpc/p2041rdb: updated description of cpld command powerpc/p2041rdb: add more ddr frequencies support powerpc/p2041rdb: set sysclk according to status of physical switch SW1 powerpc/p2041rdb: update cpld reset command according to CPLD 2.0 powerpc/mpc8349emds: Migrate from spd_sdram to unified DDR driver powerpc/mpc83xx: Migrate from spd_sdram to unified DDR driver powerpc/mpc8xxx: Add DDR2 to unified DDR driver powerpc/mpc8xxx: Fix picos_to_mclk() and get_memory_clk_period_ps() powerpc/mpc8xxx: Add SPD EEPROM address for single controller 2 slots powerpc/mpc8xxx: Fix DDR code for empty first DIMM slot and enable DQS_en powerpc/85xx: Refactor P2041RDB to use common p_corenet files powerpc/85xx: refactor common P-Series CoreNet files for FSL boards powerpc/85xx: Enable CMD_REGINFO on corenet boards powerpc/85xx: p2041rdb - Remove unused 'execute' perm in TLB entries powerpc/85xx: Fix USB protocol definitions for P1020RDB powerpc/corenet_ds: Use separated speed tables for UDIMM and RDIMM powerpc/mpc8xxx: Move DDR RCW overriding to common code powerpc/mpc8xxx: Extend CWL table powerpc/85xx: Cleanup how SVR_MAJ() is defined on MPC8536 powerpc/85xx: Cleanup extern in corenet_ds board code powerpc/p2041rdb: Add ethernet support on P2041RDB board powerpc/85xx: Add networking support to P1023RDS powerpc/hydra: Add ethernet support on P5020/P3041 DS boards powerpc/85xx: Add FMan ethernet support to P4080DS powerpc/85xx: Add support for FMan ethernet in Independent mode powerpc/mpc8548cds: Cleanup mpc8548cds.c powerpc/mp: add support for discontiguous cores powerpc/85xx: corenet_ds - Remove unused 'execute' perm in TLB entries fdt: Add new fdt_create_phandle helper fdt: Rename fdt_create_phandle to fdt_set_phandle powerpc/85xx: Fix compile warnings/errors if CONFIG_SYS_DPAA_FMAN isn't set fsl_ifc: Add the workaround for erratum IFC A-003399(enabled on P1010) powerpc/P1010: Add workaround for erratum P1010-A003549 (related to IFC) fsl_ifc: Add the workaround for erratum IFC-A002769 (enable on P1010) powerpc/85xx: Expanding the window of CCSRBAR in AS=1 from 4k to 1M powerpc/85xx: Add NAND/NAND_SPL support to P1010RDB nand: Freescale Integrated Flash Controller NAND support powerpc/85xx: Add basic support for P1010RDB powerpc/85xx: Add support for new P102x/P2020 RDB style boards powerpc/85xx: relocate CCSR before creating the initial RAM area powerpc/85xx: introduce and document CONFIG_SYS_CCSRBAR macros powerpc/85xx: Enable internal USB UTMI PHY on p204x/p3041/p50x0 powerpc/85xx: Add ULPI and UTMI USB Phy support for P1010/P1014
| * | powerpc/p3060: Add SoC related support for P3060 platformShengzhou Liu2011-10-03-0/+110
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add P3060 SoC specific information:cores setup, LIODN setup, etc The P3060 SoC combines six e500mc Power Architecture processor cores with high-performance datapath acceleration architecture(DPAA), CoreNet fabric infrastructure, as well as network and peripheral interfaces. Signed-off-by: Shengzhou Liu <Shengzhou.Liu@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
| * | fm-eth: Add ability for board code to disable a portKumar Gala2011-10-03-0/+27
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The SoC configuration may have more ports enabled than a given board actually can utilize. Add a routinue that allows the board code to disable a port that it knows isn't being used. fm_disable_port() needs to be called before cpu_eth_init(). Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
| * | powerpc/85xx: Add support for FMan ethernet in Independent modeKumar Gala2011-09-29-0/+2212
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The Frame Manager (FMan) on QorIQ SoCs with DPAA (datapath acceleration architecture) is the ethernet contoller block. Normally it is utilized via Queue Manager (Qman) and Buffer Manager (Bman). However for boot usage the FMan supports a mode similar to QE or CPM ethernet collers called Independent mode. Additionally the FMan block supports multiple 1g and 10g interfaces as a single entity in the system rather than each controller being managed uniquely. This means we have to initialize all of Fman regardless of the number of interfaces we utilize. Different SoCs support different combinations of the number of FMan as well as the number of 1g & 10g interfaces support per Fman. We add support for the following SoCs: * P1023 - 1 Fman, 2x1g * P4080 - 2 Fman, each Fman has 4x1g and 1x10g * P204x/P3041/P5020 - 1 Fman, 5x1g, 1x10g Signed-off-by: Dave Liu <daveliu@freescale.com> Signed-off-by: Andy Fleming <afleming@freescale.com> Signed-off-by: Timur Tabi <timur@freescale.com> Signed-off-by: Roy Zang <tie-fei.zang@freescale.com> Signed-off-by: Dai Haruki <dai.haruki@freescale.com> Signed-off-by: Kim Phillips <kim.phillips@freescale.com> Signed-off-by: Ioana Radulescu <ruxandra.radulescu@freescale.com> Signed-off-by: Lei Xu <B33228@freescale.com> Signed-off-by: Mingkai Hu <Mingkai.hu@freescale.com> Signed-off-by: Scott Wood <scottwood@freescale.com> Signed-off-by: Shaohui Xie <b21989@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
| * | nand: Freescale Integrated Flash Controller NAND supportDipen Dudhat2011-09-29-0/+851
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add NAND support (including spl) on IFC, such as is found on the p1010. Note that using hardware ECC on IFC with small-page NAND (which is what comes on the p1010rdb reference board) means there will be insufficient OOB space for JFFS2, since IFC does not support 1-bit ECC. UBI should work, as it does not use OOB for anything but ECC. When hardware ECC is not enabled in CSOR, software ECC is now used. Signed-off-by: Dipen Dudhat <Dipen.Dudhat@freescale.com> [scottwood@freescale.com: ECC rework and misc fixes] Signed-off-by: Scott Wood <scottwood@freescale.com>
| * | powerpc/85xx: Add ULPI and UTMI USB Phy support for P1010/P1014Ramneek Mehresh2011-09-29-3/+36
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add UTMI and ULPI PHY support for USB controller on qoriq series of processors with internal UTMI PHY implemented, for example P1010/P1014 - Use both getenv() and hwconfig to get USB phy type till getenv() is depricated - Introduce CONFIG_SYS_FSL_USB_INTERNAL_UTMI_PHY to specify if soc has internal UTMI phy Signed-off-by: Ramneek Mehresh <ramneek.mehresh@freescale.com> Acked-by: Remy Bohmer <linux@bohmer.net> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* | | Merge branch 'master' of git://git.denx.de/u-boot-i2cWolfgang Denk2011-10-04-19/+25
|\ \ \ | | | | | | | | | | | | | | | | | | | | * 'master' of git://git.denx.de/u-boot-i2c: I2C: mv_i2c: fix multi-bus init issue I2C: mv_i2c: fix build issue when enable debug option
| * | | I2C: mv_i2c: fix multi-bus init issueLei Wen2011-10-03-18/+24
| | | | | | | | | | | | | | | | | | | | | | | | | | | | When enable the multi-bus, the current_bus is not inited in the original implementation, which make the i2c operation unpredicatable. Signed-off-by: Lei Wen <leiwen@marvell.com>
| * | | I2C: mv_i2c: fix build issue when enable debug optionLei Wen2011-10-03-1/+1
| | |/ | |/| | | | | | | | | | | | | | | | | | | | | | | | | | | | When DEBUG_I2C is open, the following build issue would shows up. mv_i2c.c: In function 'i2c_transfer': mv_i2c.c:257: error: 'ISR' undeclared (first use in this function) mv_i2c.c:257: error: (Each undeclared identifier is reported only once mv_i2c.c:257: error: for each function it appears in.) Signed-off-by: Lei Wen <leiwen@marvell.com>
* | | net: emaclite: Use dynamic allocationMichal Simek2011-10-03-16/+25
| | | | | | | | | | | | | | | | | | | | | Every emaclite instance use own setting. Signed-off-by: Michal Simek <monstr@monstr.eu> Acked-by: Mike Frysinger <vapier@gentoo.org>
* | | net: emaclite: Remove baseaddress from xemacliteMichal Simek2011-10-03-21/+21
| | | | | | | | | | | | | | | | | | Use dev->iobase instead of baseaddress. Signed-off-by: Michal Simek <monstr@monstr.eu>
* | | net: emaclite: Use calloc instead of mallocMichal Simek2011-10-03-2/+1
| | | | | | | | | | | | | | | | | | | | | Simplify driver logic and clear eth_device structure in one command. Signed-off-by: Michal Simek <monstr@monstr.eu>
* | | net: emaclite: Remove deviceid propertyMichal Simek2011-10-03-1/+0
| | | | | | | | | | | | | | | | | | Cleanup structure. Signed-off-by: Michal Simek <monstr@monstr.eu>
* | | net: emaclite: Change driver name and add addressMichal Simek2011-10-03-1/+1
|/ / | | | | | | | | | | | | | | | | Current xilinx emaclite use net multi registration but doesn't support several emaclites interfaces. Changing driver name with adding address to name is the first step how to distiguish several drivers. Signed-off-by: Michal Simek <monstr@monstr.eu>
* | GCC4.6: Squash warning in vmt.cMarek Vasut2011-10-01-4/+7
| | | | | | | | | | | | | | | | | | vmt.c: In function ‘ubi_free_volume’: vmt.c:681:6: warning: variable ‘err’ set but not used [-Wunused-but-set-variable] Signed-off-by: Marek Vasut <marek.vasut@gmail.com> Acked-by: Mike Frysinger <vapier@gentoo.org>
* | GCC4.6: Squash warning in nand_bbt.cMarek Vasut2011-10-01-4/+1
| | | | | | | | | | | | | | | | | | nand_bbt.c: In function ‘search_bbt’: nand_bbt.c:465:6: warning: variable ‘bits’ set but not used [-Wunused-but-set-variable] Signed-off-by: Marek Vasut <marek.vasut@gmail.com> Cc: Scott Wood <scottwood@freescale.com>
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