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* powerpc/boot: Change the macro of Boot from SRIO and PCIE master moduleLiu Gang2013-06-20-3/+3
| | | | | | | | | | | | | | | | | Currently, the macro "CONFIG_SYS_FSL_SRIO_PCIE_BOOT_MASTER" can enable the master module of Boot from SRIO and PCIE on a platform. But this is not a silicon feature, it's just a specific booting mode based on the SRIO and PCIE interfaces. So it's inappropriate to put the macro into the file arch/powerpc/include/asm/config_mpc85xx.h. Change the macro "CONFIG_SYS_FSL_SRIO_PCIE_BOOT_MASTER" to "CONFIG_SRIO_PCIE_BOOT_MASTER", remove them from arch/powerpc/include/asm/config_mpc85xx.h file, and add those macros in configuration header file of each board which can support the master module of Boot from SRIO and PCIE. Signed-off-by: Liu Gang <Gang.Liu@freescale.com> Signed-off-by: Andy Fleming <afleming@freescale.com>
* powerpc/mpc85xx: new SPL support for IFC NANDPrabhakar Kushwaha2013-06-20-0/+259
| | | | | | | | | | | | | | Linker script is not able find start.o binary. So add its absolute path in u-boot-spl.lds. This change is similar to u-boot-nand.lds common/Makefile: Avoid compiling unnecssary files fsl_ifc_spl.c : It is is responsible for reading u-boot binary from NAND flash and copying into DDR. It also transfer control from NAND SPL to u-boot image present in DDR. Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com> Signed-off-by: Andy Fleming <afleming@freescale.com>
* Merge branch 'master' of git://www.denx.de/git/u-boot-mmcTom Rini2013-06-14-17/+74
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| * mmc: report capacity for the selected partitionStephen Warren2013-06-13-7/+61
| | | | | | | | | | | | | | | | | | | | | | | | | | Enhance the MMC core to calculate the size of each MMC partition, and update mmc->capacity whenever a partition is selected. This causes: mmc dev 0 1 ; mmcinfo ... to report the size of the currently selected partition, rather than always reporting the size of the user partition. Signed-off-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Andy Fleming <afleming@freescale.com>
| * fsl_esdhc: Do not clear interrupt status bits until data processedAndrew Gabbasov2013-06-13-4/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | After waiting for the command completion event, the interrupt status bits, that occured to be set by that time, are cleared by writing them back. It is supposed, that it should be command related bits (command complete and may be command errors). However, in some cases the DMA already completes by that time before the full transaction completes. The corresponding DINT bit gets set and then cleared before even entering the loop, waiting for data part completion. That waiting loop never gets this bit set, causing the operation to hang. This is reported to happen, for example, for write operation of 1 sector to upper area (block #7400000) of SanDisk Ultra II 8GB card. The solution could be to explicitly clear only command related interrupt status bits. However, since subsequent processing does not rely on any command bits state, it could be easier just to remove clearing of any bits at that point, leaving them all until all data processing completes. After that the whole register will be cleared at once. Also, on occasion, interrupts masking moved to before writing the command, just for the case there should be no chance of interrupt between the first command and interrupts masking. Reported-by: Dirk Behme <dirk.behme@de.bosch.com> Signed-off-by: Andrew Gabbasov <andrew_gabbasov@mentor.com> Acked-by: Dirk Behme <dirk.behme@de.bosch.com> Signed-off-by: Andy Fleming <afleming@freescale.com>
| * mmc: fsl_esdhc: Fix hang after 'save' commandFabio Estevam2013-06-13-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | Since commit 48e0b2bd (powerpc/esdhc: Correct judgement for DATA PIO mode) we see mx6 systems to hang after doing a 'save' command. Revert this commit since the original 'ifdef' logic from 7b43db92 (drivers/mmc/fsl_esdhc.c: fix compiler warnings) was the correct one. Reported-by: Tapani Utriainen <tapani@technexion.com> Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> Signed-off-by: Andy Fleming <afleming@freescale.com>
| * mmc write bug fixRuud Commandeur2013-06-13-3/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch fixes a bug related to mmc writes. When doing fatwrites on an SD-Card, MMC bus problems can occur. Depending on the size of the file, "MMC0: Bus busy timeout!" is reported, resulting in an SD-Card that is no longer responding. It appears to be, that set_cluster can be called with a size being zero. That can be with a file that has a size being an exact multiple (including 0) of the clustersize, but also for files that are smaller than the size of one cluster. The same problem occurs if the "mmc write" command is given with a block count being 0. By adding a check for the block count being zero in mmc_write_blocks (drivers/mmc.c), this problem is solved. Signed-off-by: Ruud Commandeur <rcommandeur@clb.nl> Cc: Tom Rini <trini@ti.com> Cc: Benoît Thébaudeau <benoit.thebaudeau@advansee.com> Cc: Mats Karrman <Mats.Karrman@tritech.se> Cc: Andy Fleming <afleming@gmail.com> Signed-off-by: Andy Fleming <afleming@freescale.com>
| * mmc: sdhci: Enable 8-bit bus width only for 3.0 spec onwardsJagannadha Sutradharudu Teki2013-06-13-2/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | CAP register don't have any information for 8-bit buswidth support on 2.0 sdhci spec, only from 3.0 onwards bit[18] got this information. Due to this misassignment in sdhci, mmc is setting 8-bit buswidth using mmc_set_bus_width even if controller doesn't support. Below change has code information. "mmc: Properly determine maximum supported bus width" (sha1: 7798f6dbd5e1a3030ed81a81da5dfb57c3307cac) Bug log: <mmc plus and emmc cards) ------- zynq-uboot> mmcinfo Error detected in status(0x208100)! Device: zynq_sdhci Manufacturer ID: fe ..... So enable 8-bit support only for 3.0 spec using CAP and for below 3.0 assign mmc->host_caps = MMC_MODE_8BIT on respective platform driver if host have a support. Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com> Signed-off-by: Andy Fleming <afleming@freescale.com>
* | Merge branch 'master' of git://git.denx.de/u-boot-spiTom Rini2013-06-13-38/+99
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| * | sf: winbond: Correct the nr_blocks used for W25Q32DWJagannadha Sutradharudu Teki2013-06-13-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch corrected the nr_blocks used for W25Q32DW SPI flash. nr_blcoks are incorrectly assigned on below patch "sf: winbond: add W25Q32DW" (sha1: 772ba15474f73adc942e817cc072b6e9750836cc) Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
| * | sf: winbond: Add support for W25Q80BWJagannadha Sutradharudu Teki2013-06-13-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add support for Winbond W25Q80BW SPI flash. This patch corrected the flash name, nr_blocks and also commit message header from below patch. "sf: winbond: add W25Q32" (sha1: c969abc47033d6f810d3c9dbdb994ea9d691d038) Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
| * | sf: spansion: Update the name for S25FL256S flashJagannadha Sutradharudu Teki2013-06-13-1/+1
| | | | | | | | | | | | | | | | | | | | | As the per the ID tabl the flash is under Uniform 64-kB sector architecture, hence updated with proper name. Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
| * | spi: tegra20_sflash: Remove redundant code to set bus and cs of struct spi_slaveAxel Lin2013-06-13-2/+0
| | | | | | | | | | | | | | | | | | | | | | | | It's done in spi_alloc_slave(), thus remove the redundant code. Signed-off-by: Axel Lin <axel.lin@ingics.com> Acked-by: Marek Vasut <marex@denx.de> Reviewed-by: Jagannadha Sutradharudu Teki <jagannadh.teki@gmail.com>
| * | spi: tegra114_spi: Convert to use spi_alloc_slave()Axel Lin2013-06-13-3/+1
| | | | | | | | | | | | | | | | | | Signed-off-by: Axel Lin <axel.lin@ingics.com> Acked-by: Marek Vasut <marex@denx.de> Reviewed-by: Jagannadha Sutradharudu Teki <jagannadh.teki@gmail.com>
| * | spi: armada100_spi: Remove unnecessary NULL test for dout and dinAxel Lin2013-06-13-9/+2
| | | | | | | | | | | | | | | | | | | | | Signed-off-by: Axel Lin <axel.lin@ingics.com> Reviewed-by: Marek Vasut <marex@denx.de> Acked-by: Ajay Bhargav <ajay.bhargav@einfochips.com> Reviewed-by: Jagannadha Sutradharudu Teki <jagannadh.teki@gmail.com>
| * | cmd_sf: Add print mesgs on sf read/write commandsJagannadha Sutradharudu Teki2013-06-03-3/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | This patch adds a print messages while using 'sf read' and 'sf write' commands to make sure that how many bytes read/written from/into flash device. Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com> Acked-by: Tom Rini <trini@ti.com>
| * | cmd_sf: Add print mesg for 'sf erase' commandJagannadha Sutradharudu Teki2013-06-03-5/+2
| | | | | | | | | | | | | | | | | | | | | | | | This patch adds a print messages while using 'sf erase' command to make sure that how many bytes erased in flash device. Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com> Acked-by: Tom Rini <trini@ti.com>
| * | sf: Fix sf read for memory-mapped SPI flashesJagannadha Sutradharudu Teki2013-06-03-1/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Missing return after memcpy is done for memory-mapped SPI flashes, hence added retun 0 after memcpy done. The return is missing in below patch "sf: Enable FDT-based configuration and memory mapping" (sha1: bb8215f437a7c948eec82a6abe754c226978bd6d) Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com> Acked-by: Simon Glass <sjg@chromium.org>
| * | spi: exynos: Support SPI_PREAMBLE modeRajeshwari Shinde2013-06-03-10/+59
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Support interfaces with a preamble before each received message. We handle this when the client has requested a SPI_XFER_END, meaning that we must close of the transaction. In this case we read until we see the preamble (or a timeout occurs), skipping all data before and including the preamble. The client will receive only data bytes after the preamble. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Rajeshwari Shinde <rajeshwari.s@samsung.com> Reviewed-by: Jagannadha Sutradharudu Teki <jagannadh.teki@gmail.com>
| * | sf: winbond: Add support for W25PXX SPI flashKuo-Jung Su2013-05-28-1/+16
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add support for Winbond's W25PXX SPI flash. These devices is used on Faraday A369 evaluation board. Signed-off-by: Kuo-Jung Su <dantesu@faraday-tech.com> CC: Jagannadha Sutradharudu Teki <jagannadh.teki@gmail.com> CC: Tom Rini <trini@ti.com> Reviewed-by: Jagannadha Sutradharudu Teki <jagannadh.teki@gmail.com>
| * | sf: winbond: Add support for W25Q256Jagannadha Sutradharudu Teki2013-05-28-0/+5
| | | | | | | | | | | | | | | | | | | | | Add support for Winbond W25Q256 SPI flash. Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com> Reviewed-by: Jagannadha Sutradharudu Teki <jagannadh.teki@gmail.com>
| * | sf: spansion: Add Spansion S25FL064P IDsMarek Vasut2013-05-28-0/+7
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This is a S25FL064A successor. It supports up to 104MHz bus speed. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Heiko Schocher <hs@denx.de> Cc: Mike Frysinger <vapier@gentoo.org> Cc: Scott Wood <scottwood@freescale.com> Cc: Wolfgang Denk <wd@denx.de> Reviewed-by: Jagannadha Sutradharudu Teki <jagannadh.teki@gmail.com>
* | | Merge branch 'master' of git://git.denx.de/u-boot-armTom Rini2013-06-13-229/+572
|\ \ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Small conflict over DRA7XX updates and adding SRAM_SCRATCH_SPACE_ADDR Conflicts: arch/arm/include/asm/arch-omap5/omap.h Signed-off-by: Tom Rini <trini@ti.com>
| * | | ARM: OMAP: I2C: New read, write and probe functionsLubomir Popov2013-06-10-191/+299
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | New i2c_read, i2c_write and i2c_probe functions, tested on OMAP4 (4430/60/70), OMAP5 (5430) and AM335X (3359); should work on older OMAPs and derivatives as well. The only anticipated exception would be the OMAP2420, which shall require driver modification. - Rewritten i2c_read to operate correctly with all types of chips (old function could not read consistent data from some I2C slaves). - Optimised i2c_write. - New i2c_probe, performs write access vs read. The old probe could hang the system under certain conditions (e.g. unconfigured pads). - The read/write/probe functions try to identify unconfigured bus. - Status functions now read irqstatus_raw as per TRM guidelines (except for OMAP243X and OMAP34XX). - Driver now supports up to I2C5 (OMAP5). Signed-off-by: Lubomir Popov <lpopov@mm-sol.com> Tested-by: Heiko Schocher <hs@denx.de>
| * | | arm: Remove OMAP2420H4 and all omap24xx supportTom Rini2013-06-10-10/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The omap2420H4 was the only mainline omap24xx board. Prior to being fixed by Jon Hunter in time for v2013.04 it had been functionally broken for a very long time. Remove this board as there's not been interest in it in U-Boot for quite a long time. Signed-off-by: Tom Rini <trini@ti.com>
| * | | ARM: OMAP5: Power: Add more functionality to Palmas driverLubomir Popov2013-06-10-12/+121
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add some useful functions, and the corresponding definitions. Add support for powering on the dra7xx_evm SD/MMC LDO (courtesy Lokesh Vutla <lokeshvutla@ti.com>). Signed-off-by: Lubomir Popov <lpopov@mm-sol.com> Reviewed-by: Tom Rini <trini@ti.com>
| * | | mmc: omap_hsmmc: Update pbias programmingBalaji T K2013-06-10-11/+9
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Update pbias programming sequence for OMAP5 ES2.0/DRA7 Signed-off-by: Balaji T K <balajitk@ti.com> Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
| * | | ARM: OMAP4+: Cleanup header filesLokesh Vutla2013-06-10-1/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | After having the u-boot clean up series, there are many definitions that are unused in header files. Removing all those unused ones. Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
| * | | Merge branch 'u-boot-imx/master' into 'u-boot-arm/master'Albert ARIBAUD2013-06-08-4/+140
| |\ \ \ | | | | | | | | | | | | | | | | | | | | Conflicts: drivers/serial/Makefile
| | * | | arm: vf610: Add uart support for Vybrid VF610Alison Wang2013-06-03-0/+133
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch adds lpuart support for Vybrid VF610 platform. Signed-off-by: TsiChung Liew <tsicliew@gmail.com> Signed-off-by: Alison Wang <b18965@freescale.com>
| | * | | arm: vf610: Add watchdog support for Vybrid VF610Alison Wang2013-06-03-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch adds watchdog support for Vybrid VF610 platform. Signed-off-by: Alison Wang <b18965@freescale.com>
| | * | | net: fec_mxc: Add support for Vybrid VF610Alison Wang2013-06-03-3/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch adds FEC support for Vybrid VF610 platform. In function fec_open(), RCR register is only set as RGMII mode. But RCR register should be set as RMII mode for VF610 platform. This configuration is already done in fec_reg_setup(), so this piece of code could just leave untouched the FEC_RCNTRL_RGMII / FEC_RCNTRL_RMII / FEC_RCNTRL_MII_MODE bits. Signed-off-by: Alison Wang <b18965@freescale.com> Reviewed-by: Benoit Thebaudeau <benoit.thebaudeau@advansee.com> Reviewed-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com>
| | * | | video: mxsfb: Add an entry for mx23evk/mx28vk video modesFabio Estevam2013-05-16-0/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Currently the mxsfb driver takes the display timings from the 'videomode' environment variable. Provide an example on how to set 'videomode' for using splash screen on mx23evk and mx28vk boards. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> Tested-by: Marek Vasut <marex@denx.de>
* | | | | usb, composite: after unregister gadget driver set composite to NULLHeiko Schocher2013-06-12-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Without this, second usb_composite_register() call fails always with -EINVAL. Signed-off-by: Heiko Schocher <hs@denx.de> Cc: Lukasz Majewski <l.majewski@samsung.com> Cc: Kyungmin Park <kyungmin.park@samsung.com> Cc: Marek Vasut <marex@denx.de>
* | | | | usb: ehci: add missing cache managmentStephen Warren2013-06-12-0/+30
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Commit 8f62ca6 "usb: ehci: Support interrupt transfers via periodic list" didn't include any cache management in the new interrupt transfer path. It also added an extra write to or_asynclistaddr in usb_lowlevel_init(), without having flushed out the data there. Add the missing cache management calls, so that the code works again. This allows the USB keyboard on Tegra's Seaboard/Springbank boards to work. Cc: Patrick Georgi <patrick@georgi-clan.de> Cc: Vincent Palatin <vpalatin@chromium.org> Cc: Julius Werner <jwerner@chromium.org> Cc: Simon Glass <sjg@chromium.org> Cc: Marek Vasut <marex@denx.de> Signed-off-by: Stephen Warren <swarren@nvidia.com>
* | | | | usb: gadget: add Faraday FOTG210 USB gadget supportKuo-Jung Su2013-06-12-0/+957
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The Faraday FOTG210 is an OTG chip which could operate as either an EHCI Host or a USB Device at a time. Signed-off-by: Kuo-Jung Su <dantesu@faraday-tech.com> CC: Marek Vasut <marex@denx.de>
* | | | | usb: ehci: add Faraday USB 2.0 EHCI supportKuo-Jung Su2013-06-12-0/+154
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch adds support to both Faraday FUSBH200 and FOTG210, the differences between Faraday EHCI and standard EHCI are listed bellow: 1. The PORTSC starts at 0x30 instead of 0x44. 2. The CONFIGFLAG(0x40) is not only un-implemented, and also has its address space removed. 3. Faraday EHCI is a TDI design, but it doesn't compatible with the general TDI implementation found at both U-Boot and Linux. 4. The ISOC descriptors differ from standard EHCI in several ways. But since U-boot doesn't support ISOC, we don't have to worry about that. Signed-off-by: Kuo-Jung Su <dantesu@faraday-tech.com> CC: Marek Vasut <marex@denx.de>
* | | | | usb: ehci: add weak-aliased function for PORTSCKuo-Jung Su2013-06-12-4/+13
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | There is at least one non-EHCI compliant controller (i.e. Faraday EHCI) not only leave RESERVED and CONFIGFLAG registers un-implemented but also has their address spaces removed. As an result, the PORTSC register of Faraday EHCI always starts from 0x30 instead of 0x44 in standard EHCI. So that we'll need a weak-aliased function for abstraction. Signed-off-by: Kuo-Jung Su <dantesu@faraday-tech.com> CC: Marek Vasut <marex@denx.de>
* | | | | usb: ehci: prevent bad PORTSC register accessKuo-Jung Su2013-06-12-5/+15
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | 1. The 'index' of ehci_submit_root() is not always > 0. e.g. While it gets invoked from usb_get_descriptor(), the 'index' is always a '0'. (See ch.9 of USB2.0) 2. The PORTSC register is not always required, and thus it should only report a port error when necessary. It would cause a port scan failure if the ehci_submit_root() always gets terminated by a port error. Signed-off-by: Kuo-Jung Su <dantesu@faraday-tech.com> CC: Marek Vasut <marex@denx.de>
* | | | | usb: gadget: Use unaligned access for wMaxPacketSizeVivek Gautam2013-06-12-7/+9
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Use get_unaligned() while fetching wMaxPacketSize to avoid voilating any alignment rules. Signed-off-by: Vivek Gautam <gautam.vivek@samsung.com> Cc: Lukasz Majewski <l.majewski@samsung.com> Cc: Piotr Wilczek <p.wilczek@samsung.com> Cc: Kyungmin Park <kyungmin.park@samsung.com> Cc: Lukasz Dalek <luk0104@gmail.com> Cc: Marek Vasut <marex@denx.de>
* | | | | usb: asix: Move software resets to basic_initJulius Werner2013-06-12-23/+17
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The ASIX driver calls a basic_init() function during get_info(), so that not all initialization tasks need to be redone on every init(). Unfortunately, the most important one is still triggered too often: the driver does a full port and MII reset on every asix_init(), requiring up to several seconds to reestablish the link. This patch confines that software reset into the asix_basic_init() function so that it will only be executed once. This saves about a second of boot time on systems using BOOTP. Note: this patch was previously submitted many moons ago as: usb: usbeth: asix: Do a fast init if link already established That patch seens to have been lost or forgotten, so this is a rebased version. It is tested on snow with a Asix USB dongle (Cisco). Signed-off-by: Julius Werner <jwerner@chromium.org> Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Vadim Bendebury <vbendeb@chromium.org>
* | | | | usb: Correct CLEAR_FEATURE code in ehci-hcdSimon Glass2013-06-12-4/+6
| |_|_|/ |/| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This commit broke USB2 on link (Chromebook Pixel): 020bbcb usb: hub: Power-cycle on root-hub ports However the root cause seems to be a missing mask and missing 'break' in ehci-hcd.c. This patch fixes both. On link, 'usb start' with a USB keyboard and memory stick inserted now finds both. The keyboard works as expected. Also ext2ls shows a directory listing from the memory stick. Signed-off-by: Simon Glass <sjg@chromium.org>
* | | | pci: introduce CONFIG_PCI_INDIRECT_BRIDGE optionGabor Juhos2013-06-07-1/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The pci_indirect.c file is always compiled when CONFIG_PCI is defined although the indirect PCI bridge support is not needed by every board. Introduce a new CONFIG_PCI_INDIRECT_BRIDGE config option and only compile indirect PCI bridge support if this options is enabled. Also add the new option into the configuration files of the boards which needs that. Compile tested for powerpc, x86, arm and nds32. MAKEALL results: powerpc: --------------------- SUMMARY ---------------------------- Boards compiled: 641 Boards with warnings but no errors: 2 ( ELPPC MPC8323ERDB ) ---------------------------------------------------------- Note: the warnings for ELPPC and MPC8323ERDB are present even without the actual patch. x86: --------------------- SUMMARY ---------------------------- Boards compiled: 1 ---------------------------------------------------------- arm: --------------------- SUMMARY ---------------------------- Boards compiled: 311 ---------------------------------------------------------- nds32: --------------------- SUMMARY ---------------------------- Boards compiled: 3 ---------------------------------------------------------- Cc: Tom Rini <trini@ti.com> Cc: Daniel Schwierzeck <daniel.schwierzeck@googlemail.com> Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
* | | | Merge branch 'master' of git://git.denx.de/u-boot-videoTom Rini2013-06-07-6/+9
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| * | | | cfb_console: flush FB cache at end of public functionsEric Nelson2013-05-06-6/+9
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Removed internal cache_flush operations and placed a flush of the entire frame-buffer at the end of each public function. Signed-off-by: Eric Nelson <eric.nelson@boundarydevices.com> Signed-off-by: Anatolij Gustschin <agust@denx.de>
* | | | | Merge branch 'master' of git://git.denx.de/u-boot-nand-flashTom Rini2013-06-07-0/+2
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| * | | | | bug, nand, am33xx: nand->ecc.strength not set in board_nand_init()Sergey Lapin2013-06-04-0/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | commit dfe64e2c89731a3f9950d7acd8681b68df2bae03 Author: Sergey Lapin <slapin@ossfans.org> Date: Mon Jan 14 03:46:50 2013 +0000 mtd: resync with Linux-3.7.1 Introduced runtime bug: U-Boot 2013.04-00499-g46567df-dirty (Jun 04 2013 - 08:17:08) I2C: ready DRAM: 512 MiB WARNING: Caches not enabled NAND: BUG: failure at nand_base.c:3214/nand_scan_tail()! BUG! resetting ... on boards using drivers/mtd/nand/omap_gpmc.c as in board_nand_init() nand->ecc.strength is not set. Fix this! Signed-off-by: Heiko Schocher <hs@denx.de> Cc: Sergey Lapin <slapin@ossfans.org> Cc: Scott Wood <scottwood@freescale.com> Cc: Tom Rini <trini@ti.com>
* | | | | | input: Finish simplifing key_matrix_decode_fdt()Stephen Warren2013-06-06-2/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | [trini: Applied v1 of the series rather than v2, this commit is the delta from v1 to v2] Signed-off-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Tom Rini <trini@ti.com>
* | | | | | Merge branch 'tpm' of git://git.denx.de/u-boot-x86Tom Rini2013-06-05-280/+462
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| * | | | | | tpm: Reorganize the I2C TPM driverTom Wai-Hong Tam2013-06-03-268/+383
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch does a similar code reogranzation from http://patchwork.ozlabs.org/patch/132179/ which is based on an old version of code (fdt support and bus selection still not in). It merges this tidy-up on top of the recent code. It does not make any logical change. tpm.c implements the interface defined in tpm.h based on underlying LPC or I2C TPM driver. tpm.c and the underlying driver communicate throught tpm_private.h. Note: Merging the LPC driver with tpm.c is left to future patches. Change-Id: Ie1384f5f9e3935d3bc9a44adf8de80c5a70a5f2b Signed-off-by: Tom Wai-Hong Tam <waihong@chromium.org> Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
generated by cgit v1.1 at 2024-12-22 23:45:36 +0000