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* usb: gadget: Fix data aborts during USB ethernet bootJoel Fernandes2013-09-24-2/+3
| | | | | | | | | | | | | | As seen on GCC 4.6 Linaro compiler, control_req buffer is not aligned on 4 byte boundaray causing data aborts in eth_setup -> conf_buf during dhcp boot over usb_ether. Fix the issue my aligning control_req buffer using DEFINE_CACHE_ALIGN_BUFFER. Tested on am335x_evm platform (beaglebone). Applies on 2013.10-rc1 branch. Cc: Tom Rini <trini@ti.com> Cc: Marek Vasut <marex@denx.de> Signed-off-by: Joel Fernandes <joelf@ti.com>
* Sound: MAX98095: Support I2S0 channelDani Krishna Mohan2013-09-24-67/+115
| | | | | | | This patch modifies the MAX98095 audio codec to support I2S0 channel in codec slave mode. Signed-off-by: Dani Krishna Mohan <krishna.md@samsung.com>
* Sound: I2S: Replacing I2S1 with I2S0 channel.Dani Krishna Mohan2013-09-24-13/+32
| | | | | | | This patch makes required changes to make use of I2S0 channel instead of I2S1 channel on exynos5250. Signed-off-by: Dani Krishna Mohan <krishna.md@samsung.com>
* ARM: Added I2S0 clocks for audioDani Krishna Mohan2013-09-24-8/+18
| | | | | | | | This patch makes the necessary changes for making use of I2S0 channel instead of I2S1 channel on smdk board. This changes are done to maintain the uniformity to use I2S0 channel. Signed-off-by: Dani Krishna Mohan <krishna.md@samsung.com>
* Sound: WM8994: Support I2S0 channelDani Krishna Mohan2013-09-24-59/+164
| | | | | | | This patch modifies the WM8994 codec to support I2S0 channel in codec slave mode Signed-off-by: Dani Krishna Mohan <krishna.md@samsung.com>
* Merge branch 'master' of git://git.denx.de/u-boot-mmcTom Rini2013-09-20-192/+311
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| * Fix wrong sdhci host control register read and writeJuhyun \(Justin\) Oh2013-09-20-3/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The patch fixes the improper read and write of sdhci host control register for sdma transfer. The problem comes when reading and writing 1 byte long host control register with the sdhci_readl() and sdhci_writel(). The misuse of these functions overwrite the value of the next registers which are in 4 bytes boundary. This patch replaces four byte register read/write functions with one byte read/write ones. Beside, it eliminates unnecessary bit operation. i.e. or-ing zero against a variable. Signed-off-by: Juhyun (Justin) Oh <Juhyun_Oh@sigmadesigns.com>
| * mmc/dw_mmc: Allocate the correct amount of descriptorsMischa Jonker2013-09-20-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | This fixes two issues: * a descriptor was allocated for every block, while a descriptor can take 8 blocks * there was an off-by-one error in the descriptor preparation: there were two last descriptors, one with length==0 Signed-off-by: Mischa Jonker <mjonker@synopsys.com> Cc: Alexey Brodkin <abrodkin@synopsys.com> Cc: Jaehoon Chung <jh80.chung@samsung.com> Cc: Andy Fleming <afleming@gmail.com>
| * mmc/dw_mmc: Fix DMA descriptor corruptionMischa Jonker2013-09-20-3/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | In dwmci_prepare_data, the descriptors are allocated for DMA transfer. These are allocated using the ALLOC_CACHE_ALIGN_BUFFER. This macro uses the stack to allocate these descriptors. This becomes a problem if the DMA transfer continues after the processor leaves the function in which the descriptors were allocated. Therefore, I have moved the allocated of the buffers up one level, to dwmci_send_cmd(). The DMA transfer should be complete when leaving this function. Signed-off-by: Mischa Jonker <mjonker@synopsys.com> Cc: Alexey Brodkin <abrodkin@synopsys.com> Cc: Jaehoon Chung <jh80.chung@samsung.com> Cc: Andy Fleming <afleming@gmail.com> Acked-by: Jaehoon Chung <jh80.chung@samsung.com> Acked-by: Pantelis Antoniou <panto@antoniou-consulting.com>
| * mmc: don't support write & erase for SPL buildsPaul Burton2013-09-20-182/+230
| | | | | | | | | | | | | | | | | | | | For SPL builds this is just dead code since we'll only need to read. Eliminating it results in a significant size reduction for the SPL binary, which may be critical for certain platforms where the binary size is highly constrained. Signed-off-by: Paul Burton <paul.burton@imgtec.com> Acked-by: Pantelis Antoniou <panto@antoniou-consulting.com>
| * mmc: don't call *printf or puts when SPL & !CONFIG_SPL_LIBCOMMON_SUPPORTPaul Burton2013-09-17-0/+36
| | | | | | | | | | | | | | | | If we don't have CONFIG_SPL_LIBCOMMON_SUPPORT defined then stdio & *printf functions are unavailable & calling them will cause a link failure. Signed-off-by: Paul Burton <paul.burton@imgtec.com>
| * ARM: OMAP: Enable 8-bit eMMC access for OMAP4/5/DRA7xxLubomir Popov2013-09-17-3/+14
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Enable 8-bit host capability for HSMMC2 and/or HSMMC3. CONFIG_HSMMC2_8BIT (for OMAP4/5/DRA7xx) and/or CONFIG_HSMMC3_8BIT (for DRA7xx only) must be defined in the board header if an 8-bit eMMC device is connected to the corresponding port. Fix the "No status update" error that appeared for eMMC devices by inserting a 20 us delay between writing arguments and command. This solution has been proposed by Michael Cashwell <mboards@prograde.net>. A minor cosmetic fix in a comment as well. Signed-off-by: Lubomir Popov <lpopov@mm-sol.com>
| * omap_hsmmc: omap4+/am335x: modify MMC controller internal fsm reset funcOleksandr Tyshchenko2013-09-17-0/+24
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | "mmc_send_cmd: timeout: No status update" error sometimes happens in omap_hsmmc driver func mmc_send_cmd() when the MMC controller card identification and selection sequence is executed for eMMC on OMAP4 boards. It happens due to incorrect execution of CMD line reset procedure for OMAP4. Because CMD(DAT) lines reset procedures are slightly different for OMAP3 and OMAP4(AM335x,OMAP5,DRA7xx). According to OMAP3 TRM: Set SRC(SRD) bit in MMCHS_SYSCTL register to 0x1 and wait until it returns to 0x0. According to OMAP4(AM335x,OMAP5,DRA7xx) TRMs, CMD(DATA) lines reset procedure steps must be as follows: 1. Initiate CMD(DAT) line reset by writing 0x1 to SRC(SRD) bit in MMCHS_SYSCTL register (SD_SYSCTL for AM335x). 2. Poll the SRC(SRD) bit until it is set to 0x1. 3. Wait until the SRC(SRD) bit returns to 0x0 (reset procedure is completed). Unfortunately, at present omap_hsmmc driver has support only for OMAP3. And as result step #2 is missing for OMAP4(AM335x,OMAP5,DRA7xx). This sometimes leads to the fact that the waiting loop which is required in step #3 does not executed, because SRC bit does not set yet (at the moment of checking a condition of a loop execution). And as a result this can cause to timeout error when sending a next command. In the particular case (working with eMMC witch do not respond to some SD specific command) due to incorrect reset sequence after command SD_CMD_SEND_IF_COND which finished with CTO flag within 64 clock cycles, the next command MMC_CMD_APP_CMD leads to a timeout error within 1s. So, extend CMD(DATA) lines reset procedure in func mmc_reset_controller_fsm() by adding the missing step #2 for OMAP4+/AM335x boards. Signed-off-by: Oleksandr Tyshchenko <oleksandr.tyshchenko@ti.com> Acked-by: Pantelis Antoniou <panto@antoniou-consulting.com>
| * mmc: Remove unused variable backup from mmc_send_cmd()Oleksandr Tyshchenko2013-09-17-3/+0
| | | | | | | | | | | | | | | | Do not call a memset for unused variable backup every time. Remove unused variable from function. Signed-off-by: Oleksandr Tyshchenko <oleksandr.tyshchenko@ti.com> Acked-by: Pantelis Antoniou <panto@antoniou-consulting.com>
| * mmc: sdhci: use the SDHCI_QUIRK_USE_WIDE8 for samsung SoCJaehoon Chung2013-09-17-7/+10
| | | | | | | | | | | | | | | | | | Samsung SoC is supported the WIDE8, even if Controller version is v2.0. So add the SDHCI_QUIRK_USE_WIDE8 for Samsung-SoC. Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com> Signed-off-by: Pantelis Antoniou <panto@antoniou-consulting.com>
* | SPDX: fix IBM-pibs license identifierWolfgang Denk2013-09-20-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | The SPDX License List version 1.19 now contains an official entry for the IBM-pibs license. However, instead of our suggestion "ibm-pibs", the SPDX License List uses "IBM-pibs", with the following rationale: "The reason being that all other SPDX License List short identifiers tend towards using capital letters unless spelling a word. I'd prefer to be consistent to this end". Change the license IDs to use the official name. Signed-off-by: Wolfgang Denk <wd@denx.de>
* | Cosmetic: Fix a number of typos, no functional changes.Robert P. J. Day2013-09-20-1/+1
| | | | | | | | | | | | | | Fix various misspellings of things like "environment", "kernel", "default" and "volatile", and throw in a couple grammar fixes. Signed-off-by: Robert P. J. Day <rpjday@crashcourse.ca>
* | Fix some obvious typos across multiple subsystems.Robert P. J. Day2013-09-20-1/+1
|/ | | | | | | | | | Typoes fixed: "partion" -> "partition" "retrive", "retreive" -> "retrieve" "th" -> "to" Signed-off-by: Robert P. J. Day <rpjday@crashcourse.ca>
* Merge branch 'master' of git://git.denx.de/u-boot-spiTom Rini2013-09-16-9/+3
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| * spi: mxs_spi: Configure chipselect after block resetMarek Vasut2013-08-27-9/+3
| | | | | | | | | | | | | | | | | | | | | | | | The chipselect must be written into the CTRL0 register after the SSP block is reset, otherwise the block will always use ChipSelect #0. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Fabio Estevam <fabio.estevam@freescale.com> Cc: Jagannadha Sutradharudu Teki <jagannadh.teki@gmail.com> Cc: Otavio Salvador <otavio@ossystems.com.br> Cc: Stefano Babic <sbabic@denx.de> Acked-by: Stefano Babic <sbabic@denx.de>
* | Merge branch 'master' of git://git.denx.de/u-boot-armTom Rini2013-09-12-0/+192
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| * \ Merge branch 'u-boot-samsung/master' into 'u-boot-arm/master'Albert ARIBAUD2013-09-11-0/+192
| |\ \ | | | | | | | | | | | | | | | | Conflicts: tools/Makefile
| | * | drivers:power:max77686: add function to set voltage and modePiotr Wilczek2013-08-30-0/+192
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch add new functions to pmic max77686 to set voltage and mode. Signed-off-by: Piotr Wilczek <p.wilczek@samsung.com> Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com> Acked-by: Rajeshwari Shinde <rajeshwari.s@samsung.com> Acked-by: Tom Rini <trini@ti.com> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
* | | | Merge branch 'master' of git://git.denx.de/u-boot-armTom Rini2013-09-06-144/+1173
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| * | | Merge branch 'u-boot-atmel/master' into 'u-boot-arm/master'Albert ARIBAUD2013-09-05-1/+2
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| | * | | mtd: atmel_nand: pmecc: fix bug fail to correct bit error in 1024-bytes sectorWu, Josh2013-09-04-1/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The PMECC use BCH algorithm to correct error. In BCH algorithm, the primitive polynomial value is GF(2^13) for 512-bytes sector size. And it is GF(2^14) for 1024-bytes sector size. This patch will choose correct degree of the remainders (13 or 14) for different sector size. Tested in AT91SAM9X5-EK with MLC nand flash. More detail can be refered to section 5.4.1 of: AT91SAM ARM-based Embedded MPU Application Note <http://www.atmel.com/Images/doc11127.pdf> Signed-off-by: Josh Wu <josh.wu@atmel.com> Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
| * | | | Merge branch 'u-boot-imx/master' into 'u-boot-arm/master'Albert ARIBAUD2013-09-05-1/+158
| |\ \ \ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Conflicts: drivers/serial/serial.c The conflict above was a trivial case of adding one init function in each branch, and manually resolved in merge.
| | * | | | mmc: mxsmmc: Enable MMC HC supportAmaury Pouly2013-08-23-1/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Enable support for high-capacity eMMC and MMC cards. The MXS MMC driver has no problem with those. Signed-off-by: Marek Vasut <marex@denx.de> Signed-off-by: Amaury Pouly <amaury.pouly@gmail.com> Cc: Andy Fleming <afleming@freescale.com> Cc: Fabio Estevam <fabio.estevam@freescale.com> Cc: Stefano Babic <sbabic@denx.de> Cc: Otavio Salvador <otavio@ossystems.com.br> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br>
| | * | | | fec_mxc: set ethaddr if fuses burned and not previously setEric Nelson2013-08-21-0/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Without this change, the following message is generated: Warning: FEC using MAC address from net device See doc/README.enetaddr for details. Signed-off-by: Eric Nelson <eric.nelson@boundarydevices.com>
| | * | | | ARM: mxs: Added application UART driverAndreas Wass2013-08-21-0/+154
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The driver makes it possible to use an application UART as the U-Boot output console for Freescale i.MX23/i.MX28 devices. Signed-off-by: Andreas Wass <andreas.wass@dalelven.com> Cc: Fabio Estevam <fabio.estevam@freescale.com> Cc: Marek Vasut <marex@denx.de> Acked-by: Marek Vasut <marex@denx.de>
| * | | | | Merge branch 'u-boot-ti/master' into 'u-boot-arm/master'Albert ARIBAUD2013-09-04-0/+634
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| | * | | | video: add formike lcd panel initHeiko Schocher2013-08-28-0/+512
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Signed-off-by: Heiko Schocher <hs@denx.de> Cc: Anatolij Gustschin <agust@denx.de> Cc: Tom Rini <trini@ti.com> Acked-by: Anatolij Gustschin <agust@denx.de>
| | * | | | arm, am335x: add watchdog supportHeiko Schocher2013-08-28-0/+122
| | | |/ / | | |/| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add TI OMAP 16xx & 24xx/34xx 32KHz (non-secure) watchdog support. Signed-off-by: Heiko Schocher <hs@denx.de> Reviewed-by: Tom Rini <trini@ti.com> Cc: Albert Aribaud <albert.u.boot@aribaud.net>
| * | | | Merge branch 'u-boot-atmel/master' into 'u-boot-arm/master'Albert ARIBAUD2013-09-04-142/+379
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| | * | | | gpio: atmel: add copyright and remove error header infoBo Shen2013-08-22-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Signed-off-by: Bo Shen <voice.shen@atmel.com> Acked-by: Jens Scharsig <js_at_ng@scharsoft.de> Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
| | * | | | gpio: atmel: add gpio common API supportBo Shen2013-08-22-0/+43
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | add gpio common API support for gpio command Signed-off-by: Bo Shen <voice.shen@atmel.com> [fix unnecessary cast] Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
| | * | | | gpio: atmel: fix code to use pointer for pio portBo Shen2013-08-22-112/+138
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | fix code to use pointer for pio port as the warning message suggested remove the warning message Signed-off-by: Bo Shen <voice.shen@atmel.com> Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
| | * | | | ARM: at91: atmel_nand: add code to check the ONFI parameter ECC requirementWu, Josh2013-08-22-2/+128
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | 1. if CONFIG_SYS_NAND_ONFI_DETECTION is defined, driver will check NAND flash's ecc minimum requirement in ONFI parameter. a) if CONFIG_PMECC_CAP, CONFIG_PMECC_SECTOR_SIZE are defined. then use it. Driver will display a WARNING if the values are different from ONFI parameters. b) if CONFIG_PMECC_CAP, CONFIG_PMECC_SECTOR_SIZE are not defined, then use the value from ONFI parameters. * If ONFI ECC parameters are in ONFI extended parameter page, since we are not support it, so assume the minimum ecc requirement is 2 bits in 512 bytes. * For non-ONFI support nand flash, also assume the minimum ecc requirement is 2 bits in 512 bytes. 2. if CONFIG_SYS_NAND_ONFI_DETECTION is not defined, just use CONFIG_PMECC_CAP and CONFIG_PMECC_SECTOR_SIZE. Signed-off-by: Josh Wu <josh.wu@atmel.com> Acked-by: Scott Wood <scottwood@freescale.com> Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
| | * | | | mtd: atmel_nand: alloc memory instead of use static array for pmecc dataWu, Josh2013-08-22-7/+56
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | In this way, the pmecc corraction capbility can change in run time. Signed-off-by: Josh Wu <josh.wu@atmel.com> Acked-by: Scott Wood <scottwood@freescale.com> Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
| | * | | | linux/compat.h: move dev_err, dev_info and dev_dbg from usb driver to compat.hWu, Josh2013-08-22-16/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Since kernel code current use many dev_xxx() instead of using printk. To compatible, move those dev_xxx from usb driver to linux/compat.h. Then all driver code can use dev_err, dev_info and dev_vdbg. This patch also removed duplicated macro definitions in usb driver. Signed-off-by: Josh Wu <josh.wu@atmel.com> Acked-by: Scott Wood <scottwood@freescale.com> Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
| | * | | | ARM: at91: atmel_nand: pmecc driver will select the galois table by sector sizeWu, Josh2013-08-22-1/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Define the galois index table offset in chip head file. So user do not need to set by himself. Driver will set it correctly according to sector_size. Signed-off-by: Josh Wu <josh.wu@atmel.com> Acked-by: Scott Wood <scottwood@freescale.com> [rebased on master] Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
| | * | | | net: macb: fix the following building warningBo Shen2013-08-22-3/+9
| | |/ / / | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | fix the following building warning ---8>--- macb.c: In function 'macb_init': macb.c:400:14: warning: 'phydev' may be used uninitialized in this function macb.c:377:21: note: 'phydev' was declared here ---<8--- Signed-off-by: Bo Shen <voice.shen@atmel.com> Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
* | | | | ahci: convert to use libata functions and definitionsRob Herring2013-09-06-56/+24
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | libata already has similar functions as implemented in the ahci code. Refactor the code to use the libata variants and remove the dependency on ata.h. Convert some defines to use the version from libata.h. Also, remove some unnecessary memset's of bss data. This is a step toward hopefully merging ahci.c and dw_ahsata.c which are essentially the same driver. Signed-off-by: Rob Herring <rob.herring@calxeda.com> Reviewed-by: Tom Rini <trini@ti.com>
* | | | | ahci: increase spin-up timeout to 20 secRob Herring2013-09-06-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Based on Linux libata code, most drives are less than 10 sec, but some need up to 20 sec. Signed-off-by: Rob Herring <rob.herring@calxeda.com> Reviewed-by: Tom Rini <trini@ti.com>
* | | | | ahci: handle COMINIT received during spin-upRob Herring2013-09-06-0/+12
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Some Intel SSDs can send a COMINIT after the initial COMRESET. This causes the link to go down and we need to re-initialize the link. Signed-off-by: Rob Herring <rob.herring@calxeda.com>
* | | | | ahci: move link bring-up handling to separate functionRob Herring2013-09-06-15/+25
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Move the link bring-up handling to a separate weak function in order to allow platforms to override it. This is needed on highbank platform which needs special phy handling. Signed-off-by: Rob Herring <rob.herring@calxeda.com>
* | | | | ahci: add defines for PORT_SCR_STAT register bitsRob Herring2013-09-06-2/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Replace hard-coded register values with proper defines for PORT_SCR_STAT register. Signed-off-by: Rob Herring <rob.herring@calxeda.com>
* | | | | ahci: fix memory leak in ata_scsiop_inquiryRob Herring2013-09-06-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This fixes a memory leak when scsi inquiry fails. Signed-off-by: Rob Herring <rob.herring@calxeda.com> Reviewed-by: Tom Rini <trini@ti.com>
* | | | | ahci: fix unaligned accessRob Herring2013-09-06-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | gcc 4.7 will generate unaligned accesses to local char arrays, so make them static to avoid that. Signed-off-by: Rob Herring <rob.herring@calxeda.com> Reviewed-by: Tom Rini <trini@ti.com>
* | | | | ahci: use ports implemented map instead of num_portsRichard Gibbs2013-09-06-0/+4
|/ / / / | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The AHCI driver was incorrectly using the Capabilities register NP (number of ports) field to determine which ports to activate. This commit changes it to correctly use the PORTS_IMPL register as a port map. Signed-off-by: Richard Gibbs <richard.gibbs@calxeda.com> Reviewed-by: Tom Rini <trini@ti.com>
generated by cgit v1.1 at 2024-12-25 16:36:37 +0000