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* drivers/mmc/fsl_esdhc.c: sparse fixesKim Phillips2012-11-04-2/+2
| | | | | | | fsl_esdhc.c:71:6: warning: symbol 'esdhc_xfertyp' was not declared. Should it be static? fsl_esdhc.c:413:6: warning: symbol 'set_sysctl' was not declared. Should it be st Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
* drivers/mmc/mmc.c: sparse fixesKim Phillips2012-11-04-18/+19
| | | | | | | | | | | | | | | | | | | | | | mmc.c:137:5: warning: symbol 'mmc_send_cmd' was not declared. Should it be static? mmc.c:203:5: warning: symbol 'mmc_send_status' was not declared. Should it be static? mmc.c:247:5: warning: symbol 'mmc_set_blocklen' was not declared. Should it be static? mmc.c:440:5: warning: symbol 'mmc_read_blocks' was not declared. Should it be static? mmc.c:510:5: warning: symbol 'mmc_go_idle' was not declared. Should it be static? mmc.c:532:1: warning: symbol 'sd_send_op_cond' was not declared. Should it be static? mmc.c:597:5: warning: symbol 'mmc_send_op_cond' was not declared. Should it be static? mmc.c:661:5: warning: symbol 'mmc_send_ext_csd' was not declared. Should it be static? mmc.c:683:5: warning: symbol 'mmc_switch' was not declared. Should it be static? mmc.c:705:5: warning: symbol 'mmc_change_freq' was not declared. Should it be static? mmc.c:775:5: warning: symbol 'sd_switch' was not declared. Should it be static? mmc.c:796:5: warning: symbol 'sd_change_freq' was not declared. Should it be static? mmc.c:935:6: warning: symbol 'mmc_set_ios' was not declared. Should it be static? mmc.c:953:6: warning: symbol 'mmc_set_bus_width' was not declared. Should it be static? mmc.c:1108:26: warning: dubious: !x & y mmc.c:960:5: warning: symbol 'mmc_startup' was not declared. Should it be static? mmc.c:1243:5: warning: symbol 'mmc_send_if_cond' was not declared. Should it be s Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
* drivers/input/input.c: sparse fixKim Phillips2012-11-04-1/+1
| | | | | | | input.c:97:5: warning: symbol 'input_queue_ascii' was not declared. Should it be Signed-off-by: Kim Phillips <kim.phillips@freescale.com> Acked-by: Simon Glass <sjg@chromium.org>
* drivers/gpio/mpc83xx_gpio.c: sparse fixesKim Phillips2012-11-04-2/+2
| | | | | | | mpc83xx_gpio.c:166:26: warning: non-ANSI function declaration of function 'mpc83xx_gpio_init_f' mpc83xx_gpio.c:190:26: warning: non-ANSI function declaration of function 'mpc83xx_gpio_init_r' Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
* drivers/block/: sparse fixesKim Phillips2012-11-04-82/+25
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | sata_sil.c:371:7: warning: symbol 'sil_sata_rw_lba28' was not declared. Should it be static? sata_sil.c:399:7: warning: symbol 'sil_sata_rw_lba48' was not declared. Should it be static? sata_sil.c:429:6: warning: symbol 'sil_sata_cmd_flush_cache' was not declared. Should it be static? sata_sil.c:441:6: warning: symbol 'sil_sata_cmd_flush_cache_ext' was not declared. Should it be static? sata_sil.c:489:7: warning: symbol 'sata_read' was not declared. Should it be static? sata_sil.c:505:7: warning: symbol 'sata_write' was not declared. Should it be static? sata_sil.c:526:5: warning: symbol 'init_sata' was not declared. Should it be static? sata_sil.c:588:5: warning: symbol 'scan_sata' was not declared. Should it be static? fsl_sata.c:59:6: warning: symbol 'dprint_buffer' was not declared. Should it be static? fsl_sata.c:187:42: warning: incorrect type in assignment (different base types) fsl_sata.c:187:42: expected unsigned int [unsigned] [usertype] cda fsl_sata.c:187:42: got restricted __le32 [usertype] <noident> fsl_sata.c:291:6: warning: symbol 'fsl_sata_hardware_reset' was not declared. Should it be static? fsl_sata.c:418:27: warning: incorrect type in assignment (different base types) fsl_sata.c:418:27: expected unsigned int [unsigned] [usertype] dba fsl_sata.c:418:27: got restricted __le32 [usertype] <noident> fsl_sata.c:424:41: warning: incorrect type in assignment (different base types) fsl_sata.c:424:41: expected unsigned int [unsigned] [usertype] ext_c_ddc fsl_sata.c:424:41: got restricted __le32 [usertype] <noident> fsl_sata.c:431:41: warning: incorrect type in assignment (different base types) fsl_sata.c:431:41: expected unsigned int [unsigned] [usertype] ext_c_ddc fsl_sata.c:431:41: got restricted __le32 [usertype] <noident> fsl_sata.c:442:22: warning: incorrect type in assignment (different base types) fsl_sata.c:442:22: expected unsigned int [unsigned] [usertype] cda fsl_sata.c:442:22: got restricted __le32 [usertype] <noident> fsl_sata.c:446:31: warning: incorrect type in assignment (different base types) fsl_sata.c:446:31: expected unsigned int [unsigned] [usertype] prde_fis_len fsl_sata.c:446:31: got restricted __le32 [usertype] <noident> fsl_sata.c:448:22: warning: incorrect type in assignment (different base types) fsl_sata.c:448:22: expected unsigned int [unsigned] [usertype] ttl fsl_sata.c:448:22: got restricted __le32 [usertype] <noident> fsl_sata.c:460:28: warning: incorrect type in assignment (different base types) fsl_sata.c:460:28: expected unsigned int [unsigned] [usertype] attribute fsl_sata.c:460:28: got restricted __le32 [usertype] <noident> fsl_sata.c:623:6: warning: symbol 'fsl_sata_flush_cache' was not declared. Should it be static? fsl_sata.c:667:5: warning: symbol 'fsl_sata_rw_ncq_cmd' was not declared. Should it be static? fsl_sata.c:710:6: warning: symbol 'fsl_sata_flush_cache_ext' was not declared. Should it be static? fsl_sata.c:725:6: warning: symbol 'fsl_sata_software_reset' was not declared. Should it be static? fsl_sata.c:760:5: warning: symbol 'ata_low_level_rw_lba48' was not declared. Should it be static? fsl_sata.c:795:5: warning: symbol 'ata_low_level_rw_lba28' was not declared. Should it be static? the following compiler warnings show up after fixing the above, so remove those three functions: fsl_sata.c:59:13: warning: 'dprint_buffer' defined but not used [-Wunused-function] fsl_sata.c:291:13: warning: 'fsl_sata_hardware_reset' defined but not used [-Wunused-function] fsl_sata.c:726:13: warning: 'fsl_sata_software_reset' defined but not used [-Wunused-function] Other than that, the following are fixed by __iomem annotation: fsl_sata.c:84:39: warning: incorrect type in argument 1 (different address spaces) fsl_sata.c:84:39: expected unsigned int const volatile [noderef] <asn:2>*addr fsl_sata.c:84:39: got unsigned int volatile *addr fsl_sata.c:172:26: warning: incorrect type in argument 1 (different address spaces) fsl_sata.c:172:26: expected unsigned int const volatile [noderef] <asn:2>*addr fsl_sata.c:172:26: got unsigned int *<noident> fsl_sata.c:175:19: warning: incorrect type in argument 1 (different address spaces) fsl_sata.c:175:19: expected unsigned int volatile [noderef] <asn:2>*addr fsl_sata.c:175:19: got unsigned int *<noident> fsl_sata.c:181:19: warning: incorrect type in argument 1 (different address spaces) fsl_sata.c:181:19: expected unsigned int volatile [noderef] <asn:2>*addr fsl_sata.c:181:19: got unsigned int *<noident> fsl_sata.c:184:26: warning: incorrect type in argument 1 (different address spaces) fsl_sata.c:184:26: expected unsigned int const volatile [noderef] <asn:2>*addr fsl_sata.c:184:26: got unsigned int *<noident> fsl_sata.c:186:19: warning: incorrect type in argument 1 (different address spaces) fsl_sata.c:186:19: expected unsigned int volatile [noderef] <asn:2>*addr fsl_sata.c:186:19: got unsigned int *<noident> fsl_sata.c:189:26: warning: incorrect type in argument 1 (different address spaces) fsl_sata.c:189:26: expected unsigned int const volatile [noderef] <asn:2>*addr fsl_sata.c:189:26: got unsigned int *<noident> fsl_sata.c:191:19: warning: incorrect type in argument 1 (different address spaces) fsl_sata.c:191:19: expected unsigned int volatile [noderef] <asn:2>*addr fsl_sata.c:191:19: got unsigned int *<noident> fsl_sata.c:194:26: warning: incorrect type in argument 1 (different address spaces) fsl_sata.c:194:26: expected unsigned int const volatile [noderef] <asn:2>*addr fsl_sata.c:194:26: got unsigned int *<noident> fsl_sata.c:195:19: warning: incorrect type in argument 1 (different address spaces) fsl_sata.c:195:19: expected unsigned int volatile [noderef] <asn:2>*addr fsl_sata.c:195:19: got unsigned int *<noident> fsl_sata.c:198:19: warning: incorrect type in argument 1 (different address spaces) fsl_sata.c:198:19: expected unsigned int volatile [noderef] <asn:2>*addr fsl_sata.c:198:19: got unsigned int *<noident> fsl_sata.c:201:19: warning: incorrect type in argument 1 (different address spaces) fsl_sata.c:201:19: expected unsigned int volatile [noderef] <asn:2>*addr fsl_sata.c:201:19: got unsigned int *<noident> fsl_sata.c:204:26: warning: incorrect type in argument 1 (different address spaces) fsl_sata.c:204:26: expected unsigned int const volatile [noderef] <asn:2>*addr fsl_sata.c:204:26: got unsigned int *<noident> fsl_sata.c:205:19: warning: incorrect type in argument 1 (different address spaces) fsl_sata.c:205:19: expected unsigned int volatile [noderef] <asn:2>*addr fsl_sata.c:205:19: got unsigned int *<noident> fsl_sata.c:208:26: warning: incorrect type in argument 1 (different address spaces) fsl_sata.c:208:26: expected unsigned int const volatile [noderef] <asn:2>*addr fsl_sata.c:208:26: got unsigned int *<noident> fsl_sata.c:209:19: warning: incorrect type in argument 1 (different address spaces) fsl_sata.c:209:19: expected unsigned int volatile [noderef] <asn:2>*addr fsl_sata.c:209:19: got unsigned int *<noident> fsl_sata.c:212:26: warning: incorrect type in argument 1 (different address spaces) fsl_sata.c:212:26: expected unsigned int const volatile [noderef] <asn:2>*addr fsl_sata.c:212:26: got unsigned int *<noident> fsl_sata.c:213:19: warning: incorrect type in argument 1 (different address spaces) fsl_sata.c:213:19: expected unsigned int volatile [noderef] <asn:2>*addr fsl_sata.c:213:19: got unsigned int *<noident> fsl_sata.c:216:19: warning: incorrect type in argument 1 (different address spaces) fsl_sata.c:216:19: expected unsigned int volatile [noderef] <asn:2>*addr fsl_sata.c:216:19: got unsigned int *<noident> fsl_sata.c:219:19: warning: incorrect type in argument 1 (different address spaces) fsl_sata.c:219:19: expected unsigned int volatile [noderef] <asn:2>*addr fsl_sata.c:219:19: got unsigned int *<noident> fsl_sata.c:222:19: warning: incorrect type in argument 1 (different address spaces) fsl_sata.c:222:19: expected unsigned int volatile [noderef] <asn:2>*addr fsl_sata.c:222:19: got unsigned int *<noident> fsl_sata.c:225:26: warning: incorrect type in argument 1 (different address spaces) fsl_sata.c:225:26: expected unsigned int const volatile [noderef] <asn:2>*addr fsl_sata.c:225:26: got unsigned int *<noident> fsl_sata.c:227:19: warning: incorrect type in argument 1 (different address spaces) fsl_sata.c:227:19: expected unsigned int volatile [noderef] <asn:2>*addr fsl_sata.c:227:19: got unsigned int *<noident> fsl_sata.c:242:26: warning: incorrect type in argument 1 (different address spaces) fsl_sata.c:242:26: expected unsigned int const volatile [noderef] <asn:2>*addr fsl_sata.c:242:26: got unsigned int *<noident> fsl_sata.c:256:32: warning: incorrect type in argument 1 (different address spaces) fsl_sata.c:256:32: expected unsigned int const volatile [noderef] <asn:2>*addr fsl_sata.c:256:32: got unsigned int *<noident> fsl_sata.c:262:26: warning: incorrect type in argument 1 (different address spaces) fsl_sata.c:262:26: expected unsigned int const volatile [noderef] <asn:2>*addr fsl_sata.c:262:26: got unsigned int *<noident> fsl_sata.c:274:53: warning: incorrect type in argument 1 (different address spaces) fsl_sata.c:274:53: expected unsigned int const volatile [noderef] <asn:2>*addr fsl_sata.c:274:53: got unsigned int *<noident> fsl_sata.c:275:53: warning: incorrect type in argument 1 (different address spaces) fsl_sata.c:275:53: expected unsigned int const volatile [noderef] <asn:2>*addr fsl_sata.c:275:53: got unsigned int *<noident> fsl_sata.c:276:53: warning: incorrect type in argument 1 (different address spaces) fsl_sata.c:276:53: expected unsigned int const volatile [noderef] <asn:2>*addr fsl_sata.c:276:53: got unsigned int *<noident> fsl_sata.c:277:53: warning: incorrect type in argument 1 (different address spaces) fsl_sata.c:277:53: expected unsigned int const volatile [noderef] <asn:2>*addr fsl_sata.c:277:53: got unsigned int *<noident> fsl_sata.c:278:53: warning: incorrect type in argument 1 (different address spaces) fsl_sata.c:278:53: expected unsigned int const volatile [noderef] <asn:2>*addr fsl_sata.c:278:53: got unsigned int *<noident> fsl_sata.c:279:53: warning: incorrect type in argument 1 (different address spaces) fsl_sata.c:279:53: expected unsigned int const volatile [noderef] <asn:2>*addr fsl_sata.c:279:53: got unsigned int *<noident> fsl_sata.c:280:53: warning: incorrect type in argument 1 (different address spaces) fsl_sata.c:280:53: expected unsigned int const volatile [noderef] <asn:2>*addr fsl_sata.c:280:53: got unsigned int *<noident> fsl_sata.c:281:53: warning: incorrect type in argument 1 (different address spaces) fsl_sata.c:281:53: expected unsigned int const volatile [noderef] <asn:2>*addr fsl_sata.c:281:53: got unsigned int *<noident> fsl_sata.c:282:53: warning: incorrect type in argument 1 (different address spaces) fsl_sata.c:282:53: expected unsigned int const volatile [noderef] <asn:2>*addr fsl_sata.c:282:53: got unsigned int *<noident> fsl_sata.c:283:53: warning: incorrect type in argument 1 (different address spaces) fsl_sata.c:283:53: expected unsigned int const volatile [noderef] <asn:2>*addr fsl_sata.c:283:53: got unsigned int *<noident> fsl_sata.c:284:53: warning: incorrect type in argument 1 (different address spaces) fsl_sata.c:284:53: expected unsigned int const volatile [noderef] <asn:2>*addr fsl_sata.c:284:53: got unsigned int *<noident> fsl_sata.c:285:53: warning: incorrect type in argument 1 (different address spaces) fsl_sata.c:285:53: expected unsigned int const volatile [noderef] <asn:2>*addr fsl_sata.c:285:53: got unsigned int *<noident> fsl_sata.c:286:53: warning: incorrect type in argument 1 (different address spaces) fsl_sata.c:286:53: expected unsigned int const volatile [noderef] <asn:2>*addr fsl_sata.c:286:53: got unsigned int *<noident> fsl_sata.c:287:53: warning: incorrect type in argument 1 (different address spaces) fsl_sata.c:287:53: expected unsigned int const volatile [noderef] <asn:2>*addr fsl_sata.c:287:53: got unsigned int *<noident> fsl_sata.c:288:53: warning: incorrect type in argument 1 (different address spaces) fsl_sata.c:288:53: expected unsigned int const volatile [noderef] <asn:2>*addr fsl_sata.c:288:53: got unsigned int *<noident> fsl_sata.c:289:53: warning: incorrect type in argument 1 (different address spaces) fsl_sata.c:289:53: expected unsigned int const volatile [noderef] <asn:2>*addr fsl_sata.c:289:53: got unsigned int *<noident> fsl_sata.c:290:53: warning: incorrect type in argument 1 (different address spaces) fsl_sata.c:290:53: expected unsigned int const volatile [noderef] <asn:2>*addr fsl_sata.c:290:53: got unsigned int *<noident> fsl_sata.c:291:53: warning: incorrect type in argument 1 (different address spaces) fsl_sata.c:291:53: expected unsigned int const volatile [noderef] <asn:2>*addr fsl_sata.c:291:53: got unsigned int *<noident> fsl_sata.c:292:53: warning: incorrect type in argument 1 (different address spaces) fsl_sata.c:292:53: expected unsigned int const volatile [noderef] <asn:2>*addr fsl_sata.c:292:53: got unsigned int *<noident> fsl_sata.c:293:53: warning: incorrect type in argument 1 (different address spaces) fsl_sata.c:293:53: expected unsigned int const volatile [noderef] <asn:2>*addr fsl_sata.c:293:53: got unsigned int *<noident> fsl_sata.c:294:53: warning: incorrect type in argument 1 (different address spaces) fsl_sata.c:294:53: expected unsigned int const volatile [noderef] <asn:2>*addr fsl_sata.c:294:53: got unsigned int *<noident> fsl_sata.c:295:53: warning: incorrect type in argument 1 (different address spaces) fsl_sata.c:295:53: expected unsigned int const volatile [noderef] <asn:2>*addr fsl_sata.c:295:53: got unsigned int *<noident> fsl_sata.c:296:53: warning: incorrect type in argument 1 (different address spaces) fsl_sata.c:296:53: expected unsigned int const volatile [noderef] <asn:2>*addr fsl_sata.c:296:53: got unsigned int *<noident> fsl_sata.c:297:53: warning: incorrect type in argument 1 (different address spaces) fsl_sata.c:297:53: expected unsigned int const volatile [noderef] <asn:2>*addr fsl_sata.c:297:53: got unsigned int *<noident> fsl_sata.c:298:53: warning: incorrect type in argument 1 (different address spaces) fsl_sata.c:298:53: expected unsigned int const volatile [noderef] <asn:2>*addr fsl_sata.c:298:53: got unsigned int *<noident> Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
* drivers/net/: sparse fixesKim Phillips2012-11-04-19/+21
| | | | | | | | | | | | | | | | | | | phy.c:46:5: warning: symbol 'genphy_config_advert' was not declared. Should it be static? phy.c:121:5: warning: symbol 'genphy_setup_forced' was not declared. Should it be static? phy.c:468:5: warning: symbol 'phy_probe' was not declared. Should it be static? phy.c:491:19: warning: symbol 'get_phy_driver' was not declared. Should it be static? phy.c:508:19: warning: symbol 'phy_device_create' was not declared. Should it be static? phy.c:552:5: warning: symbol 'get_phy_id' was not declared. Should it be static? phy.c:584:19: warning: symbol 'get_phy_device' was not declared. Should it be sta vitesse.c:126:5: warning: symbol 'vsc8601_config' was not declared. Should it be static? vsc7385.c:33:5: warning: symbol 'vsc7385_upload_firmware' was not declared. Should it be static? tgec_phy.c:33:5: warning: symbol 'tgec_mdio_write' was not declared. Should it be static? tgec_phy.c:75:5: warning: symbol 'tgec_mdio_read' was not declared. Should it be static? tgec_phy.c:117:5: warning: symbol 'tgec_mdio_reset' was not declared. Should it be static? eth.c:48:6: warning: symbol 'dtsec_configure_serdes' was not declared. Should it be static? p4080.c:26:5: warning: symbol 'port_to_devdisr' was not declared. Should it be static? Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
* net/: sparse fixesKim Phillips2012-11-04-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | bootp.c:44:14: warning: symbol 'dhcp_state' was not declared. Should it be static? bootp.c:45:15: warning: symbol 'dhcp_leasetime' was not declared. Should it be static? bootp.c:46:10: warning: symbol 'NetDHCPServerIP' was not declared. Should it be static? arp.c:30:17: warning: symbol 'NetArpWaitReplyIP' was not declared. Should it be static? arp.c:37:16: warning: symbol 'NetArpTxPacket' was not declared. Should it be static? arp.c:38:17: warning: symbol 'NetArpPacketBuf' was not declared. Should it be static? atheros.c:33:19: warning: symbol 'AR8021_driver' was not declared. Should it be static? net.c:183:7: warning: symbol 'PktBuf' was not declared. Should it be static? net.c:159:21: warning: symbol 'net_state' was not declared. Should it be static? ping.c:73:6: warning: symbol 'ping_start' was not declared. Should it be static? ping.c:82:13: warning: symbol 'ping_receive' was not declared. Should it be static? tftp.c:53:7: warning: symbol 'TftpRRQTimeoutMSecs' was not declared. Should it be static? tftp.c:54:5: warning: symbol 'TftpRRQTimeoutCountMax' was not declared. Should it be static? eth.c:125:19: warning: symbol 'eth_current' was not declared. Should it be static? Note: in the ping.c fix, commit a36b12f95a29647a06b5459198684fc142482020 "net: Move PING out of net.c" mistakenly carried the ifdef CMD_PING clause from when it was necessary to avoid warnings when it was embedded in net.c. Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
* include/linux/byteorder: import latest endian definitions from linuxKim Phillips2012-11-04-16/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | u-boot's byteorder headers did not contain endianness attributions for use with sparse, causing a lot of false positives. Import the kernel's latest definitions, and enable them by including compiler.h and types.h. They come with 'const' added for some swab functions, so fix those up, too: include/linux/byteorder/big_endian.h:46:2: warning: passing argument 1 of '__swab64p' discards 'const' qualifier from pointer target type [enabled by default] Also, note: u-boot's historic __BYTE_ORDER definition has been preserved (for the time being at least). We also remove ad-hoc barrier() definitions, since we're including compiler.h in files that hadn't in the past: macb.c:54:0: warning: "barrier" redefined [enabled by default] In addition, including compiler.h in byteorder changes the 'noinline' definition to expand to __attribute__((noinline)). This fixes arch/powerpc/lib/bootm.c: bootm.c:329:16: error: attribute '__attribute__': unknown attribute bootm.c:329:16: error: expected ')' before '__attribute__' bootm.c:329:25: error: expected identifier or '(' before ')' token powerpc sparse builds yield: include/common.h:356:22: error: marked inline, but without a definition the unknown-reason inlining without a definition is considered obsolete given it was part of the 2002 initial commit, and no arm version was 'fixed.' also fixed: ydirectenv.h:60:0: warning: "inline" redefined [enabled by default] and: Configuring for devconcenter - Board: intip, Options: DEVCONCENTER make[1]: *** [4xx_ibm_ddr2_autocalib.o] Error 1 make: *** [arch/powerpc/cpu/ppc4xx/libppc4xx.o] Error 2 powerpc-fsl-linux-size: './u-boot': No such file 4xx_ibm_ddr2_autocalib.c: In function 'DQS_autocalibration': include/asm/ppc4xx-sdram.h:1407:13: sorry, unimplemented: inlining failed in call to 'ppc4xx_ibm_ddr2_register_dump': function body not available 4xx_ibm_ddr2_autocalib.c:1243:32: sorry, unimplemented: called from here and: In file included from crc32.c:50:0: crc32table.h:4:1: warning: implicit declaration of function '___constant_swab32' [-Wimplicit-function-declaration] crc32table.h:4:1: error: initializer element is not constant crc32table.h:4:1: error: (near initialization for 'crc32table_le[0]') Signed-off-by: Kim Phillips <kim.phillips@freescale.com> [trini: Remove '#endif' in include/common.h around setenv portion] Signed-off-by: Tom Rini <trini@ti.com>
* ahci: Expand HDD Logical Block addressability up to 32 bitsWalter Murphy2012-11-02-4/+8
| | | | | | | | | | | | | | | | | | Currently, this driver uses a 28bit interface to AHCI, this limits the number of blocks addressable to 2^28, or the max disk size to 512(2^28) or about 137GB. This change allows supporting drives up to about 2TB. Testing this is a bit difficult. There is test code that can be inserted into U-Boot that will write test patterns into certain unused blocks. These patterns can be manually checked using 'dd' after boot. Another way is to confirm the original error that exposed this bug is fixed. IOW: see if AU (Auto Update) will now work on the drive. Also, check that there are no warning messages from the 'cgpt' utility. Signed-off-by: Walter Murphy <wmurphy@chromium.org> Signed-off-by: Simon Glass <sjg@chromium.org>
* ahci: Perform SATA flush after disk write.Marc Jones2012-11-02-1/+51
| | | | | | | | | | Writes in u-boot are so rare, and the logic to know when is the last write and do a flush only there is sufficiently difficult. Just do a flush after every write. This incurs, usually, one extra flush when the rare writes do happen. Signed-off-by: Marc Jones <marc.jones@chromium.org> Signed-off-by: Simon Glass <sjg@chromium.org>
* ahci: Support spin-up and link-up separatelyMarc Jones2012-11-02-6/+39
| | | | | | | | Add HDD handling to the SSD-only AHCI driver, by separately dealing with spin-up and link-up. Signed-off-by: Marc Jones <marc.jones@chromium.org> Signed-off-by: Simon Glass <sjg@chromium.org>
* ahci: Adjust SATA timeouts for hard disk (spinup delay & command timeout)Walter Murphy2012-11-02-4/+10
| | | | | | | | | | | | | | | Note: These are timeout values and not delay values, so the event being timed out will complete whenever it is actually ready, with a measurement granularity of 1 millisecond, up till the timeout value. Therefore, there is no effect on SSD booting. The values were determined by instrumenting the code and measuring the actual time taken by several different models of HDD for each of the parameters and then adding 50% more for the spinup value and just doubling the command timeout value. Signed-off-by: Walter Murphy <wmurphy@chromium.org> Signed-off-by: Simon Glass <sjg@chromium.org>
* ahci: flush / invalidate dcache around SATA commandsTaylor Hutt2012-11-02-0/+39
| | | | | | | | | Exynos5 automatically performs DMA when the SATA controller executes commands. This adds the necessary dcache-to-memory flush & invalidation calls to allow the DMA to properly function. Signed-off-by: Taylor Hutt <thutt@chromium.org> Signed-off-by: Simon Glass <sjg@chromium.org>
* ahci: Use virt_to_phys() to denote physical addresses for DMATaylor Hutt2012-11-02-4/+6
| | | | | | | | | | | | | | | | | | | | | | | | | Update the assignment of various physical memory buffers used by the SATA controller to explicitly be denoted as physical addresses. The memory is identity-mapped, so these function calls are a nop, but they provide good semantic documentation for any maintainers. The return value of virt_to_phys() is 'unsigned long'. On machines where sizeof(unsigned long) != sizeof(pointer), a cast through (uintptr_t) is needed to appease the compiler due to the potential of losing the upper 32 bits of the address. In compilation this scenario, a physical address could be 64-bits, yet the C pointer environment only allows 32-bit addresses; the constraint is that pointers cannot address more than 4Gb of memory and if virt_to_phys() ever returns an out-of-range value for the physical address, there are issues with emmory mapping which must be solved. However, since the memory is identify mappeed, there is no problem introducing the cast: the original pointer will reside in 32-bits, so the physical address will also be within in 32-bits. Signed-off-by: Taylor Hutt <thutt@chromium.org> Signed-off-by: Simon Glass <sjg@chromium.org>
* ahci: Fix 'Invaild' typoTaylor Hutt2012-11-02-1/+1
| | | | | | | | This fixes a spelling error in a message which can be output to the console. Signed-off-by: Taylor Hutt <thutt@chromium.org> Signed-off-by: Simon Glass <sjg@chromium.org>
* ahci: Use sizeof(fis) instead of hardcoding '20'Taylor Hutt2012-11-02-5/+5
| | | | | | | | This cleanup replaces the hardcoded use of '20', which represents the number of bytes in the FIS, with sizeof(fis). Signed-off-by: Taylor Hutt <thutt@chromium.org> Signed-off-by: Simon Glass <sjg@chromium.org>
* ahci: Make the AHCI code find the capacity of disks > 128 GB properlyGabe Black2012-11-02-5/+50
| | | | | | | | | | | | | | | | | | | | | | | In the structure returned by the ATA identify device command, there are two fields which describe the device capacity. One is a 32 bit data type which reports the number of sectors as a 28 bit LBA, and the other is a 64 bit data type which is for a 48 bit LBA. If the device doesn't support 48 bit LBAs, the small value is the only value with the correct size. If it supports more, if the number of sectors is small enough to fit into 28 bits, both fields reflect the correct value. If it's too large, the smaller field has 28 bits of 1s, 0xfffffff, and the other field has the correct value. The AHCI driver is implemented by attaching to the generic SCSI code and translating on the fly between SCSI binary data structures and AHCI data structures. It responds to requests to execute specific SCSI commands by executing the equivalent AHCI commands and then crafting a response which matches what a SCSI disk would send. The AHCI driver now considers both fields and chooses the correct one when implementing both the SCSI READ CAPACITY (10) and READ CAPACITY (16) commands. Signed-off-by: Gabe Black <gabeblack@chromium.org> Signed-off-by: Simon Glass <sjg@chromium.org>
* ahci: support scsi writing in AHCI driverHung-Te Lin2012-11-02-24/+30
| | | | | | | | | | | | | | | | | | The "scsi write" command requires support from underlying driver. This CL enables SCSI_WRITE10 in AHCI driver. Tested in U-Boot console, try to i/o with sector #64: scsi read 1000 40 1 md.b 1000 200 # check if things are not 0xcc mw.b 1000 cc 200 # try to fill with 0xcc scsi write 1000 40 1 mw.b 1000 0 200 # fill with zero md.b 1000 200 # should be all 0 scsi read 1000 40 1 md.b 1000 200 # should be all 0xcc Signed-off-by: Hung-Te Lin <hungte@chromium.org> Signed-off-by: Simon Glass <sjg@chromium.org>
* ahci: Make sending the SETFEATURES_XFER command optionalGabe Black2012-11-02-0/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | This command doesn't really do anything when talking to a SATA device, and sending it confuses some of them. This change makes sending the command optional, and defaults to not. The situations where it should be sent are not the common case. With the standard SSD in the machine, here are some times with the option turned off: 1. 8277 2. 8273 3. 8050 And turned on: 1. 8303 2. 8155 3. 8276 Sending that command seems to have no meaningful effect on performance. This fixes problems with an SSD marked Toshiba NV6424, Taiwan 11159AE P and TC58NVG5D2FTA10. Signed-off-by: Gabe Black <gabeblack@chromium.org> Signed-off-by: Taylor Hutt <thutt@chromium.org> Signed-off-by: Simon Glass <sjg@chromium.org>
* ahci: cosmetics and cleanupStefan Reinauer2012-11-02-7/+18
| | | | | | | | | | | | | | | | - print the correct speed - print all the AHCI capability flags (information taken from Linux kernel driver) - clean up some comments For example, this might show the following string: AHCI 0001.0300 32 slots 6 ports 6 Gbps 0x3 impl SATA mode Signed-off-by: Stefan Reinauer <reinauer@chromium.org> Commit-Ready: Stefan Reinauer <reinauer@chromium.org> Signed-off-by: Simon Glass <sjg@chromium.org> Tested-by: Stefan Reinauer <reinauer@chromium.org>
* ahci: Improve AHCI debuggingStefan Reinauer2012-11-02-1/+2
| | | | | | | | - remove unused ssleep macro - add some useful debugging information Signed-off-by: Stefan Reinauer <reinauer@chromium.org> Signed-off-by: Simon Glass <sjg@chromium.org>
* ahci: Optimise AHCI controller reset and start-upStefan Reinauer2012-11-02-9/+15
| | | | | | | | | | The existing code waits a whole second for the AHCI controller to reset. Instead, let's poll the status register to see if the reset has succeeded and return earlier if possible. This brings down the time for AHCI probing from 1s to 20ms. Signed-off-by: Stefan Reinauer <reinauer@chromium.org> Signed-off-by: Simon Glass <sjg@chromium.org>
* ahci: Support splitting of read transactions into multiple chunksVadim Bendebury2012-11-02-29/+69
| | | | | | | | | | | | | With an Intel AHCI controller, the driver does not operate properly if the requested amount of blocks to read exceeds 255. It is probably possible to specify 0 as the block count and the driver will read 256 blocks, but it was decided to limit the number of blocks read at once to 128 (it should be a power of 2 for the optimal performance of solid state drives). Signed-off-by: Vadim Bendebury <vbendeb@chromium.org> Signed-off-by: Simon Glass <sjg@chromium.org>
* FPGA: Cyclon II: Correctly reset the FPGA before configurationStephan Gatzka2012-10-29-0/+2
| | | | | | | | | | | Deassert the CONFIG pin before asserting it again. This assures that the FPGA will be resetted and therefore configuration will be correctly enabled. This is also already done on other FPGA's, e.g. Stratix. Signed-off-by: Stephan Gatzka <stephan.gatzka@hbm.com> Signed-off-by: Stefan Roese <sr@denx.de>
* Merge branch 'master' of git://git.denx.de/u-boot-armTom Rini2012-10-26-1212/+28
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| * stdio: Remove the CLPS7111 serial driverMarek Vasut2012-10-26-135/+0
| | | | | | | | | | | | This driver is no longer used, remove it. Signed-off-by: Marek Vasut <marex@denx.de>
| * arm: Remove support for NETARMMarek Vasut2012-10-26-602/+0
| | | | | | | | | | | | This stuff has been rotting in the tree for a while now. Remove it. Signed-off-by: Marek Vasut <marex@denx.de>
| * arm: Remove support for s3c4510Marek Vasut2012-10-26-343/+0
| | | | | | | | | | | | This stuff has been rotting in the tree for a year now. Remove it. Signed-off-by: Marek Vasut <marex@denx.de>
| * arm: Remove support for lpc2292Marek Vasut2012-10-26-123/+0
| | | | | | | | | | | | This stuff has been rotting in the tree for a year now. Remove it. Signed-off-by: Marek Vasut <marex@denx.de>
| * Merge remote-tracking branch 'u-boot-atmel/master'Albert ARIBAUD2012-10-26-2/+13
| |\
| | * mmc: at91: use max timeout value. It will avoid some situation that timeout ↵Wu, Josh2012-10-17-2/+2
| | | | | | | | | | | | | | | | | | | | | happened. Signed-off-by: Josh Wu <josh.wu@atmel.com> Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
| | * mmc: at91: add multi block read/write support.Wu, Josh2012-10-17-0/+11
| | | | | | | | | | | | | | | | | | | | | Since the at91sam9263, the mmc hardware support multi blocks read/write. So this driver enable it. Signed-off-by: Josh Wu <josh.wu@atmel.com> Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
| * | Merge remote-tracking branch 'u-boot-ti/master'Albert ARIBAUD2012-10-26-7/+15
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| | * | omap3_spi: introduce CONFIG_OMAP3_SPI_D0_D1_SWAPPEDPeter Korsgaard2012-10-25-6/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | D0/D1 Swapped or not is a board property, not anything specific to the am33xx SoC, so add a custom define for it. At the same time correct the bit handling for the swapped mode (DPE0 should be cleared and SI/DPE1 set). Signed-off-by: Peter Korsgaard <peter.korsgaard@barco.com>
| | * | USB: musb_udc: Make musb_peri_rx_ep check for MUSB_RXCSR_RXPKTRDYPankaj Bharadiya2012-10-23-1/+10
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The endpoint rx count register value will be zero if it is read before receive packet ready bit (PERI_RXCSR:RXPKTRDY) is set. Check for the receive packet ready bit (PERI_RXCSR:RXPKTRDY) before reading endpoint rx count register. Proceed with rx count read and FIFO read only if RXPKTRDY bit is set. Signed-off-by: Pankaj Bharadiya <pankaj.bharadiya@ti.com> Signed-off-by: Tom Rini <trini@ti.com>
* | | | drivers/serial/serial_ns16550.c: sparse fixesKim Phillips2012-10-25-6/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | serial_ns16550.c:222:1: warning: symbol 'eserial1_init' was not declared. Should it be static? serial_ns16550.c:222:1: warning: symbol 'eserial1_setbrg' was not declared. Should it be static? serial_ns16550.c:222:1: warning: symbol 'eserial1_getc' was not declared. Should it be static? serial_ns16550.c:222:1: warning: symbol 'eserial1_tstc' was not declared. Should it be static? serial_ns16550.c:222:1: warning: symbol 'eserial1_putc' was not declared. Should it be static? serial_ns16550.c:222:1: warning: symbol 'eserial1_puts' was not declared. Should it be static? serial_ns16550.c:225:1: warning: symbol 'eserial2_init' was not declared. Should it be static? serial_ns16550.c:225:1: warning: symbol 'eserial2_setbrg' was not declared. Should it be static? serial_ns16550.c:225:1: warning: symbol 'eserial2_getc' was not declared. Should it be static? serial_ns16550.c:225:1: warning: symbol 'eserial2_tstc' was not declared. Should it be static? serial_ns16550.c:225:1: warning: symbol 'eserial2_putc' was not declared. Should it be static? serial_ns16550.c:225:1: warning: symbol 'eserial2_puts' was not declared. Should it be static? serial_ns16550.c:228:1: warning: symbol 'eserial3_init' was not declared. Should it be static? serial_ns16550.c:228:1: warning: symbol 'eserial3_setbrg' was not declared. Should it be static? serial_ns16550.c:228:1: warning: symbol 'eserial3_getc' was not declared. Should it be static? serial_ns16550.c:228:1: warning: symbol 'eserial3_tstc' was not declared. Should it be static? serial_ns16550.c:228:1: warning: symbol 'eserial3_putc' was not declared. Should it be static? serial_ns16550.c:228:1: warning: symbol 'eserial3_puts' was not declared. Should it be static? serial_ns16550.c:231:1: warning: symbol 'eserial4_init' was not declared. Should it be static? serial_ns16550.c:231:1: warning: symbol 'eserial4_setbrg' was not declared. Should it be static? serial_ns16550.c:231:1: warning: symbol 'eserial4_getc' was not declared. Should it be static? serial_ns16550.c:231:1: warning: symbol 'eserial4_tstc' was not declared. Should it be static? serial_ns16550.c:231:1: warning: symbol 'eserial4_putc' was not declared. Should it be static? serial_ns16550.c:231:1: warning: symbol 'eserial4_puts' was not declared. Should it be static? Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
* | | | drivers/i2c/fsl_i2c.c: sparse fixKim Phillips2012-10-25-1/+1
|/ / / | | | | | | | | | | | | | | | | | | fsl_i2c.c:217:14: warning: symbol 'get_i2c_clock' was not declared. Should it be static? Signed-off-by: Kim Phillips <kim.phillips@freescale.com> Acked-by: Heiko Schocher <hs@denx.de>
* | | mpc83xx: add support for mpc8309Gerlando Falauto2012-10-23-9/+12
| | | | | | | | | | | | | | | | | | | | | | | | | | | This processor, though very similar to other members of the PowerQUICC II Pro family (namely 8308, 8360 and 832x), provides yet another feature set than any supported sibling. Signed-off-by: Gerlando Falauto <gerlando.falauto@keymile.com> Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
* | | Merge branch 'master' of git://www.denx.de/git/u-boot-mpc85xxTom Rini2012-10-22-28/+516
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| * | | powerpc/boot: Change the compile macro for SRIO & PCIE boot master moduleLiu Gang2012-10-22-3/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Currently, the SRIO and PCIE boot master module will be compiled into the u-boot image if the macro "CONFIG_FSL_CORENET" has been defined. And this macro has been included by all the corenet architecture platform boards. But in fact, it's uncertain whether all corenet platform boards support this feature. So it may be better to get rid of the macro "CONFIG_FSL_CORENET", and add a special macro for every board which can support the feature. This special macro will be defined in the header file "arch/powerpc/include/asm/config_mpc85xx.h". It will decide if the SRIO and PCIE boot master module should be compiled into the board u-boot image. Signed-off-by: Liu Gang <Gang.Liu@freescale.com> Signed-off-by: Andy Fleming <afleming@freescale.com>
| * | | powerpc/espi: remove write command length checkShaohui Xie2012-10-22-4/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Current espi controller driver assumes the command length of write command is not equal to '1', it was made based on SPANSION SPI flash, but some SPI flash driver such as SST does use write command length as '1', so write command on SST SPI flash will not work. And the length check for write command is not necessary for SPANSION, though it's harmless for SPANSION, it will stop write operation on flashes like SST, so we remove the check. Signed-off-by: Shaohui Xie <Shaohui.Xie@freescale.com> Signed-off-by: Andy Fleming <afleming@freescale.com>
| * | | powerpc/fm: fix TBI PHY address settingsshaohui xie2012-10-22-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | TBI PHY address (TBIPA) register is set in general frame manager phy init funciton dtsec_init_phy() in drivers/net/fm/eth.c, and it is supposed to set TBIPA on FM1@DTSEC1 in case of FM1@DTSEC1 isn't used directly, which provides MDIO for other ports. So following code is wrong in case of FM2, which has a different mac base. struct dtsec *regs = (struct dtsec *)fm_eth->mac->base; /* Assign a Physical address to the TBI */ out_be32(&regs->tbipa, CONFIG_SYS_TBIPA_VALUE); Signed-off-by: Shaohui Xie <Shaohui.Xie@freescale.com> Signed-off-by: Andy Fleming <afleming@freescale.com>
| * | | fm/mEMAC: add mEMAC frame workRoy Zang2012-10-22-2/+323
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The multirate ethernet media access controller (mEMAC) interfaces to 10Gbps and below Ethernet/IEEE 802.3 networks via either RGMII/RMII interfaces or XAUI/XFI/SGMII/QSGMII using the high-speed SerDes interface. Signed-off-by: Sandeep Singh <Sandeep@freescale.com> Signed-off-by: Poonam Aggrwal <poonam.aggrwal@freescale.com> Signed-off-by: Roy Zang <tie-fei.zang@freescale.com> Signed-off-by: Andy Fleming <afleming@freescale.com>
| * | | powerpc/mpc85xx: Add B4860 and variant SoCsYork Sun2012-10-22-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add support for Freescale B4860 and variant SoCs. Features of B4860 are (incomplete list): Six fully-programmable StarCore SC3900 FVP subsystems, divided into three clusters-each core runs up to 1.2 GHz, with an architecture highly optimized for wireless base station applications Four dual-thread e6500 Power Architecture processors organized in one cluster-each core runs up to 1.8 GHz Two DDR3/3L controllers for high-speed, industry-standard memory interface each runs at up to 1866.67 MHz MAPLE-B3 hardware acceleration-for forward error correction schemes including Turbo or Viterbi decoding, Turbo encoding and rate matching, MIMO MMSE equalization scheme, matrix operations, CRC insertion and check, DFT/iDFT and FFT/iFFT calculations, PUSCH/PDSCH acceleration, and UMTS chip rate acceleration CoreNet fabric that fully supports coherency using MESI protocol between the e6500 cores, SC3900 FVP cores, memories and external interfaces. CoreNet fabric interconnect runs at 667 MHz and supports coherent and non-coherent out of order transactions with prioritization and bandwidth allocation amongst CoreNet endpoints. Data Path Acceleration Architecture, which includes the following: Frame Manager (FMan), which supports in-line packet parsing and general classification to enable policing and QoS-based packet distribution Queue Manager (QMan) and Buffer Manager (BMan), which allow offloading of queue management, task management, load distribution, flow ordering, buffer management, and allocation tasks from the cores Security engine (SEC 5.3)-crypto-acceleration for protocols such as IPsec, SSL, and 802.16 RapidIO manager (RMAN) - Support SRIO types 8, 9, 10, and 11 (inbound and outbound). Supports types 5, 6 (outbound only) Large internal cache memory with snooping and stashing capabilities for bandwidth saving and high utilization of processor elements. The 9856-Kbyte internal memory space includes the following: 32 Kbyte L1 ICache per e6500/SC3900 core 32 Kbyte L1 DCache per e6500/SC3900 core 2048 Kbyte unified L2 cache for each SC3900 FVP cluster 2048 Kbyte unified L2 cache for the e6500 cluster Two 512 Kbyte shared L3 CoreNet platform caches (CPC) Sixteen 10-GHz SerDes lanes serving: Two Serial RapidIO interfaces. Each supports up to 4 lanes and a total of up to 8 lanes Up to 8-lanes Common Public Radio Interface (CPRI) controller for glue- less antenna connection Two 10-Gbit Ethernet controllers (10GEC) Six 1G/2.5-Gbit Ethernet controllers for network communications PCI Express controller Debug (Aurora) Two OCeaN DMAs Various system peripherals 182 32-bit timers Signed-off-by: York Sun <yorksun@freescale.com> Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com> Signed-off-by: Roy Zang <tie-fei.zang@freescale.com> Signed-off-by: Andy Fleming <afleming@freescale.com>
| * | | powerpc/mpc85xx: Add T4240 SoCYork Sun2012-10-22-5/+167
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add support for Freescale T4240 SoC. Feature of T4240 are (incomplete list): 12 dual-threaded e6500 cores built on Power Architecture® technology Arranged as clusters of four cores sharing a 2 MB L2 cache. Up to 1.8 GHz at 1.0 V with 64-bit ISA support (Power Architecture v2.06-compliant) Three levels of instruction: user, supervisor, and hypervisor 1.5 MB CoreNet Platform Cache (CPC) Hierarchical interconnect fabric CoreNet fabric supporting coherent and non-coherent transactions with prioritization and bandwidth allocation amongst CoreNet end-points 1.6 Tbps coherent read bandwidth Queue Manager (QMan) fabric supporting packet-level queue management and quality of service scheduling Three 64-bit DDR3/3L SDRAM memory controllers with ECC and interleaving support Memory prefetch engine (PMan) Data Path Acceleration Architecture (DPAA) incorporating acceleration for the following functions: Packet parsing, classification, and distribution (Frame Manager 1.1) Queue management for scheduling, packet sequencing, and congestion management (Queue Manager 1.1) Hardware buffer management for buffer allocation and de-allocation (BMan 1.1) Cryptography acceleration (SEC 5.0) at up to 40 Gbps RegEx Pattern Matching Acceleration (PME 2.1) at up to 10 Gbps Decompression/Compression Acceleration (DCE 1.0) at up to 20 Gbps DPAA chip-to-chip interconnect via RapidIO Message Manager (RMAN 1.0) 32 SerDes lanes at up to 10.3125 GHz Ethernet interfaces Up to four 10 Gbps Ethernet MACs Up to sixteen 1 Gbps Ethernet MACs Maximum configuration of 4 x 10 GE + 8 x 1 GE High-speed peripheral interfaces Four PCI Express 2.0/3.0 controllers Two Serial RapidIO 2.0 controllers/ports running at up to 5 GHz with Type 11 messaging and Type 9 data streaming support Interlaken look-aside interface for serial TCAM connection Additional peripheral interfaces Two serial ATA (SATA 2.0) controllers Two high-speed USB 2.0 controllers with integrated PHY Enhanced secure digital host controller (SD/MMC/eMMC) Enhanced serial peripheral interface (eSPI) Four I2C controllers Four 2-pin or two 4-pin UARTs Integrated Flash controller supporting NAND and NOR flash Two eight-channel DMA engines Support for hardware virtualization and partitioning enforcement QorIQ Platform's Trust Architecture 1.1 Signed-off-by: York Sun <yorksun@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org> Signed-off-by: Andy Fleming <afleming@freescale.com> Signed-off-by: Roy Zang <tie-fei.zang@freescale.com> Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com> Signed-off-by: Shengzhou Liu <Shengzhou.Liu@freescale.com> Signed-off-by: Andy Fleming <afleming@freescale.com>
| * | | driver/pci: Fix compiling errorYork Sun2012-10-22-0/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Fix compiling error in case CONFIG_SYS_PCIE2_MEM_VIRT or CONFIG_SYS_PCIE3_MEM_VIRT not defined. Signed-off-by: York Sun <yorksun@freescale.com> Signed-off-by: Andy Fleming <afleming@freescale.com>
| * | | fsl_pci: use 'Header Type' field to judge PCIE modeMinghuan Lian2012-10-22-14/+16
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The original code uses 'Programming Interface' field to judge if PCIE is EP or RC mode, however, T4240 does not support this functionality. According to PCIE specification, 'Header Type' offset 0x0e is used to indicate header type, so for PCIE controller, the patch changes code to use 'Header Type' field to identify if the PCIE is EP or RC mode. Signed-off-by: Minghuan Lian <Minghuan.Lian@freescale.com> Signed-off-by: Andy Fleming <afleming@freescale.com>
* | | | Merge branch 'master' of git://www.denx.de/git/u-boot-mmcTom Rini2012-10-22-753/+424
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| * | | | mmc: dw-mmc: support DesignWare MMC ControllerJaehoon Chung2012-10-22-0/+386
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Support the DesginWare MMC Controller. Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com> Signed-off-by: Rajeshawari Shinde <rajeshwari.s@samsung.com> Signed-off-by: Andy Fleming <afleming@freescale.com>
| * | | | mmc: pxa: Remove the old non-generic PXA MMC driverMarek Vasut2012-10-22-644/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This driver is no longer used and it's remaining users were converted to the new generic PXA MMC driver. Thus, remove this driver. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Andy Fleming <afleming@freescale.com> Signed-off-by: Andy Fleming <afleming@freescale.com>
generated by cgit v1.1 at 2024-12-23 18:22:07 +0000