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* net: sh_eth: add support for SH7757's GETHERYoshihiro Shimoda2012-07-23-0/+9
| | | | | | | | | SH7757 has 2 ETHERs and 2 GETHERs. This patch supports the SH7757's GETHER. If CONFIG_SH_ETHER_USE_GETHER is defined using SH7757, the driver handles the GETHER. Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com> Acked-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>
* net: sh_eth: modify the definitions of regsiterYoshihiro Shimoda2012-07-23-181/+258
| | | | | | | | | The previous code had many similar definitions in each CPU. This patch borrows from the sh_eth driver of Linux kernel. Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com> Acked-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>
* net: sh_eth: add SH_ETH_TYPE_ conditionYoshihiro Shimoda2012-07-23-33/+32
| | | | | | | | | | | | | | | | | | | | | At the moment, the driver supports the following CPUs: - GETHER (Gigabit Ethernet) : SH7763, SH7734 - ETHER (Fast Ethernet) : SH7724, SH7757 And the driver had the following "#if": #if defined(CONFIG_CPU_SH7763) || defined(CONFIG_CPU_SH7734) #if !defined(CONFIG_CPU_SH7757) && !defined(CONFIG_CPU_SH7724) - Those are for GETHER #if defined(CONFIG_CPU_SH7724) || defined(CONFIG_CPU_SH7757) - This is for ETHER So, for clean up the code, this patch adds SH_ETH_TYPE_GETHER and SH_ETH_TYPE_ETHER. And then, the patch modifies the above "#if". Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com> Acked-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>
* net: sh_eth: clean up for the SH7757's codeYoshihiro Shimoda2012-07-23-20/+3
| | | | | | | | The SH7757's ETHER can work using the SH7724's setting. So, the patch modifies it. Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com> Acked-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>
* net: fec_mxc: Fix MDC for xMIIbenoit.thebaudeau@advans2012-07-19-1/+1
| | | | | | | | | The MDC signal is available on all xMII (i.e. 'not 7-wire') interfaces, so mii_speed has to be set for all these interfaces, and not only for MII. Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com> Cc: Joe Hershberger <joe.hershberger@gmail.com> Cc: Stefano Babic <sbabic@denx.de>
* net: fec_mxc: Fix setting of RCR for xMIIbenoit.thebaudeau@advans2012-07-19-5/+3
| | | | | | | | | | | | | | | | | | At least on i.MX25, the RMII mode did not work, which is fixed by this patch. The MII_MODE bit of the FEC RCR register means xMII, i.e. 'not 7-wire', so set it accordingly. According to the xMII and 7-wire (aka GPSI) standards, full duplex should be available on xMII, but not on 7-wire, so set FCE accordingly. The FEC may support full duplex for 7-wire too, but the reference manual does not say that, so avoid an invalid assumption. Actually, the choice between half and full duplex also depends on the endpoint/switch/repeater configuration, so a config option could be added for that, but there has been no need for it so far. Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com> Cc: Joe Hershberger <joe.hershberger@gmail.com> Cc: Stefano Babic <sbabic@denx.de>
* Merge branch 'next' of git://git.denx.de/u-boot-net into nextWolfgang Denk2012-07-12-24/+75
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | * 'next' of git://git.denx.de/u-boot-net: net: Inline the new eth_setenv_enetaddr_by_index function net: allow setting env enetaddr from net device setting net/designware: Consecutive writes to the same register to be avoided CACHE: net: asix: Fix asix driver to work with data cache on net: phy: micrel: make ksz9021 phy accessible net: abort network initialization if the PHY driver fails phylib: phy_startup() should return an error code on failure net: tftp: fix type of block arg to store_block Signed-off-by: Wolfgang Denk <wd@denx.de>
| * net/designware: Consecutive writes to the same register to be avoidedDinh Nguyen2012-07-11-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This commit is an add-on to f6c4191f. There are a few registers where consecutive writes to the same location should be avoided or have a delay. According to Synopsys, here is a list of the registers and bit(s) where consecutive writes should be avoided or a delay is required: DMA Registers: Register 0 Bit 7 Register 6 All bits except for 24, 16-13, 2-1. GMAC Registers: Registers 0-3 All bits Registers 6-7 All bits Register 10 All bits Register 11 All bits except for 5-6. Registers 16-47 All bits Register 48 All bits except for 18-16, 14. Register 448 Bit 4. Register 459 Bits 0-3. Signed-off-by: Dinh Nguyen <dinguyen@altera.com> Reviewed-by: Matthew Gerlach <mgerlach@altera.com> Acked-by: Amit Virdi <amit.virdi@st.com>
| * CACHE: net: asix: Fix asix driver to work with data cache onMarek Vasut2012-07-11-13/+17
| | | | | | | | | | | | | | | | | | The asix driver did not align buffers, therefore it didn't work with data cache enabled. Fix this. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Joe Hershberger <joe.hershberger@gmail.com> Acked-by: Joe Hershberger <joe.hershberger@gmail.com>
| * net: phy: micrel: make ksz9021 phy accessibleTroy Kisky2012-07-11-2/+13
| | | | | | | | | | | | | | | | | | | | Micrel accidentally used the same part number for the KS8721 and KSZ9021. So, both cannot be in the same build of u-boot. Add a config option to handle this. Signed-off-by: Troy Kisky <troy.kisky@boundarydevices.com> Acked-by: Vladimir Zapolskiy <vz@mleia.com>
| * net: abort network initialization if the PHY driver failsTimur Tabi2012-07-11-6/+39
| | | | | | | | | | | | | | | | | | | | Now that phy_startup() can return an actual error code, check for that error code and abort network initialization if the PHY fails. Signed-off-by: Timur Tabi <timur@freescale.com> Acked-by: Nobuhiro Iwamamatsu <nobuhiro.iwamatsu.yj@renesas.com> (sh_eth part) Acked-by: Stephan Linz <linz@li-pro.net> (Xilinx part, xilinx_axi_emac and xilinx_ll_temac) Reviewed-by: Marek Vasut <marex@denx.de> (FEC part)
| * phylib: phy_startup() should return an error code on failureTimur Tabi2012-07-11-1/+4
| | | | | | | | | | | | | | phy_startup() calls the PHY driver's startup function, but it ignores the return code from that function, and so it never returns any failures. Signed-off-by: Timur Tabi <timur@freescale.com>
* | Merge branch 'master' of git://git.denx.de/u-boot-i2cWolfgang Denk2012-07-12-28/+5
|\ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | * 'master' of git://git.denx.de/u-boot-i2c: mx28evk: Add I2C support mxs-i2c: Fix internal address byte order mxc_i2c: remove setting speed at each start mx6qsabrelite: add i2c support mxc_i2c: specify i2c base address in config file Signed-off-by: Wolfgang Denk <wd@denx.de>
| * | mxs-i2c: Fix internal address byte orderTorsten Fleischer2012-07-11-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Large EEPROMs, e.g. 24lc32, need 2 byte to address the internal memory. These devices require that the high byte of the internal address has to be written first. The mxs_i2c driver currently writes the address' low byte first. The following patch fixes the byte order of the internal address that should be written to the I2C device. Signed-off-by: Torsten Fleischer <to-fleischer@t-online.de> CC: Marek Vasut <marex@denx.de> CC: Stefano Babic <sbabic@denx.de> CC: Fabio Estevam <fabio.estevam@freescale.com> Acked-by: Marek Vasut <marex@denx.de> Acked-by: Stefano Babic <sbabic@denx.de>
| * | mxc_i2c: remove setting speed at each startTroy Kisky2012-07-11-6/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Other then being very weird, this code was also wrong. For example, say I set speed to 100K. I'll read back the speed as 85937. But the speed is really 85937.5, so we I reset the speed to 85937, I'll get 73660.7. After a couple of transactions my speed is now exactly 68750 so it will remain there. Signed-off-by: Troy Kisky <troy.kisky@boundarydevices.com> Acked-by: Marek Vasut <marex@denx.de> Acked-by: Stefano Babic <sbabic@denx.de>
| * | mxc_i2c: specify i2c base address in config fileTroy Kisky2012-07-11-21/+4
| |/ | | | | | | | | | | | | | | | | The following platforms had their config files changed flea3, imx31_phycore, mx35pdk, mx53ard, mx53evk, mx53smd and mx53loco. Signed-off-by: Troy Kisky <troy.kisky@boundarydevices.com> Acked-by: Stefano Babic <sbabic@denx.de>
* | net/sh-ether: Fix build by removing ECSIPR_BRCRXIP and otherNobuhiro Iwamatsu2012-07-10-4/+3
|/ | | | | | | | When support sh7734 of sh-ether, ECSIPR_BRCRXIP and other were removed. Therefore SH7757 and SH7724 can not build. This revise this probelem. Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org> Tested-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
* Merge branch 'master' of git://git.denx.de/u-boot-armWolfgang Denk2012-07-10-1/+17
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | * 'master' of git://git.denx.de/u-boot-arm: tegra: define fdt_load/fdt_high variables tegra: enable bootz command tegra: usb: Fix device enumeration problem of USB1 tegra: trimslice: set up serial flash pinmux tegra: add pin_mux_spi() board initialization function tegra: add GMC/GMD funcmux entry for SFLASH tegra: bootcmd: start USB only when needed tegra: bootcmd enhancements tegra: add enterrcm command tegra: enable CONFIG_ENV_VARS_UBOOT_CONFIG Add env vars describing U-Boot target board tegra: usb: fix wrong error check tegra: add ULPI on USB2 funcmux entry tegra: fix leftover CONFIG_TEGRA2_MMC & _SPI build switches tegra: Add Tamonten Evaluation Carrier support tegra: Use SD write-protect GPIO on Tamonten tegra: Implement gpio_early_init() on Tamonten tegra: Allow boards to perform early GPIO setup tegra: plutux: Add device tree support tegra: medcom: Add device tree support tegra: Rework Tamonten support beagle: add eeprom expansion board info for bct brettl4 Signed-off-by: Wolfgang Denk <wd@denx.de>
| * tegra: usb: Fix device enumeration problem of USB1Jim Lin2012-07-09-1/+17
| | | | | | | | | | | | | | | | | | | | | | | | | | | | A known hardware issue of USB1 port where bit 1 (connect status change) of PORTSC register will be set after issuing Port Reset (like "usb reset" in u-boot command line). This will be treated as an error and stops later device enumeration. Therefore we clear that bit after Port Reset in order to proceed later device enumeration. Signed-off-by: Jim Lin <jilin@nvidia.com> Acked-by: Stephen Warren <swarren@wwwdotorg.org> Signed-off-by: Tom Warren <twarren@nvidia.com>
* | EXYNOS: Add power Enable/Disable for USB-EHCIRajeshwari Shinde2012-07-09-0/+5
| | | | | | | | | | | | | | | | | | This patch adds functions to enable/disable the power of USB host controller for EXYNOS5. Signed-off-by: Vivek Gautam <gautam.vivek@samsung.com> Signed-off-by: Che-Liang Chiou <clchiou@chromium.org> Signed-off-by: Rajeshwari Shinde <rajeshwari.s@samsung.com>
* | USB: EXYNOS: Set USB 2.0 HOST Link modeRajeshwari Shinde2012-07-09-0/+3
| | | | | | | | | | | | | | This patch adds a function to set usb host mode to USB 2.0 HOST Link for EXYNOS5 Signed-off-by: Rajeshwari Shinde <rajeshwari.s@samsung.com>
* | USB: EXYNOS: Incorporate EHCI review commentsRajeshwari Shinde2012-07-09-10/+10
|/ | | | | | | This patch incorates the review comments given by Minkyu Kang for EHCI support on EXYNOS Signed-off-by: Rajeshwari Shinde <rajeshwari.s@samsung.com>
* Remove remaining mdelay() macrosAnatolij Gustschin2012-07-08-2/+0
| | | | | | | Drop mdelay() macros since we already have a common mdelay() func. Signed-off-by: Anatolij Gustschin <agust@denx.de> Acked-by: Mike Frysinger <vapier@gentoo.org>
* MTD: SPEAr SMI: Add write support for length < 4 bytesStefan Roese2012-07-07-4/+18
| | | | | | | | Needed for redundant environment for example. Signed-off-by: Stefan Roese <sr@denx.de> Cc: Amit Virdi <amit.virdi@st.com> Cc: Vipin Kumar <vipin.kumar@st.com>
* i2c: designware_i2c.c: Add support for the "i2c probe" commandStefan Roese2012-07-07-6/+10
| | | | | | | | | | | | | | | i2c_probe() is changed to reinit the i2c bus upon read failure. This is naturally the case upon i2c bus probing. Also, some printf messages upon read failure are removed. As they would interfere with the "i2c probe" command. Additionally, i2c_set_bus_speed() now returns 0, so that the "i2c speed" command can be used. Signed-off-by: Stefan Roese <sr@denx.de> Cc: Amit Virdi <amit.virdi@st.com> Cc: Vipin Kumar <vipin.kumar@st.com>
* rtc/m41t62: Add support for M41T82 with HT (Halt Update)Stefan Roese2012-07-07-1/+9
| | | | | | | | | | | | Add support for the M41T82 RTC to the m41t62 driver. The only difference that needs to be handled by this driver, is to clear the HT (Halt Update) bit upon reset. This bit is not used on the M41T62, so its save to clear this bit always. The M41T82 support will be used by the X600 (SPEAr600) board support. Signed-off-by: Stefan Roese <sr@denx.de>
* GPIO: Add SPEAr GPIO driverStefan Roese2012-07-07-0/+103
| | | | | | Tested on x600 (SPEAr600). Signed-off-by: Stefan Roese <sr@denx.de>
* net: Multiple updates/enhancements to designware.cStefan Roese2012-07-07-69/+50
| | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch adds the following changes to designware ethernet driver found on the ST SPEAr SoC: - Don't init MAC & PHY upon startup. This causes a delay, waiting for the auto negotiation to complete. And we don't want this delay to always happen. Especially not on platforms where ethernet is not used at all (e.g. booting via flash). Instead postpone the MAC / PHY configuration to the stage, where ethernet is first used. - Add possibility for board specific PHY init code. This is needed for example on the X600 board, where the Vitesse PHY needs to be configured for GMII mode. This board specific PHY init is done via the function designware_board_phy_init(). And this driver now adds a weak default which can be overridden by board code. - Use common functions miiphy_speed() & miiphy_duplex() to read link status from PHY. - Print status and progress of auto negotiation. - Print link status (speed, dupex) upon first usage. Signed-off-by: Stefan Roese <sr@denx.de> Cc: Amit Virdi <amit.virdi@st.com> Cc: Vipin Kumar <vipin.kumar@st.com> Cc: Joe Hershberger <joe.hershberger@gmail.com> Acked-by: Joe Hershberger <joe.hershberger@gmail.com>
* SPEAr: Add interface information in initializationVipin Kumar2012-07-07-1/+10
| | | | | | | | | | Few Designware peripheral registers need to be modified based on the ethernet interface selected by the board. This patch supports interface information in ethernet driver Signed-off-by: Vipin Kumar <vipin.kumar@st.com> Signed-off-by: Amit Virdi <amit.virdi@st.com> Signed-off-by: Stefan Roese <sr@denx.de>
* st_smi: Fixed page size for Winbond W25Q128FV flashArmando Visconti2012-07-07-1/+1
| | | | | | Signed-off-by: Armando Visconti <armando.visconti@st.com> Signed-off-by: Amit Virdi <amit.virdi@st.com> Signed-off-by: Stefan Roese <sr@denx.de>
* st_smi: Change timeout loop implementationAmit Virdi2012-07-07-10/+17
| | | | | | | | | | | There are two problems in the current timeout loop implementation: 1. In case initial test failing, there will always be a delay of 1 ms 2. The delay duration is not tunable The new implementation addresses both these limitations. Signed-off-by: Amit Virdi <amit.virdi@st.com> Signed-off-by: Stefan Roese <sr@denx.de>
* st_smi: Fix bug in flash_print_info()Armando Visconti2012-07-07-2/+7
| | | | | | | | | If the flash size was smaller than 1MB then flash_print_info() was erroneously reporting 0 MB. Signed-off-by: Armando Visconti <armando.visconti@st.com> Signed-off-by: Amit Virdi <amit.virdi@st.com> Signed-off-by: Stefan Roese <sr@denx.de>
* st_smi: Change the flash probing methodArmando Visconti2012-07-07-27/+65
| | | | | | | | | | THis patch introduces a new methodology for flash probing in which flash_devices[] table, looked-up thru the dev_id, is used to locate the flash geometry and information. Signed-off-by: Armando Visconti <armando.visconti@st.com> Signed-off-by: Amit Virdi <amit.virdi@st.com> Signed-off-by: Stefan Roese <sr@denx.de>
* st_smi: Removed no needed dependency on ST_M25Pxx_IDArmando Visconti2012-07-07-32/+18
| | | | | | | | | | Since the smi erase code is very generic and works for any kind of flash, there is no need to test for ST_M25Pxx_ID flash types like m25p40 flashes). Signed-off-by: Armando Visconti <armando.visconti@st.com> Signed-off-by: Amit Virdi <amit.virdi@st.com> Signed-off-by: Stefan Roese <sr@denx.de>
* st_smi: Fix smi read statusVipin Kumar2012-07-07-6/+2
| | | | | | | | | | | | smi_read_sr fails sometimes because of TFF not getting set within assumed time. This condition may arise because of, for example, smi memory being in a erase mode. This fix is to enable reading the status register until timeout. Signed-off-by: Vipin Kumar <vipin.kumar@st.com> Signed-off-by: Amit Virdi <amit.virdi@st.com> Signed-off-by: Stefan Roese <sr@denx.de>
* st_smi: Move status register read before modifying ctrl registerShiraz Hashim2012-07-07-2/+4
| | | | | | Signed-off-by: Shiraz Hashim <shiraz.hashim@st.com> Signed-off-by: Amit Virdi <amit.virdi@st.com> Signed-off-by: Stefan Roese <sr@denx.de>
* st_smi: Read status until timeout happensVipin KUMAR2012-07-07-1/+1
| | | | | | | | | SMI driver read status fails because the control register could not be overwritten. Instead, the read status should be tried until timeout. Signed-off-by: Vipin Kumar <vipin.kumar@st.com> Signed-off-by: Amit Virdi <amit.virdi@st.com> Signed-off-by: Stefan Roese <sr@denx.de>
* st_smi: Enhance the error handlingAmit Virdi2012-07-07-13/+21
| | | | | | | | | | | This commit does the following: - Reports error if SNOR flash is not found on the board - Changes smi_read_sr to return error using which a retry mechanism is implemented for reading flash status Signed-off-by: Vipin Kumar <vipin.kumar@st.com> Signed-off-by: Amit Virdi <amit.virdi@st.com> Signed-off-by: Stefan Roese <sr@denx.de>
* st_smi: Return error in case TFF is not setAmit Virdi2012-07-07-8/+14
| | | | | | | | | | Curently the code makes wrong assumption that the Transfer finished flag shall be set within the stipulated time. However, there may occur a scenario in which the TFF flag is not set. Return error in that case. Signed-off-by: Vipin Kumar <vipin.kumar@st.com> Signed-off-by: Amit Virdi <amit.virdi@st.com> Signed-off-by: Stefan Roese <sr@denx.de>
* st_smi: Add support for SPEAr SMI driverVipin KUMAR2012-07-07-4/+5
| | | | | | | | | | | | | | SMI is the serial memory interface controller provided by ST. Earlier, a driver exists in the u-boot source code for the SMI IP. However, it was specific to spear platforms. This commit converts the same driver to a more generic driver. As a result, the driver files are renamed to st_smi.c and st_smi.h and moved into drivers/mtd folder for reusability by other platforms using smi controller peripheral. Signed-off-by: Vipin Kumar <vipin.kumar@st.com> Signed-off-by: Amit Virdi <amit.virdi@st.com> Signed-off-by: Stefan Roese <sr@denx.de>
* mtd/NAND: Remove obsolete SPEAr specific NAND driversVipin KUMAR2012-07-07-124/+0
| | | | | | | | | | | Since, SPEAr platform uses generic FSMC driver now, so spear specific files drivers/mtd/nand/spr_nand.c, arch/arm/include/asm/arch-spear/spr_nand.h are removed Signed-off-by: Vipin Kumar <vipin.kumar@st.com> Signed-off-by: Amit Virdi <amit.virdi@st.com> Signed-off-by: Stefan Roese <sr@denx.de> Acked-by: Scott Wood <scottwood@freescale.com>
* mtd/NAND: Add FSMC driver supportVipin KUMAR2012-07-07-0/+487
| | | | | | | | | | | | | | Flexible static memory controller is a peripheral provided by ST, which controls the access to NAND chips along with many other memory device chips eg NOR, SRAM. This patch adds the driver support for FSMC controller interfacing with NAND memory. Signed-off-by: Vipin Kumar <vipin.kumar@st.com> Signed-off-by: Amit Virdi <amit.virdi@st.com> Signed-off-by: Stefan Roese <sr@denx.de> Acked-by: Scott Wood <scottwood@freescale.com>
* da850/omap-l138: Enable auto negotiation in RMII modeRajashekhara, Sudhakar2012-07-07-0/+8
| | | | | | | | | | | | On DA850/OMAP-L138 it was observed that in RMII mode, auto negotiation was not performed. This patch enables auto negotiation in RMII mode. Without this patch, EMAC initialization takes more time and sometimes tftp fails in RMII mode. Signed-off-by: Rajashekhara, Sudhakar <sudhakar.raj@ti.com> Signed-off-by: Lad, Prabhakar <prabhakar.lad@ti.com> Signed-off-by: Hadli, Manjunath <manjunath.hadli@ti.com>
* kw_spi: add weak functions board_spi_claim/release_busValentin Longchamp2012-07-07-1/+12
| | | | | | | | | | This allows a final, board specific, step in the claim/relase_bus function for the SPI controller, which may be needed for some hardware designs. Signed-off-by: Valentin Longchamp <valentin.longchamp@keymile.com> cc: Holger Brunck <holger.brunck@keymile.com> cc: Prafulla Wadaskar <prafulla@marvell.com>
* kw_spi: support spi_claim/release_bus functionsValentin Longchamp2012-07-07-0/+36
| | | | | | | | | | | | | These two function nows ensure that the MPP is configured correctly for the SPI controller before any SPI access, and restore the initial configuration when the access is over. Since the used pins for the SPI controller can differ (2 possibilities for each signal), the used pins are configured with CONFIG_SYS_KW_SPI_MPP. Signed-off-by: Valentin Longchamp <valentin.longchamp@keymile.com> cc: Holger Brunck <holger.brunck@keymile.com> cc: Prafulla Wadaskar <prafulla@marvell.com>
* kw_spi: backup and reset the MPP of the chosen CS pinValentin Longchamp2012-07-07-9/+6
| | | | | | | | | This was not done before, and in the case of a shared pin (for MPP0 between NF_IO[2] and CSn) this could lead to problems. Signed-off-by: Valentin Longchamp <valentin.longchamp@keymile.com> cc: Holger Brunck <holger.brunck@keymile.com> cc: Prafulla Wadaskar <prafulla@marvell.com>
* ATMEL/PIO: Enable new feature of PIO on Atmel deviceBo Shen2012-07-07-2/+123
| | | | | | | | Enable new PIO feature supported by Atmel SoC. Using CPU_HAS_PIO3 micro to enable PIO new feature. Signed-off-by: Bo Shen <voice.shen@atmel.com> Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
* ehci-atmel: fix compiler warningAndreas Bießmann2012-07-07-2/+2
| | | | | | | | | | | | | | | | Commit 7a101e946cba55e32d3d1265e30456c810046da3 introduced following warning: ---8<--- ehci-atmel.c: In function 'ehci_hcd_init': ehci-atmel.c:49:2: warning: suggest parentheses around comparison in operand of '&' [-Wparentheses] ehci-atmel.c: In function 'ehci_hcd_stop': ehci-atmel.c:79:2: warning: suggest parentheses around comparison in operand of '&' [-Wparentheses] --->8--- This patch fixes it. Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com> cc: Bo Shen <voice.shen@atmel.com> cc: Marek Vasut <marex@denx.de>
* Atmel : usb : add EHCI driver for Atmel SoCBo Shen2012-07-07-0/+90
| | | | | | | | | | | | | | | Some Atmel SoC support USB EHCI, add the EHCI driver to support it. To enable the USB EHCI, add the following configuration options into board relative configuration file and remove USB OHCI options. #define CONFIG_USB_EHCI #define CONFIG_USB_EHCI_ATMEL #define CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTS 2 Signed-off-by: Bo Shen <voice.shen@atmel.com> Acked-by: Marek Vasut <marex@denx.de> Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
* TRATS: initialize panel_info data structure in board fileDonghwa Lee2012-07-07-3/+0
| | | | | | | | | | | | panel_info data structure is gloable variable, so, I have initialized it in board file. If it is initialized in init_panel_info() like existing, it can't be used in drv_lcd_init() in common/lcd.c because init_panel_info() is called after drv_lcd_init(). Signed-off-by: Donghwa Lee <dh09.lee@samsung.com> Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com> Acked-by: Anatolij Gustschin <agust@denx.de> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
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