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* Merge branch 'master' of git://git.denx.de/u-boot into resolveMinkyu Kang2012-12-10-717/+15186
|\ | | | | | | | | | | | | | | | | | | | | Conflicts: README board/samsung/universal_c210/universal.c drivers/misc/Makefile drivers/power/power_fsl.c include/configs/mx35pdk.h include/configs/mx53loco.h include/configs/seaboard.h
| * Merge branch 'master' of git://git.denx.de/u-boot-x86Tom Rini2012-12-07-0/+293
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| | * video: Check for valid FB pointer before clearingDuncan Laurie2012-12-06-0/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This command will start erasing at memory address zero if there is not a valid framebuffer address that was found during video_init(). This is a common case with Chrome OS devices in normal mode when we do not execute the video option rom in coreboot. Signed-off-by: Duncan Laurie <dlaurie@chromium.org> Signed-off-by: Simon Glass <sjg@chromium.org>
| | * x86: gpio: Add additional GPIO banks to the ICH6 driverBill Richardson2012-12-06-62/+110
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | We can generally trust the ICH to have GPIO Bank 0 (the first 32 pins) in the same place across all versions. This change adds two more banks, for up to 96 GPIOS. BUT: - Not all chipsets have the same number of GPIOs - Not all chipsets have the same number of GPIO banks - Not all chipsets put the additional banks at the same offset from GPIOBASE - There so many chipset variants that it's pretty much impossible to support them all, or even keep track of the new ones. So, although this adds suppport for the additional banks that seem to work for the particular variants of CougarPoint Mobile chipsets that we've tried, there's no chance it will support everything Intel produces. Good luck. Signed-off-by: Bill Richardson <wfrichar@chromium.org> Signed-off-by: Simon Glass <sjg@chromium.org>
| | * x86: gpio: Add GPIO driver for Intel ICH6 and later.Bill Richardson2012-12-06-0/+243
| | | | | | | | | | | | | | | | | | | | | | | | | | | Implement <asm-generic/gpio.h> functions for Intel ICH6 and later. Only GPIOs 0-31 are handled by this code. Signed-off-by: Bill Richardson <wfrichar@chromium.org> Signed-off-by: Simon Glass <sjg@chromium.org>
| * | serial_pl011: Set RTS during initializationJoshua Housh2012-12-07-2/+2
| |/ | | | | | | | | | | | | | | | | | | | | If the pl011 is connected to another device which has hardware flow-control on, characters are never received by the pl011. Asserting RTS when flow-control is off will have no effect. This is in line with how Linux behaves. Signed-off-by: Joshua Housh <joshua.housh@calxeda.com> Tested-by: Marek Vasut <marex@denx.de>
| * Merge branch 'master' of git://git.denx.de/u-boot-x86Tom Rini2012-12-03-0/+170
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| | * x86: video: Add coreboot framebuffer supportStefan Reinauer2012-11-30-0/+102
| | | | | | | | | | | | | | | | | | | | | Add a basic driver for the coreboot framebuffer. Signed-off-by: Stefan Reinauer <reinauer@chromium.org> Signed-off-by: Simon Glass <sjg@chromium.org>
| | * x86: Add console command to display CBMEM console bufferVadim Bendebury2012-11-30-0/+67
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This command is useful to allow to observe messages generated by coreboot and u-boot until present. In particular it is handy when u-boot is instrumented to fall through into console mode on startup errors. Signed-off-by: Vadim Bendebury <vbendeb@chromium.org> Signed-off-by: Simon Glass <sjg@chromium.org>
| | * x86: Add CBMEM console driver for corebootVadim Bendebury2012-11-30-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch builds upon the recently introduced CBMEM console feature of coreboot. CBMEM console uses a memry area allocated by coreboot to store the console output. The memory area has a certain structure, which allows to determine where the buffer is, the buffer size and the location of the pointer in the buffer. This allows different phases of the firmware (rom based coreboot, ram based coreboot, u-boot after relocation with this change) to keep adding text to the same buffer. Note that this patch introduces a new console driver and adds the driver to the list of drivers to be used for console output, i.e. it engages only after u-boot relocates. Usiong CBMEM console for capturing the pre-relocation console output will be done under a separate change. >From Linux, run the cbmem.py utility (which is a part of the coreboot package) to see the output, e.g.: vvvvvvvvvvvvvvvvv SCSI: AHCI 0001.0300 32 slots 6 ports ? Gbps 0xf impl SATA mode flags: 64bit ilck stag led pmp pio ... Magic signature found Kernel command line: "cros_secure quiet loglevel=1 console=tty2... ^^^^^^^^^^^^^^^^^ Note that the entire u-boot output fits into the buffer only if the coreboot log level is reduced from the most verbose. Ether the buffer size will have to be increased, or the coreboot verbosity permanently reduced. Signed-off-by: Vadim Bendebury <vbendeb@chromium.org> Signed-off-by: Simon Glass <sjg@chromium.org>
| * | serial: serial_sh: bugfix: autoboot fails if serial console is not connectedTetsuyuki Kobayashi2012-11-30-7/+13
| |/ | | | | | | | | | | | | | | | | | | | | | | | | | | On kzm9g board (rmobile SoC), autoboot fails if serial console cable is not connected. When serial cable is not connected, serial error occurs and some garbage comes in data register. sh_serial_tstc() in serial_sh.c does not check error status and misunderstand there is some input data. It is the reason that autoboot fails. This patch adds checking error status in sh_serial_tstc(). This patch is based on v2013.01-rc1 tag of u-boot master git. Signed-off-by: Tetsuyuki Kobayashi <koba@kmckk.co.jp> Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
| * Merge branch 'master' of git://www.denx.de/git/u-boot-mpc85xxTom Rini2012-11-28-0/+136
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| | * powerpc/p4080ds: fix PCI-e x8 link training down failureYuanquan Chen2012-11-27-0/+22
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Due to SerDes configuration error, if we set the PCI-e controller link width as x8 in RCW and add a narrower width(such as x4, x2 or x1) PCI-e device to PCI-e slot, it fails to train down to the PCI-e device's link width. According to p4080ds errata PCIe-A003, we reset the PCI-e controller link width to x4 in u-boot. Then it can train down to x2 or x1 width to make the PCI-e link between RC and EP. Signed-off-by: Yuanquan Chen <B41889@freescale.com> Signed-off-by: Andy Fleming <afleming@freescale.com>
| | * powerpc/85xx: add support for the Freescale P5040DS Superhydra reference boardTimur Tabi2012-11-27-0/+114
| | | | | | | | | | | | | | | | | | | | | | | | | | | The P5040DS reference board (a.k.a "Superhydra") is an enhanced version of P3041DS/P5020DS ("Hydra") reference board. Signed-off-by: Timur Tabi <timur@freescale.com> Signed-off-by: Shaohui Xie <Shaohui.Xie@freescale.com> Signed-off-by: Andy Fleming <afleming@freescale.com>
| * | mmc: Properly determine maximum supported bus widthAndy Fleming2012-11-27-12/+35
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | At some point, a confusion arose about the use of the bit definitions in host_caps for bus widths, and the value in ext_csd. By coincidence, a simple shift could convert between one and the other: MMC_MODE_1BIT = 0, EXT_CSD_BUS_WIDTH_1 = 0 MMC_MODE_4BIT = 0x100, EXT_CSD_BUS_WIDTH_4 = 1 MMC_MODE_8BIT = 0x200, EXT_CSD_BUS_WIDTH_8 = 2 However, as host_caps is a bitmask of supported things, there is not, in fact, a one-to-one correspondence. host_caps is capable of containing MODE_4BIT | MODE_8BIT, so nonsensical things were happening where we would try to set the bus width to 12. The new code clarifies the very different namespaces: host_caps/card_caps = bitmask (MMC_MODE_*) ext CSD fields are just an index (EXT_CSD_BUS_WIDTH_*) mmc->bus_width integer number of bits (1, 4, 8) We create arrays to map between the namespaces, like in Linux. Signed-off-by: Andy Fleming <afleming@freescale.com> Tested-by: Jaehoon Chung <jh80.chung@samsung.com> Tested-by: Stephen Warren <swarren@nvidia.com>
| * | mmc: tegra: use bounce buffer APIsStephen Warren2012-11-27-23/+41
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Tegra's MMC driver does DMA, and hence needs cache-aligned buffers. In some cases (e.g. user load commands) this cannot be guaranteed by callers of the MMC APIs. To solve this, modify the Tegra MMC driver to use the new bounce_buffer_*() APIs. Note: Ideally, all U-Boot code will always provide address- and size- aligned buffers, so a bounce buffer will only ever be needed for user- supplied buffers (e.g. load commands). Ensuring this removes the need for performance-sucking bounce buffer cache management and memcpy()s. The one known exception at present is the SCR buffer in sd_change_freq(), which is only 8 bytes long. Solving this requires enhancing struct mmc_data to know the difference between buffer size and transferred data size, or forcing all callers of mmc_send_cmd() to have allocated buffers using ALLOC_CACHE_ALIGN_BUFFER(), which while true in this case, is not enforced in any way at present, and so cannot be assumed by the core MMC code. Signed-off-by: Stephen Warren <swarren@nvidia.com> Acked-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> Signed-off-by: Andy Fleming <afleming@freescale.com>
| * | common: rework bouncebuf implementationStephen Warren2012-11-27-23/+7
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The current bouncebuf API requires all parameters to be passed to both bounce_buffer_start() and bounce_buffer_stop(). Modify the bouncebuf start function to accept a state structure as a parameter, and only require that state struct to be passed to the stop function. This simplifies usage of the bounce buffer by clients. Don't modify the data pointer, but rather store the temporary buffer in this state struct. The bouncebuf code ensures that client code can always use a single buffer pointer in the state structure, irrespective of whether a bounce buffer actually had to be allocated. Move cache management logic into the bounce buffer code, so that each client doesn't have to duplicate this. I believe there's no need to invalidate the buffer before a DMA operation, since flushing the cache should prevent any write-backs. Update the MXS MMC driver for this change. Signed-off-by: Stephen Warren <swarren@nvidia.com> Acked-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> Signed-off-by: Andy Fleming <afleming@freescale.com>
| * | mmc: add no simultaenous power and vddMela Custodio2012-11-27-0/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Bring in the code from Linux kernel. Added to Linux kernel by: commit e08c1694d9e2138204f2b79b73f0f159074ce2f5 Author: Andres Salomon <dilinger@queued.net> Date: Fri Jul 4 10:00:03 2008 -0700 Some HW balks when writing both voltage setting and power up at the same time to SDHCI_POWER_CONTROL register. Signed-off-by: Rommel G Custodio <sessyargc@gmail.com> CC: Andy Fleming <afleming@freescale.com> v2: fix attribution and SOB Signed-off-by: Andy Fleming <afleming@freescale.com>
| * | mmc: Fix interpretation of MMC_CMD_ALL_SEND_CIDTaylor Hutt2012-11-27-7/+9
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The interpretation of the data returned by the MMC_CMD_ALL_SEND_CID command was incorrect with respect to the JEDEC Standard No. 84-A441. This change makes the interpretation correct with respect to the defined fields of the CID register. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Taylor Hutt <thutt@chromium.org> Signed-off-by: Andy Fleming <afleming@freescale.com>
| * | EXYNOS: mmc: support DesignWare Controller for Samsung-SoCJaehoon Chung2012-11-27-0/+58
| |/ | | | | | | | | | | | | | | | | Support DesignWare MMC Controller for Samsung Specific. Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com> Signed-off-by: Rajeshawari Shinde <rajeshwari.s@samsung.com> Signed-off-by: Andy Fleming <afleming@freescale.com>
| * Remove obsolete header filePantelis Antoniou2012-11-27-1/+0
| | | | | | | | | | | | | | usbdescriptors.h conflicts with linux/usb/ch9.h Remove it. Signed-off-by: Pantelis Antoniou <panto@antoniou-consulting.com>
| * Merge branch 'master' of git://git.denx.de/u-boot-nand-flashTom Rini2012-11-26-380/+426
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| | * nand: Add torture featureBenoît Thébaudeau2012-11-26-0/+122
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch adds a NAND Flash torture feature, which is useful as a block stress test to determine if a block is still good and reliable (or should be marked as bad), e.g. after a write error. This code is ported from mtd-utils' lib/libmtd.c. Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com> Cc: Scott Wood <scottwood@freescale.com> [scottwood@freescale.com: removed unnec. ifdef and unwrapped error strings] Signed-off-by: Scott Wood <scottwood@freescale.com>
| | * nand: Fix nand_erase_opts() offset checkBenoît Thébaudeau2012-11-26-2/+2
| | | | | | | | | | | | | | | | | | | | | NAND Flash is erased by blocks, not by pages. Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com> Cc: Scott Wood <scottwood@freescale.com>
| | * nand: Clean up nand_utilBenoît Thébaudeau2012-11-26-32/+32
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch cleans up nand_util.c: - Fix tabs. - Fix typos. - Remove space character before opening parenthesis in function calls. - Fix comments. Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com> Cc: Scott Wood <scottwood@freescale.com>
| | * nand: Move the sub-page read support enable to a flagJoe Hershberger2012-11-26-2/+7
| | | | | | | | | | | | | | | | | | | | | | | | | | | Use a flag instead of a hard-coded macro so that sub-page reads can be enabled in other cases (such as on-die ecc). This is the same as a5ff4f102937a3492bca4a9ff0c341d78813414c in Linux Signed-off-by: Joe Hershberger <joe.hershberger@ni.com>
| | * driver/mtd:IFC NAND:Initialise internal SRAM before any writePrabhakar Kushwaha2012-11-26-1/+61
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | IFC-1.1.0 uses 28nm techenology for SRAM. This tech has known limitaion for SRAM i.e. "byte select" is not supported. Hence Read Modify Write is implemented in IFC for any "system side write" into sram buffer. Reading an uninitialized memory results in ECC Error from sram wrapper. Hence we must initialize/prefill SRAM buffer by any data before writing anything in SRAM from system side. To initialize SRAM user can use "READID" NAND command with read bytes equal to SRAM size. It will be a one time activity post boot Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com> [scottwood@freescale.com: fix fsl_ifc_sram_init prototype] Signed-off-by: Scott Wood <scottwood@freescale.com>
| | * nand/fsl: add NAND_NO_SUBPAGE_WRITE to eLBC and IFC driversScott Wood2012-11-26-2/+2
| | | | | | | | | | | | | | | | | | These controllers can only do hardware ECC on full page transfers. Signed-off-by: Scott Wood <scottwood@freescale.com>
| | * spl/nand: config symbol documentationScott Wood2012-11-26-0/+172
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Document parameters used for specifying the NAND image to be loaded. Also fix the definition of CONFIG_SPL_NAND_SIMPLE -- it's only nand_spl_simple.c, not the entire nand directory. The word "simple" is there for a reason. :-) Signed-off-by: Scott Wood <scottwood@freescale.com> --- v2: updated for makefile changes earlier in patchset
| | * spl/nand: introduce CONFIG_SPL_NAND_DRIVERS, _BASE, and _ECC.Scott Wood2012-11-26-8/+22
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Some small SPLs do not use nand_base.c, and a subset of those also require a special driver. Some SPLs need software ECC but others can't fit it. All existing boards that specify CONFIG_SPL_NAND_SUPPORT have these symbols added to preserve existing behavior. Signed-off-by: Scott Wood <scottwood@freescale.com> -- v2: use positive logic for including bits of NAND, rather than a MINIMAL symbol that excludes things.
| | * powerpc/mpc8xxx: move LAW code into arch/powerpc/cpu/mpc8xxxScott Wood2012-11-26-334/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | It's arch code and not a driver, so move it where it belongs. When it originally went into drivers/misc there was no 8xxx CPU directory. This will make new-SPL support a little easier since we can keep the CPU stuff together and not need to pull stuff in from drivers/misc. Signed-off-by: Scott Wood <scottwood@freescale.com> Cc: Andy Fleming <afleming@freescale.com>
| | * serial/ns16550: wait for TEMT before initializingScott Wood2012-11-26-0/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | TEMT is set when the transmitter is totally empty and all output has finished. This prevents output problems (including a loss of synchronization observed on p2020 that persisted for quite a while) if SPL has output still on its way out. Signed-off-by: Scott Wood <scottwood@freescale.com> -- v2: fixed typo in subject, and explained what the bit does in the changelog
| | * serial/ns16550: don't build serial_ns16550 with MIN_FUNCTIONSScott Wood2012-11-26-0/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | CONFIG_NS16550_MIN_FUNCTIONS is used by small SPLs to gain access to basic ns16550 output code without pulling in things not needed by the SPL. This previously only worked with non-MULTI configs. Recently MULTI was made mandatory, and MIN_FUNCTIONS fails like this: drivers/serial/libserial.o: In function `calc_divisor.clone.0': serial_ns16550.c:(.text.calc_divisor.clone.0+0x24): undefined reference to `get_bus_freq' drivers/serial/libserial.o: In function `_serial_getc': (.text._serial_getc+0x30): undefined reference to `NS16550_getc' drivers/serial/libserial.o: In function `_serial_tstc': (.text._serial_tstc+0x30): undefined reference to `NS16550_tstc' drivers/serial/libserial.o: In function `_serial_setbrg': (.text._serial_setbrg+0x3c): undefined reference to `NS16550_reinit' make[1]: *** [/tmp/u-boot/spl/u-boot-spl] Error 1 make: *** [/tmp/u-boot/spl/u-boot-spl.bin] Error 2 With MIN_FUNCTIONS we don't need anything from this file, so don't build it. The conditional needs to be in the file itself rather than the makefile, because the config symbols are only imported to the makefiles once, not separately for the SPL phase of the build. Signed-off-by: Scott Wood <scottwood@freescale.com>
| * | usb: r8a6659: Fix build by missing of parenthesisNobuhiro Iwamatsu2012-11-20-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | By commit c7e3b2b5, this was chanded to support multiple controllers. But this has missing of parenthesis. This commit fix it. ----- r8a66597-hcd.c: In function ‘usb_lowlevel_init’: r8a66597-hcd.c:911:52: error: expected declaration specifiers before ‘)’ token r8a66597-hcd.c:935:1: error: expected ‘=’, ‘,’, ‘;’, ‘asm’ or‘__attribute__’ before ‘{’ token r8a66597-hcd.c:939:1: error: expected ‘{’ at end of input ----- Signed-off-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com> CC: Lucas Stach <dev@lynxeye.de>
| * | usb: r8a66597: Switched from variable to only macroNobuhiro Iwamatsu2012-11-20-10/+5
| | | | | | | | | | | | | | | | | | | | | | | | Some variables are initialized with a value defined by macro. This was changed to use the macro directly. And the variable not to use deleted it. Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
| * | musb-new: omap2plus backend driverIlya Yanok2012-11-20-0/+692
| | | | | | | | | | | | | | | | | | | | | Backend driver for MUSB OTG controllers found on TI OMAP2/3/4 (tested only on OMAP3 Beagle). Signed-off-by: Ilya Yanok <ilya.yanok@cogentembedded.com>
| * | musb-new: am35x backend driverIlya Yanok2012-11-20-0/+711
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Backend driver for MUSB OTG controllers found on TI AM35x. It seems that on AM35X interrupt status registers can be updated _before_ core registers. As we don't use true interrupts in U-Boot and poll interrupt status registers instead this can result in interrupt handler being called with non-updated core registers. This confuses the code and result in hanged transfers. Add a small delay in am35x_interrupt as a workaround. Signed-off-by: Ilya Yanok <ilya.yanok@cogentembedded.com>
| * | musb-new: dsps backend driverIlya Yanok2012-11-20-0/+772
| | | | | | | | | | | | | | | | | | | | | Backend driver for MUSB OTG controllers found on TI AM33xx and TI81xx SoCs (tested with AM33xx only). Signed-off-by: Ilya Yanok <ilya.yanok@cogentembedded.com>
| * | musb-new: port of Linux musb driverIlya Yanok2012-11-20-2/+10690
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Existing U-Boot musb driver has no support for the new gadget framework and also seems to have other limitations. As gadget framework is ported from Linux it seems pretty natural to port musb gadget driver as well. This driver supports both host and peripheral modes. This is not a replacement for current musb driver (at least now) as there are still some consumers of the old UDC interface. No DMA operation support included, CONFIG_MUSB_PIO_ONLY should be defined. Virtual root hub device is not implemented. Known problems: with no devices connected usb_lowlevel_start() fails. Signed-off-by: Ilya Yanok <ilya.yanok@cogentembedded.com>
| * | usb: use linux/usb/ch9.h instead of usbdescriptors.hIlya Yanok2012-11-20-10/+22
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Linux usb/ch9.h seems to have all the same information (and more) as usbdescriptors.h so use the former instead of the later one. As a consequense of this change USB_SPEED_* values don't correspond directly to EHCI speed encoding anymore, I've added necessary recoding in EHCI driver. Also there is no point to put speed into pipe anymore so it's removed and a bunch of host drivers fixed to look at usb_device->speed instead. Old usbdescriptors.h included is not removed as it seems to be used by old USB device code. This makes usb.h and usbdevice.h incompatible. Fortunately the only place that tries to include both are the old MUSB code and it needs usb.h only for USB_DMA_MINALIGN used in aligned attribute on musb_regs structure but this attribute seems to be unneeded (old MUSB code doesn't support any DMA at all). Signed-off-by: Ilya Yanok <ilya.yanok@cogentembedded.com>
| * | linux/usb/ch9.h: update with the version from Linux treeIlya Yanok2012-11-20-5/+0
| |/ | | | | | | Signed-off-by: Ilya Yanok <ilya.yanok@cogentembedded.com>
| * Merge branch 'master' of git://git.denx.de/u-boot-videoTom Rini2012-11-19-1/+72
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| | * Video: fix compiler warnings in bus_vcxkJens Scharsig (BuS Elektronik)2012-11-14-1/+1
| | | | | | | | | | | | | | | | | | | | | if a board uses the vcxk driver option CONFIG_SYS_VCXK_DOUBLEBUFFERD, compilier shows warnings. This patch will fix it. Signed-off-by: Jens Scharsig (BuS Elektronik) <esw@bus-elektronik.de>
| | * video: atmel: implement lcd_setcolreg functionBo Shen2012-11-10-0/+12
| | | | | | | | | | | | | | | | | | | | | | | | implement the common api lcd_setcolreg in include/lcd.h Signed-off-by: Bo Shen <voice.shen@atmel.com> [agust: fixed commit log and gcc 4.6 -Wparentheses warnings] Signed-off-by: Anatolij Gustschin <agust@denx.de>
| | * video: Skip bitmaps which do not fit into the screen in cfb_consoleVadim Bendebury2012-11-07-0/+7
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The cfb console driver is trying to prevent bitmaps to spill over the screen, but the calculations assume that at least part of the bitmap fits into the screen area. In reality there could be bitmap elements which are completely out of the screen area, they just need to be discarded. Signed-off-by: Vadim Bendebury <vbendeb@chromium.org> Signed-off-by: Simon Glass <sjg@chromium.org>
| | * video: Implement additional video API functions in cfb_consoleStefan Reinauer2012-11-07-0/+42
| | | | | | | | | | | | | | | | | | | | | | | | | | | Implement the new video API functions to provide access to screen size, etc. Signed-off-by: Stefan Reinauer <reinauer@chromium.org> Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Anatolij Gustschin <agust@denx.de>
| | * ipu common: reset ipuv3 correctlyLiu Ying2012-11-06-0/+10
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch checks self-clear sw_ipu_rst bit in SCR register of SRC controller to be cleared after setting it to high to reset IPUv3. This makes sure that IPUv3 finishes sofware reset. A timeout mechanism is added to stop polling on the bit status in case the bit could not be cleared by the hardware automatically within 10 millisecond. Signed-off-by: Liu Ying <Ying.Liu@freescale.com>
| * | power:pmic: Rename CONFIG_DIALOG_PMIC defines to CONFIG_DIALOG_POWERŁukasz Majewski2012-11-14-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | Rename CONFIG_DIALOG_PMIC to CONFIG_DIALOG_POWER Signed-off-by: Lukasz Majewski <l.majewski@samsung.com> Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com> Cc: Stefano Babic <sbabic@denx.de>
| * | power:pmic: Rename CONFIG_PMIC* defines to CONFIG_POWERŁukasz Majewski2012-11-14-10/+10
| | | | | | | | | | | | | | | | | | | | | | | | Rename all CONFIG_PMIC* defines to CONFIG_POWER* Signed-off-by: Lukasz Majewski <l.majewski@samsung.com> Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com> Cc: Stefano Babic <sbabic@denx.de>
| * | power:pmic: Rename ./drivers/power/pmic_* to ./drivers/power/power_* filesŁukasz Majewski2012-11-14-5/+5
| | | | | | | | | | | | | | | | | | | | | | | | Rename pmic/power related files at ./drivers/power directory Signed-off-by: Lukasz Majewski <l.majewski@samsung.com> Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com> Cc: Stefano Babic <sbabic@denx.de>
generated by cgit v1.1 at 2024-12-22 10:05:31 +0000