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* ENGR00307874 GPIO: Modify driver mxc_gpio to support RDC SemaphoresYe.Li2014-04-14-0/+50
| | | | | | | | | | | | For GPIO group which shared by multiple masters, it may set in RDC to shared and semaphore required. Before access the GPIO register, the GPIO driver must get the RDC semaphore, and release the semaphore after the GPIO register access. When CONFIG_MXC_RDC is set, the features related to RDC semaphores is enabled in mxc_gpio driver. Signed-off-by: Ye.Li <B37916@freescale.com>
* ENGR00304164 iMX6SX:Sabresd Add Android features supportYe.Li2014-03-19-3/+3
| | | | | | | Add BSP codes to mx6sxsabresd to support android uboot features: fastboot, booti and recovery Signed-off-by: Ye.Li <B37916@freescale.com>
* ENGR00302525 QuadSPI: Update driver to support 4 flash chips on each QSPI.Ye.Li2014-03-10-131/+91
| | | | | | | | | | | | | | | | | | | | | | | | | | Add two configurations "CONFIG_QSPI_BASE" and "CONFIG_QSPI_MEMMAP_BASE" for QSPI registers base and AHB memory base. So the driver is independent from QSPI2. Use "bus" and "cs" parameters to denote 4 flash chip connected on one QuadSPI: SFA1: bus 0, cs 0 SFA2: bus 0, cs 1 SFB1: bus 1, cs 0 SFB2: bus 1, cs 1 Currently in uboot, the SPI flash framework does not have way to notify the flash size to the driver. It brings a problem for QSPI driver to set the memory map space of each chip. In this patch, we fix the mem map space of each chip to 64MB(total is 256MB). So for flash larger than 64MB, driver only support low 64MB. Because u-boot SPI flash framework only supports 24bits address (16MB), the 64MB limitation in driver is ok to work in u-boot. Clean up the spi_xfer and spi read. Divide read to "IP read" and "AHB read". In current implementation, the IPCR is still filled even reading from AHB memory. This causes QSPI to read from flash twice, one to IP buffer, the other to the AHB buffer. Signed-off-by: Ye.Li <B37916@freescale.com>
* ENGR00301683 FEC: Modify enet driver TX polling bitYe.Li2014-03-05-5/+2
| | | | | | | | | | | | Change to check READY bit in BD, not check the TDAR. On iMX6SX, FEC will clear the TDAR prior than the READY bit of last BD. Since fec driver only prepare two BD for transmit, this cause the BD send failed at the third packet. On iMX6SX, we disabled DCACHE to workaround for this issue. Now change to enable the DCACHE. Signed-off-by: Ye.Li <B37916@freescale.com>
* ENGR00301441 ENET:FEC Update fec_mxc driver for iMX6SXYe.Li2014-03-05-1/+9
| | | | | | | | | | | 1. iMX6SX enet rx have 64 bytes alignment limitation for DMA transfer. For i.MX6SX platform, need to add below define in config file: #define CONFIG_FEC_DMA_MINALIGN 64 2. FEC mdio clock source is ipg_clock_s, correct the clock source. Signed-off-by: Fugang Duan <B38611@freescale.com> Signed-off-by: Ye.Li <B37916@freescale.com>
* ENGR00301442 USB: Uniform USB base address name for all imx6 seriesYe.Li2014-03-05-6/+0
| | | | | | | | Discard the USB name "USBO2H" and "USBOH3". Because the base addresses are same for all imx6 series, uniform the name for ease reading and saving changes. Signed-off-by: Ye.Li <B37916@freescale.com>
* ENGR00301444 SD/MMC: Update fsl_esdhc driver for iMX6SXYe.Li2014-03-05-0/+14
| | | | | | | | The reset value of "uSDHCx_INT_STATUS_EN" register is changed to 0 on iMX6SX. So the fsl_esdhc driver must update to set the register, otherwise no state can be detected. Signed-off-by: Ye.Li <B37916@freescale.com>
* ENGR00301803 qspi: fix build issueAllen Xu2014-03-04-5/+1
| | | | | | | 1. remove unnecessary code to fix compile warning 2. enable_qspi_clk should be designed for mx6sx only. Signed-off-by: Allen Xu <b45815@freescale.com>
* ENGR00301262-2 qspi: add Freescale QuadSPI supportAllen Xu2014-02-27-1/+830
| | | | | | | | | | enabled qspi read/write/erase functions and passed 3 byte mode tests. Acked-by: Shawn Guo Signed-off-by: Huang Shijie <b32955@freescale.com> Signed-off-by: Allen Xu <b45815@freescale.com>
* ENGR00300374 video: ipu: wait for DP SF end irq when disabling sync BG flowLiu Ying2014-02-26-22/+22
| | | | | | | | | | Instead of waiting for DC triple buffer to be cleared, this patch changes to wait for a relevant DP sync flow end irq when disabling sync BG flows. In this way, we align the implement to the FSL internal IPUv3 driver. After applying this patch, the uboot hang up issue at the arch_preboot_os stage on the MX6DL platforms is not observed any more. Signed-off-by: Liu Ying <Ying.Liu@freescale.com>
* ENGR00299356 ARM:imx6 Fix USDHC driver bug in PIO modeYe.Li2014-02-18-15/+10
| | | | | | | | | | | | | | When configure the USDHC driver to PIO mode by defining "CONFIG_SYS_FSL_ESDHC_USE_PIO", the SD/MMC read and write will fail. Two bugs in the driver to cause the issue: 1. The read buffer was invalidated after reading from DATAPORT register, which should be only applied to DMA mode. The valid data in cache was overwritten by physical memory. 2. The watermarks are not set in PIO mode, will cause according state not be set. Signed-off-by: Ye.Li <B37916@freescale.com>
* ENGR00294905 ARM:imx6:EHCI Update OTG support from mainlineYe.Li2014-01-17-43/+95
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Update the ehci-mx6 driver from mainline. Drop the changes related with usb_init_type because we don't upgrade the whole driver framework. The OTG controller is forced to host mode in ehci_hcd_init. The signal on OTG ID is ignored. Set Power polarity in CTRL register to active-high to control the off-chip power switch. Update USB base address to support imx6sl. Original: usb: ehci-mx6: add support for otg port Previously, only host1 was supported using an index of 0. Now, otg has index 0, host1 is 1, host2 is 2, host3 is 3. Since OTG requires usbmode to be set after reset, I added CONFIG_EHCI_HCD_INIT_AFTER_RESET to nitrogen6x.h and mx6qsabreauto.h. I also added a weak function board_ehci_power to handle turning power on/off for otg. Type is type of device connected (USB stick vs Host.) Init is type of device desired. Only power up port if type == init == USB_INIT_HOST. Only return error if type != init. Signed-off-by: Troy Kisky <troy.kisky@boundarydevices.com> (cherry picked from commit d1a5286099a1ccb43fa8599e2c806ca039783e2f) Conflicts: drivers/usb/host/ehci-mx6.c
* ENGR00294905 driver:MAX7310: Add GPIO expander driver for MAX7310Ye.Li2014-01-17-0/+168
| | | | | | | | | | | Implement simple functionalities for MAX7310 GPIO input and output. Because MAX7310 is a off-chip device and need to co-exist with on-chip GPIO, new APIs are added specifically for expander device. CONFIG_MAX7310_IOEXP is used to enable the MAX7310 driver. The I2C related configurations also need to set together. Signed-off-by: Ye.Li <B37916@freescale.com>
* Add mxc_ocotp driverBenoît Thébaudeau2014-01-06-0/+217
| | | | | | | | | Add an mxc_ocotp driver for i.MX6. Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com> (cherry picked from commit 112fd2ec6c1a96c6ff51490c28eb971795a2dd95) Signed-off-by: Ye.Li <B37916@freescale.com>
* ENGR00292902 ARM:imx6sl:evk Add android fastboot supportingYe.Li2013-12-27-0/+609
| | | | | | | | The imx6slevk has keyboards on the board, so add mxc_keyb driver to support the recovery keys pressing checking. The key mapping table is defined in "mx6slevkandroid.h" with CONFIG_MXC_KPD enabled. Signed-off-by: Ye.Li <B37916@freescale.com>
* ENGR00292902 ARM:imx6:sabresd/sabreauto Add android fastboot supportingYe.Li2013-12-27-0/+1195
| | | | | | | | | | | | | | | | | Support android features: fastboot, booti command and recovery for sabresd SD, sabresd eMMC, sabreauto SD, sabreauto NAND. For all booting media (SD, eMMC, NAND), inherits the partitions layout from v2009.08. Fastboot will detect the booting media to replace hardcoding fastboot device. SATA is not supported. FDT is supported to use the "unused" fields in bootimg header which requires the FDT to be combined into the boot.img. For non-FDT boot.img, the "unused" fields should left to NULL and is compatible to boot. Signed-off-by: Ye.Li <B37916@freescale.com>
* ENGR00292902 ARM:imx6: Add USB gadget driver imx_udc to support Android fastbootYe.Li2013-12-27-0/+1211
| | | | | | | | | | | Android fastboot leans on the USB gadget driver to communicate with host. Porting the imx_udc driver from v2009.08 with two changes: adding resource/memory release APIs and replacing the uncached memory with cache flush&invalidate operations. Pins and Clocks initialization are added to support boards: mx6qdlsabresd, mx6qdlsabreauto, mx6slevk Signed-off-by: Ye.Li <B37916@freescale.com>
* ENGR00290397 HDMI: splash screen function enhancementSandor Yu2013-12-02-19/+50
| | | | | | | | | | | -Change HDMI video mode to VGA. -Add pixel clock fraction part setting in IPU driver, fix video mode timing issue. -Add overflow state clear workaround, fix kernel hang in HDMI driver issue. -Correct IPU clock to 264MHz. Signed-off-by: Sandor Yu <R01008@freescale.com>
* video: ipu_disp: Fix clock polarity logicFabio Estevam2013-11-22-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | Currently the HDMI splash screen image quality on mx6solo does not show a very stable image. By comparing the IPU driver from U-boot with the one from FSL 4.1.0 BSP, we can see that there is an inverted logic for setting the DI_GEN_POL_CLK bit. >From FSL BSP [1] we have: if (!sig.clk_pol) di_gen |= DI_GEN_POLARITY_DISP_CLK; Applying the same logic into U-boot fixes the HDMI image stability. [1] git.freescale.com/git/cgit.cgi/imx/linux-2.6-imx.git/tree/drivers/mxc/ipu3/ipu_disp.c?h=imx_3.0.35_4.1.0 Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> Tested-by: Eric Nelson <eric.nelson@boundarydevices.com> Acked-by: Eric Nelson <eric.nelson@boundarydevices.com> Acked-by: Stefano Babic <sbabic@denx.de> (cherry picked from commit 2740e5de4f3cd0aa36efcfe1a995fb6e3858cc97) Signed-off-by: Jason Liu <r64343@freescale.com>
* mxc_ipuv3: fix memory alignment of framebufferEric Nelson2013-11-22-2/+3
| | | | | | | | The frame-buffer on i.MX boards needs to be aligned for DMA. Signed-off-by: Eric Nelson <eric.nelson@boundarydevices.com> (cherry picked from commit 4acb4d391f005c0c72f7b84041b3884e4260a5a4) Signed-off-by: Jason Liu <r64343@freescale.com>
* video: consolidate splash screen alignment codeAnatolij Gustschin2013-11-22-22/+2
| | | | | | | | | | | | Code for checking "splashpos" environment variable is duplicated in drivers, move it to the common function. Call this function also in the bmp display command to consider "splashpos" settings. Signed-off-by: Anatolij Gustschin <agust@denx.de> Acked-by: Otavio Salvador <otavio@ossystems.com.br> (cherry picked from commit ff8fb56b6f7edafc1bcba8ef008b3f368cabe60d) Signed-off-by: Jason Liu <r64343@freescale.com>
* video: lcd: Add CONFIG_SPLASH_SCREEN_PREPARE support to CONFIG_VIDEORobert Winkler2013-11-22-2/+3
| | | | | | | | | | Create splash.c/h to put the function and any future common splash screen code in. Signed-off-by: Robert Winkler <robert.winkler@boundarydevices.com> Acked-by: Igor Grinberg <grinberg@compulab.co.il> (cherry picked from commit dd4425e85260c2e750676e2dc9c225cfff1b4bcd) Signed-off-by: Jason Liu <r64343@freescale.com>
* cfb_console: flush FB cache at end of public functionsEric Nelson2013-11-22-6/+9
| | | | | | | | | | Removed internal cache_flush operations and placed a flush of the entire frame-buffer at the end of each public function. Signed-off-by: Eric Nelson <eric.nelson@boundarydevices.com> Signed-off-by: Anatolij Gustschin <agust@denx.de> (cherry picked from commit db0d47dd433bc7ba60b927fb0ff6835758a8893d) Signed-off-by: Jason Liu <r64343@freescale.com>
* ENGR00288418 Add EPDC splash screen for MX 6DL SabreSD and 6SL EVKRobby Cai2013-11-21-0/+468
| | | | | | | | | | | | | | | | Add EPDC splash screen feature for MX6SL EVK, and MX6DL SABRESD board. - Currently, splash screen consists of a simple black border around a white screen. Done this way to save in memory footprint. - EPDC splash screen is disabled by default in the config file for MX6DL_SABRESD and MX6SL_EVK. If left enabled, the U-Boot image will not boot correctly (hang), since some additional content on the boot device (waveform file) is required for EPDC splash to work correctly. Please refer to Linux Reference Manual for how to flash WAVEFORM file. Signed-off-by: Robby Cai <R63905@freescale.com>
* ENGR00270355 Fix eMMC fast boot hang issueYe.Li2013-11-19-2/+25
| | | | | | | | | | | | When booting in eMMC fast boot, the uboot v2013.04 always hangs. The root cause is that MMC host does not exit from boot mode after bootrom loading image. So the first command 'CMD0' sent in uboot will pull down the CMD line to low and cause errors. This patch cleans the MMC boot register in "mmc_init" to put the MMC host back to normal mode. Signed-off-by: Ye Li <b37916@freescale.com>
* ENGR00288171 gpmi: use the same ECC strength as used in the kernelHuang Shijie2013-11-15-11/+13
| | | | | | | | | | | Current code use the hardcoded ECC strength which is not aligned with the kernel. This patch use the same ECC strength as used in the kernel. We do not support the NAND whose OOB size is larger then 512bytes. Signed-off-by: Huang Shijie <b32955@freescale.com>
* ENGR00275369-03: net: fec: add imx6sl fec supportFugang Duan2013-08-15-3/+3
| | | | | | | imx6sl fec need to setup the MII gasket for RMII mode. Add the imx6sl fec support. Signed-off-by: Fugang Duan <B38611@freescale.com>
* cfi_flash: Fix unaligned accesses to cfi_qry structureAndrew Gabbasov2013-06-24-6/+9
| | | | | | | | | | | | | | | Packed structure cfi_qry contains unaligned 16- and 32-bits members, accessing which causes problems when cfi_flash driver is compiled with -munaligned-access option: flash initialization hangs, probably due to data error. Since the structure is supposed to replicate the actual data layout in CFI Flash chips, the alignment issue can't be fixed in the structure. So, unaligned fields need using of explicit unaligned access macros. Signed-off-by: Andrew Gabbasov <andrew_gabbasov@mentor.com> Reviewed-By: Albert ARIBAUD <albert.u.boot@aribaud.net> Signed-off-by: Stefan Roese <sr@denx.de>
* ENGR00263305-13 mtd: mxs_nand: Add support for i.MX6Stefan Roese2013-05-21-2/+9
| | | | | | | | Signed-off-by: Stefan Roese <sr@denx.de> Acked-by: Scott Wood <scottwood@freescale.com> Cc: Stefano Babic <sbabic@denx.de> Cc: Marek Vasut <marex@denx.de> Cc: Fabio Estevam <fabio.estevam@freescale.com>
* ENGR00263305-12 dma: Add i.MX6 support to drivers/dma/apbh_dma.cStefan Roese2013-05-21-1/+1
| | | | | | | | | This will be used by the i.MX6 NAND support. Signed-off-by: Stefan Roese <sr@denx.de> Cc: Stefano Babic <sbabic@denx.de> Cc: Marek Vasut <marex@denx.de> Cc: Fabio Estevam <fabio.estevam@freescale.com>
* ENGR00263305-10 imx: Move some header files from arch-mxs to imx-commonStefan Roese2013-05-21-4/+7
| | | | | | | | | | | | | | | | | | | The following headers are moved to a i.MX common location: - regs-common.h - regs-apbh.h - regs-bch.h - regs-gpmi.h - dma.h This way this header can be re-used also by other i.MX platforms. For example the i.MX6 which will need it for the upcoming NAND support. Signed-off-by: Stefan Roese <sr@denx.de> Cc: Stefano Babic <sbabic@denx.de> Cc: Marek Vasut <marex@denx.de> Cc: Fabio Estevam <fabio.estevam@freescale.com>
* mmc: check the revision for sd3.0Jaehoon Chung2013-04-17-0/+2
| | | | | | | | Support to check whether the SD3.0 or not. Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com> Tested-by: Rommel Custodio <sessyargc@gmail.com>
* mmc: support the correct card version for eMMCJaehoon Chung2013-04-17-0/+18
| | | | | | | | | | | eMMC vesrion is supported up to v4.5. But bootloader isn't saw the exact eMMC version. After applied this patch, if use the mmcinfo command, then can see the exactly mmc version. Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com> Acked-by: Rommel Custodio <sessyargc@gmail.com>
* Merge branch 'master' of git://git.denx.de/u-boot-armTom Rini2013-04-15-915/+1948
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| * Merge branch 'u-boot-imx/master' into 'u-boot-arm/master'Albert ARIBAUD2013-04-14-5/+3
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| | * fsl_esdhc: Fix DMA transfer completion waiting loopAndrew Gabbasov2013-04-14-2/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Rework the waiting for transfer completion loop condition to continue waiting until both Transfer Complete and DMA End interrupts occur. Checking of DLA bit in Present State register looks not needed in addition to interrupts status checking, so it can be removed from the condition. Also, DMA Error condition is added to the list of data errors, checked in the loop. Signed-off-by: Andrew Gabbasov <andrew_gabbasov@mentor.com>
| | * fsl_esdhc: flush cache after IO completionEric Nelson2013-04-14-3/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | The cache should invalidate the read buffer for the SD card interface after the transfer complete, not command-complete. Tested-by: Andrew Gabbasov <Andrew_Gabbasov@mentor.com> Signed-off-by: Eric Nelson <eric.nelson@boundarydevices.com>
| * | Merge branch 'u-boot-imx/master' into 'u-boot-arm/master'Albert ARIBAUD2013-04-14-8/+9
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| | * spi: mxc_spi: Set master mode for all channelsFabio Estevam2013-04-13-8/+9
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The glitch in the SPI clock line, which commit 3cea335c34 (spi: mxc_spi: Fix spi clock glitch durant reset) solved, is back now and itwas re-introduced by commit d36b39bf0d (spi: mxc_spi: Fix ECSPI reset handling). Actually the glitch is happening due to always toggling between slave mode and master mode by configuring the CHANNEL_MODE bits in this reset function. Since the spi driver only supports master mode, set the mode for all channels always to master mode in order to have a stable, "glitch-free" SPI clock line. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
| * | Merge branch 'u-boot/master' into 'u-boot-arm/master'Albert ARIBAUD2013-04-12-977/+2396
| |\ \ | | | | | | | | | | | | | | | | Conflicts: drivers/video/exynos_fb.c
| * | | kirkwood_nand: allow usage of NAND_ECC_SOFT_BCHGerlando Falauto2013-04-12-0/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | If CONFIG_NAND_ECC_BCH is set use 4-bit error correction code instead of the 1-bit error correction code on the NAND device. Signed-off-by: Gerlando Falauto <gerlando.falauto@keymile.com> Signed-off-by: Holger Brunck <holger.brunck@keymile.com> cc: Valentin Longchamp <valentin.longchamp@keymile.com> cc: Prafulla Wadaskar <prafulla@marvell.com> Acked-by: Prafulla Wadaskar <prafulla@marvell.com> Acked-by: Scott Wood <scottwood@freescale.com>
| * | | arm: Remove support for unused s3c64xxBenoît Thébaudeau2013-04-12-593/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Following the removal of the smdk6400 board, the s3c64xx SoC becomes unused, so remove associated code. It will still be possible to restore it later from the Git history if necessary. Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com>
| * | | nand: mxc: Switch NAND SPL to generic SPLBenoît Thébaudeau2013-04-12-5/+597
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This also fixes support for mx31pdk and tx25, which had been broken by commit e05e5de7fae5bec79617e113916dac6631251156. Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com> Acked-by: Scott Wood <scottwood@freescale.com> Tested-by: Fabio Estevam <fabio.estevam@freescale.com>
| * | | nand: mxc: Use appropriate page number in syndrome functionsBenoît Thébaudeau2013-04-12-3/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The syndrome functions should use the page number passed as argument instead of the page number saved upon NAND_CMD_READ0. This does not make any difference if the NAND_NO_AUTOINCR option is set, but otherwise this fixes accesses to the wrong pages. Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com> Acked-by: Scott Wood <scottwood@freescale.com>
| * | | nand: mxc: Fix debug trace in mxc_nand_read_oob_syndrome()Benoît Thébaudeau2013-04-12-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The page number indicated in the debug trace of mxc_nand_read_oob_syndrome() did not match the page being worked on. By the way, replace the GCC-specific __FUNCTION__ with __func__. Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com> Acked-by: Scott Wood <scottwood@freescale.com>
| * | | nand: mxc: Add support for i.MX5Benoît Thébaudeau2013-04-12-11/+108
| | | | | | | | | | | | | | | | | | | | | | | | Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com> Acked-by: Scott Wood <scottwood@freescale.com> Tested-by: Fabio Estevam <fabio.estevam@freescale.com>
| * | | nand: mxc: Prepare to add support for i.MX5Benoît Thébaudeau2013-04-12-46/+46
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add some abstraction to NFC definitions so that some parts of the current code can also be used for future i.MX5 code. Clean up a few things by the way. Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com> Acked-by: Scott Wood <scottwood@freescale.com> Tested-by: Fabio Estevam <fabio.estevam@freescale.com>
| * | | mtd: nand: mxc_nand: Fix is_16bit_nand()Fabio Estevam2013-04-12-34/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Currently is_16bit_nand() is a per SoC function and it decides the bus nand width by reading some boot related registers. This method works when NAND is the boot medium, but does not work if another boot medium is used. For example: booting from a SD card and then using NAND to store the environment variables, would lead to the following error: NAND bus width 16 instead 8 bit No NAND device found!!! 0 MiB Use CONFIG_SYS_NAND_BUSWIDTH_16BIT symbol to decide the bus width. If it is defined in the board file, then consider 16-bit NAND bus-width, otherwise assume 8-bit NAND is used. This also aligns with Documentation/devicetree/bindings/mtd/nand.txt, which states: nand-bus-width : 8 or 16 bus width if not present 8 Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> Acked-by: Scott Wood <scottwood@freescale.com> Reviewed-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com>
| * | | mtd: nand: Introduce CONFIG_SYS_NAND_BUSWIDTH_16BITFabio Estevam2013-04-12-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Introduce CONFIG_SYS_NAND_BUSWIDTH_16BIT option so that other NAND controller drivers could use it when a 16-bit NAND is deployed. drivers/mtd/nand/ndfc has CONFIG_SYS_NDFC_16BIT, so just rename it, so that other NAND drivers could reuse the same symbol. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> Acked-by: Scott Wood <scottwood@freescale.com> Reviewed-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com>
| * | | omap_gpmc: add support for hw assisted BCH8Andreas Bießmann2013-04-08-91/+276
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The kernel states: ---8<--- The OMAP3 GPMC hardware BCH engine computes remainder polynomials, it does not provide automatic error location and correction: this step is implemented using the BCH library. --->8--- And we do so in u-boot. This implementation uses the same layout for BCH8 but it is fix. The current provided layout does only work with 64 Byte OOB. Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com> Cc: Tom Rini <trini@ti.com> Cc: Ilya Yanok <ilya.yanok@cogentembedded.com> Cc: Scott Wood <scottwood@freescale.com> Cc: Mansoor Ahamed <mansoor.ahamed@ti.com> Cc: Thomas Weber <thomas.weber.linux@googlemail.com>
generated by cgit v1.1 at 2024-12-18 01:54:57 +0000