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* mxs: Make ehci-mxs multiport capableMarek Vasut2013-03-07-68/+81
| | | | | | | | | | | Rework ehci-mxs so it supports both ports on MX28. It was necessary to wrap the per-port configuration into struct ehci_mxs_port and pull out the clock configuration function. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Fabio Estevam <fabio.estevam@freescale.com> Cc: Otavio Salvador <otavio@ossystems.com.br> Cc: Stefano Babic <sbabic@denx.de>
* mxs: Squash the header file usage in ehci-mxsMarek Vasut2013-03-07-5/+1
| | | | | | | | | | | | The ehci-mxs driver included the register definitions directly. Use imx-regs.h instead since it contains proper handling of the differences between mx23 and mx28. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Fabio Estevam <fabio.estevam@freescale.com> Cc: Otavio Salvador <otavio@ossystems.com.br> Cc: Stefano Babic <sbabic@denx.de> Acked-by: Otavio Salvador <otavio@ossystems.com.br>
* mxs: spi: Remove CONFIG_MXS_SPI_DMA_ENABLEMarek Vasut2013-03-07-16/+0
| | | | | | | | | | The CONFIG_MXS_SPI_DMA_ENABLE is no longer relevant as the SPI DMA has proven to work correctly. Remove this configuration option. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Fabio Estevam <fabio.estevam@freescale.com> Cc: Otavio Salvador <otavio@ossystems.com.br> Cc: Stefano Babic <sbabic@denx.de>
* mxs: spi: Fix the MXS SPI for mx23Marek Vasut2013-03-07-2/+17
| | | | | | | | | | The MX23 has slightly different register layout. Adjust the SPI driver to match the layout, both the PIO and DMA part. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Fabio Estevam <fabio.estevam@freescale.com> Cc: Otavio Salvador <otavio@ossystems.com.br> Cc: Stefano Babic <sbabic@denx.de>
* mxs: mmc: spi: dma: Better wrap the MXS differencesMarek Vasut2013-03-07-18/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch streamlines the differences between the MX23 and MX28 by implementing a few helper functions to handle different DMA channel mapping, different clock domain for SSP block and fixes a few minor bugs. First of all, the DMA channel mapping is now fixed in dma.h by defining the actual channel map for both MX23 and MX28. Thus, MX23 now does no longer use MX28 channel map which was wrong. Also, there is a fix for MX28 DMA channel map, where the last four channels were incorrect. Next, because correct DMA channel map is in place, the mxs_dma_init_channel() call now bases the channel ID starting from SSP port #0. This removes the need for DMA channel offset being added and cleans up the code. For the same reason, the SSP0 offset can now be used in mxs_dma_desc_append(), thus no need to adjust dma channel number in the driver either. Lastly, the SSP clock ID is now retrieved by calling mxs_ssp_clock_by_bus() which handles the fact that MX23 has shared SSP clock for both ports, while MX28 has per-port SSP clock. Finally, the mxs_ssp_bus_id_valid() pulls out two implementations of the same functionality from MMC and SPI driver into common code. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Fabio Estevam <fabio.estevam@freescale.com> Cc: Otavio Salvador <otavio@ossystems.com.br> Cc: Stefano Babic <sbabic@denx.de>
* USB: drop unneeded header in ehci-mx6Stefano Babic2013-03-07-1/+0
| | | | | | | | | | | Including header for pads is not needed and breaks board after renaming pin definitions. Series-to: u-boot Series-cc: marex@denx.de,fabio.estevam@freescale.com,eric.nelson@boundarydevices.com Signed-off-by: Stefano Babic <sbabic@denx.de>
* ARM: ns9750dev: remove remainders of dead boardWolfgang Denk2013-02-28-221/+0
| | | | | | | | Commit 8b710b1 started removing code for the unmaintained "ns9750dev" board; the board support is still broken, and not included anywhere in the Makefile or boards.cfg. Remove the remaining dead code. Signed-off-by: Wolfgang Denk <wd@denx.de>
* da8xx: Add the missing pinmux for da830 to the gpio driverTomas Novotny2013-02-18-0/+133
| | | | | | | | | The pinmux was generated from linux/arch/arm/mach-davinci/da830.c as of kernel version 3.7.5. If the driver is used for the da850, then SoC variant must be specified by CONFIG_SOC_DA850. Signed-off-by: Tomas Novotny <tomas@novotny.cz> Cc: Tom Rini <trini@ti.com>
* Merge branch 'master' of git://git.denx.de/u-boot-armTom Rini2013-02-12-177/+629
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| * tegra: add SPI SLINK driverAllen Martin2013-02-11-0/+344
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add driver for tegra SPI "SLINK" style driver. This controller is similar to the tegra20 SPI "SFLASH" controller. The difference is that the SLINK controller is a genernal purpose SPI controller and the SFLASH controller is special purpose and can only talk to FLASH devices. In addition there are potentially many instances of an SLINK controller on tegra and only a single instance of SFLASH. Tegra20 is currently ths only version of tegra that instantiates an SFLASH controller. This driver supports basic PIO mode of operation and is configurable (CONFIG_OF_CONTROL) to be driven off devicetree bindings. Up to 4 devices per controller may be attached, although typically only a single chip select line is exposed from tegra per controller so in reality this is usually limited to 1. To enable this driver, use CONFIG_TEGRA_SLINK Signed-off-by: Allen Martin <amartin@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com>
| * tegra: spi: add fdt support to tegra SPI SFLASH driverAllen Martin2013-02-11-2/+43
| | | | | | | | | | | | | | | | | | Add support for configuring tegra SPI driver from devicetree. Support is keyed off CONFIG_OF_CONTROL. Add entry in seaboard dts file for spi controller to describe seaboard spi. Signed-off-by: Allen Martin <amartin@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com>
| * Merge branch 'u-boot-imx/master' into 'u-boot-arm/master'Albert ARIBAUD2013-02-02-173/+240
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| | * mxs: mmc: Fix the MMC driver for MX23Marek Vasut2013-01-28-5/+22
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The MX23 has different layout of DMA channels. Fix the MMC driver to support MX23. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Otavio Salvador <otavio@ossystems.com.br> Cc: Fabio Estevam <fabio.estevam@freescale.com> Cc: Stefano Babic <sbabic@denx.de>
| | * mxs: mmc: Allow overriding default card detect implementationMarek Vasut2013-01-28-2/+14
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Some MXS based boards do not implement the card-detect signal. Allow user to specify alternate card-detect implementation. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Otavio Salvador <otavio@ossystems.com.br> Cc: Fabio Estevam <fabio.estevam@freescale.com> Cc: Stefano Babic <sbabic@denx.de>
| | * mxs: mmc: Fix MMC reset on iMX23Otavio Salvador2013-01-28-5/+11
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This does the same reset mask as done in v3.7 Linux kernel code. The block is properly configured for MMC operation that way. Signed-off-by: Otavio Salvador <otavio@ossystems.com.br> Cc: Marek Vasut <marex@denx.de> Cc: Fabio Estevam <fabio.estevam@freescale.com> Cc: Stefano Babic <sbabic@denx.de>
| | * mxs: dma: Fix APBH DMA driver for MX23Marek Vasut2013-01-28-2/+8
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The MX23 has less channels for the APBH DMA, sligtly different register layout and some bits in those registers are placed differently. Reflect this in the driver. This patch fixes MMC/DMA issue on MX23. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Otavio Salvador <otavio@ossystems.com.br> Cc: Fabio Estevam <fabio.estevam@freescale.com> Cc: Stefano Babic <sbabic@denx.de>
| | * net: fec_mxc: get phydev before fec_probeTroy Kisky2013-01-28-43/+76
| | | | | | | | | | | | Signed-off-by: Troy Kisky <troy.kisky@boundarydevices.com>
| | * net: fec_mxc: only call phy_connect in fec_probeTroy Kisky2013-01-28-21/+12
| | | | | | | | | | | | | | | | | | | | | This allows us to create the phydev before calling fec_probe in later patch. Signed-off-by: Troy Kisky <troy.kisky@boundarydevices.com>
| | * net: fec_mxc: use fec_set_dev_name to set nameTroy Kisky2013-01-28-8/+8
| | | | | | | | | | | | | | | | | | | | | This allows us to create the phydev before calling fec_probe in later patch. Signed-off-by: Troy Kisky <troy.kisky@boundarydevices.com>
| | * phy: add phy_find_by_mask/phy_connect_devTroy Kisky2013-01-28-50/+78
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | It is useful to be able to try a range of possible phy addresses to connect. Also, an ethernet device is not required to use phy_find_by_mask leading to better separation of mii vs ethernet, as suggested by Andy Fleming. Signed-off-by: Troy Kisky <troy.kisky@boundarydevices.com>
| | * net: fec_mxc: have fecmxc_initialize call fecmxc_initialize_multiTroy Kisky2013-01-28-16/+8
| | | | | | | | | | | | | | | | | | | | | Having only one call to fec_probe will ease the changing of its parameters. Signed-off-by: Troy Kisky <troy.kisky@boundarydevices.com>
| | * net: fec_mxc: change fec_mii_setspeed parameterTroy Kisky2013-01-28-5/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Only the hardware ethernet registers are needed for this function, so don't pass the more general structure. I'm trying to separate MII and fec. This also fixes MX28 fec_mii_setspeed use on secondary ethernet port This was found by inspection of the code and should be checked on real hardware. Signed-off-by: Troy Kisky <troy.kisky@boundarydevices.com>
| | * net: fec_mxc: delete CONFIG_FEC_MXC_MULTITroy Kisky2013-01-28-1/+1
| | | | | | | | | | | | | | | | | | | | | It is more logical to test for CONFIG_FEC_MXC_PHYADDR to determine whether to define the function fecmxc_initialize. Signed-off-by: Troy Kisky <troy.kisky@boundarydevices.com>
| | * mmc: Limit the number of used SSP ports on MX23Marek Vasut2013-01-21-1/+11
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The MX23 can only use two SSP ports. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Andy Fleming <afleming@freescale.com> Cc: Fabio Estevam <fabio.estevam@freescale.com> Cc: Otavio Salvador <otavio@ossystems.com.br> Cc: Stefano Babic <sbabic@denx.de>
| | * mxs: clock: Use 'mxs' prefix for methodsOtavio Salvador2013-01-21-3/+3
| | | | | | | | | | | | | | | | | | | | | Signed-off-by: Otavio Salvador <otavio@ossystems.com.br> Cc: Fabio Estevam <fabio.estevam@freescale.com> Cc: Marek Vasut <marex@denx.de> Cc: Stefano Babic <sbabic@denx.de>
| | * mxs: ssp: Pull out the SSP bus to regs conversionMarek Vasut2013-01-21-18/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Create function which converts SSP bus number to SSP register pointer. This functionality is reimplemented multiple times in the code, thus make one common implementation. Moreover, make it a switch(), since the SSP ports are not mapped in such nice linear fashion on MX23, therefore having it a switch will simplify things there. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Andy Fleming <afleming@freescale.com> Cc: Fabio Estevam <fabio.estevam@freescale.com> Cc: Stefano Babic <sbabic@denx.de>
| | * mxs: mmc: Drop unused members from struct mxsmmc_privMarek Vasut2013-01-21-12/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | The clock data are not used by the driver, drop them. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Andy Fleming <afleming@freescale.com> Cc: Fabio Estevam <fabio.estevam@freescale.com> Cc: Stefano Babic <sbabic@denx.de>
| * | video: tegra: Update line length to match resolutionThierry Reding2013-01-16-2/+2
| |/ | | | | | | | | | | | | | | | | | | | | | | | | | | | | Instead of storing the computed line length in a local variable, store it in the global lcd_line_length variable to make sure the LCD subsystem can properly draw content for the display resolution. This probably wasn't noticed yet because the only board where LCD support is currently enabled is Seaboard, which runs at a 1366x768 resolution. As it happens this is the maximum resolution supported and also the default that is used to initialize the framebuffer before the configuration from DT is available. Signed-off-by: Thierry Reding <thierry.reding@avionic-design.de> Signed-off-by: Tom Warren <twarren@nvidia.com>
* | sf: stmicro: Add support for N25Q256AJagannadha Sutradharudu Teki2013-02-06-0/+6
| | | | | | | | | | | | | | Add support for Numonyx N25Q256A SPI flash. Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
* | sf: stmicro: Add support for N25Q32AJagannadha Sutradharudu Teki2013-02-06-0/+6
| | | | | | | | | | | | | | Add support for Numonyx N25Q32A SPI flash. Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
* | sf: stmicro: Add support for N25Q32Jagannadha Sutradharudu Teki2013-02-06-0/+6
| | | | | | | | | | | | | | Add support for Numonyx N25Q32 SPI flash. Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
* | sf: stmicro: Add support for N25Q64AJagannadha Sutradharudu Teki2013-02-06-0/+6
| | | | | | | | | | | | | | Add support for Numonyx N25Q64A SPI flash. Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
* | sf: winbond: Add W25Q64WJagannadha Sutradharudu Teki2013-02-06-0/+5
| | | | | | | | | | | | | | | | Add support for Winbond's W25Q64W SPI flash. This device is used on xilinx zynq emulation platform. Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
* | sf: spansion: Correct the first byte of idcode1 for S25FL256S partJagannadha Sutradharudu Teki2013-02-06-1/+1
| | | | | | | | | | | | | | This patch corrected the first byte of idcode1 for S25FL256S SPI flash. Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
* | Merge branch 'master' of git://www.denx.de/git/u-boot-microblazeTom Rini2013-02-04-2/+7
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| * | spi: xilinx_spi: Perform software reset during slave setupJason Wu2013-02-04-0/+5
| | | | | | | | | | | | | | | | | | to make sure it is in the clear state. Signed-off-by: Jason Wu <huanyu@xilinx.com>
| * | block: systemace: Added missing "else" in "ace_writew"Alexey Brodkin2013-02-04-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | System ACE compact flash controller supports either 8-bit (default) or 16-bit data transfers. And in corresponding driver we need to implement read/write of 16-bit data words properly for both modes of operation. In existing code if width==8 both branches get executed which may cause unexpected behavior of SystemAce controller. Addition of "else" fixes described issue and execution is done as expected for both (8-bit and 16-bit) data bus widths. Signed-off-by: Alexey Brodkin <alexey.brodkin@gmail.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
* | | serial: arm_dcc: Fix compilation warning and remove unneeded initializationMichal Simek2013-02-04-5/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | - arm_dcc_dev is already initialized. - Remove unused rc variable Warning log: arm_dcc.c: In function 'drv_arm_dcc_init': arm_dcc.c:145:6: warning: unused variable 'rc' [-Wunused-variable] Signed-off-by: Michal Simek <michal.simek@xilinx.com> Acked-by: Marek Vasut <marex@denx.de>
* | | serial: arm_dcc: Remove CONFIG_ARM_DCC_MULTI optionMichal Simek2013-02-04-11/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | CONFIG_ARM_DCC_MULTI should be also removed in the patch "serial: Remove CONFIG_SERIAL_MULTI from serial drivers" (sha1: a3827250606895ec2dd4b8d867342b7cabf3692f) Because the driver defines serial_* functions which cause conflict with serial.c (multiple definition of serial_*) Removing CONFIG_SERIAL_MULTI function also require to define default_serial_console for cases where another serial driver is not available in the system. Signed-off-by: Michal Simek <michal.simek@xilinx.com> Acked-by: Marek Vasut <marex@denx.de>
* | | sf: stmicro: add support for N25Q064Jagannadha Sutradharudu Teki2013-02-04-0/+6
| | | | | | | | | | | | | | | | | | Add support for Numonyx N25Q064 SPI flash. Signed-off-by: Jagannadha Sutradharudu Teki <jagannadh.teki@gmail.com>
* | | drivers/block/systemace - fixed data type in "systemace_read" to match ↵Alexey Brodkin2013-02-04-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | prototype in "block_dev_desc_t" Currently we have "unsigned long blkcnt" which is fine with CONFIG_SYS_64BIT_LBA undefined because "lbaint_t" is basically the same "unsigned long". If CONFIG_SYS_64BIT_LBA gets defined "lbaint_t" is defined as "unsigned long long". Even though not many embedded systems have CONFIG_SYS_64BIT_LBA defined it's good to have types in function implementation that match exactly with prototypes. Signed-off-by: Alexey Brodkin <alexey.brodkin@gmail.com>
* | | ppc: arm: Move sdhc_clk into arch_global_dataSimon Glass2013-02-04-3/+3
| | | | | | | | | | | | | | | | | | | | | This is used by both powerpc and arm, but I think it still qualifies as architecture-specific. Signed-off-by: Simon Glass <sjg@chromium.org>
* | | ppc: Move mpc512x clocks to arch_global_dataSimon Glass2013-02-04-1/+1
| | | | | | | | | | | | | | | | | | Move ips_clk and csb_clk into arch_global_data and tidy up. Signed-off-by: Simon Glass <sjg@chromium.org>
* | | ppc: Move mpc5xxx clocks to arch_global_dataSimon Glass2013-02-04-4/+7
| | | | | | | | | | | | | | | | | | Move ipb_clk and pci_clk into arch_global_data and tidy up. Signed-off-by: Simon Glass <sjg@chromium.org>
* | | ppc: Move CONFIG_QE to arch_global_dataSimon Glass2013-02-04-13/+14
| | | | | | | | | | | | | | | | | | Move the quantative easing fields into arch_global_data and tidy up. Signed-off-by: Simon Glass <sjg@chromium.org>
* | | ppc: m68k: Move i2c1_clk, i2c2_clk to arch_global_dataSimon Glass2013-02-04-3/+4
| | | | | | | | | | | | | | | | | | | | | Move these fields into arch_global_data and tidy up. This is needed for both ppc and m68k since they share the i2c driver. Signed-off-by: Simon Glass <sjg@chromium.org>
* | | ppc: Move brg_clk to arch_global_dataSimon Glass2013-02-01-3/+3
|/ / | | | | | | | | | | Move this field into arch_global_data and tidy up. Signed-off-by: Simon Glass <sjg@chromium.org>
* | powerpc/mpc85xx:Add support of B4420 SoCPoonam Aggrwal2013-01-30-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | B4420 is a reduced personality of B4860 with fewer core/clusters(both SC3900 and e6500), fewer DDR controllers, fewer serdes lanes, fewer SGMII interfaces and reduced target frequencies. Key differences between B4860 and B4420 ---------------------------------------- B4420 has: 1. Fewer e6500 cores: 1 cluster with 2 e6500 cores 2. Fewer SC3900 cores/clusters: 1 cluster with 2 SC3900 cores per cluster. 3. Single DDRC 4. 2X 4 lane serdes 5. 3 SGMII interfaces 6. no sRIO 7. no 10G Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com> Signed-off-by: Poonam Aggrwal <poonam.aggrwal@freescale.com> Signed-off-by: Andy Fleming <afleming@freescale.com>
* | powerpc/mpc85xx: Few updates for B4860 cpu changesPoonam Aggrwal2013-01-30-0/+79
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | - Added some more serdes1 and serdes2 combinations serdes1= 0x2c, 0x2d, 0x2e serdes2= 0x7a, 0x8d, 0x98 - Updated Number of DDR controllers to 2. - Added FMAN file for B4860, drivers/net/fm/b4860.c Signed-off-by: York Sun <yorksun@freescale.com> Signed-off-by: Shaveta Leekha <shaveta@freescale.com> Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com> Signed-off-by: Sandeep Singh <Sandeep@freescale.com> Signed-off-by: Poonam Aggrwal <poonam.aggrwal@freescale.com> Signed-off-by: Andy Fleming <afleming@freescale.com>
* | i2c: mxs: Staticize the functions in the driverMarek Vasut2013-01-29-4/+4
|/ | | | | | | | The local functions in the mxs i2c driver are not marked static, make it so. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Stefano Babic <sbabic@denx.de> Cc: Heiko Schocher <hs@denx.de>
generated by cgit v1.1 at 2024-12-23 00:34:12 +0000