summaryrefslogtreecommitdiff
path: root/drivers
Commit message (Collapse)AuthorAgeLines
* Add sata sil3114 supportTor Krill2008-06-29-0/+987
| | | | Signed-off-by: Tor Krill <tor@excito.com>
* pcmcia/ti_pci1410a: Move compile condition to the MakefileJean-Christophe PLAGNIOL-VILLARD2008-06-26-3/+3
| | | | Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
* pxa_pcmcia: Move compile condition to the MakefileJean-Christophe PLAGNIOL-VILLARD2008-06-26-5/+1
| | | | Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
* marabun_pcmcia: Move compile condition to the MakefileJean-Christophe PLAGNIOL-VILLARD2008-06-26-5/+4
| | | | Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
* cfi-flash: Fix problem in flash_toggle(), busy was not detected reliablyStefan Roese2008-06-19-8/+4
| | | | | | | | | | | | | This patch simplifies flash_toggle() (AMD commandset), which is used to detect if a FLASH device is still busy with erase/program operations. On 800MHz Canyonlands/Glacier boards (460EX/GT) the current implementation did not detect the busy state reliably, resulting in non erased sectors etc. This patch now simplifies this function by "just" comparing the complete data-word instead of ANDing it with the command-word (0x40) before the compatison. It is done the same way in the Linux implementation chip_ready() in cfi_cmdset_0002.c. Signed-off-by: Stefan Roese <sr@denx.de>
* Merge branch 'master' of git://www.denx.de/git/u-boot-shWolfgang Denk2008-06-11-55/+73
|\
| * sh: SH7763 SCIF supportNobuhiro Iwamatsu2008-06-09-55/+73
| | | | | | | | | | | | | | | | SH7763 has 3 SCIF channels. SCIF0 and 1 are same register constitution, but only SCIF2 is different. This patch work all SCIF channel. Signed-off-by: Nobuhiro Iwamatsu <iwamatsu.nobuhiro@renesas.com> Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
* | Merge branch 'master' of git://www.denx.de/git/u-boot-mipsWolfgang Denk2008-06-11-14/+14
|\ \
| * | [MIPS] Update <asm/addrspace.h> headerShinya Kuribayashi2008-06-05-14/+14
| |/ | | | | | | | | | | | | - Fix traditional KSEG names - Replace PHYSADDR with CPHYSADDR Signed-off-by: Shinya Kuribayashi <skuribay@ruby.dti.ne.jp>
* | Merge branch 'master' of git://www.denx.de/git/u-boot-fdtWolfgang Denk2008-06-11-14/+19
|\ \
| * | Convert mpc7448hpc2 to CONFIG_OF_LIBFDTGerald Van Baren2008-06-09-14/+19
| |/ | | | | | | | | | | | | | | | | | | | | | | | | This was configured to use the deprecated CONFIG_OF_FLAT_TREE, change to CONFIG_OF_LIBFDT. WARNING: This conversion is untested because I do not have a board to test it on. NOTE: The FDT blob (DTS) must have an /aliases/ethernet0 and (optionally) /aliases/ethernet1 property for the ethernet to work. Signed-off-by: Gerald Van Baren <vanbaren@cideas.com>
* | Merge branch 'master' of git://www.denx.de/git/u-boot-cfi-flashWolfgang Denk2008-06-11-7/+34
|\ \
| * | cfi_flash: enable M18 flash chips family support.Vasiliy Leoenenko2008-06-03-2/+21
| | | | | | | | | | | | | | | | | | | | | | | | Added new command set ID. Buffered write command processing is changed in order to support M18 flash chips family. Signed-off-by: Alexey Korolev <akorolev@infradead.org> Signed-off-by: Vasiliy Leonenko <vasiliy.leonenko@mail.ru>
| * | cfi_flash: support of long cmd in U-boot.Vasiliy Leoenenko2008-06-03-7/+15
| | | | | | | | | | | | | | | | | | | | | | | | | | | Some NOR flash chips needs support of commands with length grether than max value size of uchar. For example all M18 family chips use 0x1ff command in buffered write mode as value of program loops count. Signed-off-by: Alexey Korolev <akorolev@infradead.org> Signed-off-by: Vasiliy Leonenko <vasiliy.leonenko@mail.ru>
* | | Merge branch 'master' of git://www.denx.de/git/u-boot-netWolfgang Denk2008-06-11-330/+361
|\ \ \
| * | | net: Conditional COBJS inclusion of network driversShinya Kuribayashi2008-06-09-201/+34
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Replace COBJS-y with appropriate driver config names. Signed-off-by: Shinya Kuribayashi <skuribay@ruby.dti.ne.jp> Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
| * | | Merge branch 'master' of git://git.denx.de/u-bootBen Warren2008-06-08-63/+1302
| |\ \ \ | | | |/ | | |/|
| * | | DM9000 fix status check fail 0x6d error for trizeps boardRemy Bohmer2008-06-05-9/+8
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | According to the Application Notes of the DM9000, only the 2 bits 0:1 of the status byte need to be checked to identify a valid packet in the fifo But, The several different Application Notes do not all speak the same language on these bits. They do not disagree, but only 1 Application Note noted explicitly that only these 2 bits need to be checked. Even the datasheets do not mention anything about these 2 bits. Because the old code, and the kernel check the whole byte, I left this piece untouched. However, I tested all board/DM9000[A|E|EP] devices with this 2 bit check, so it should work. Notice, that the 2nd iteration through this receive loop (when a 2nd packet is in the fifo) is much shorter now, compared to the older U-boot driver code, so that we can maybe run into a hardware condition now that was never seen before, or maybe was seen very unfrequently. Additionaly added a cleanup of a stack variable. Signed-off-by: Remy Bohmer <linux@bohmer.net> Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
| * | | Fix order for reading rx-status registers in 32bit mode of DM9000Remy Bohmer2008-06-04-1/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | A last minute cleanup before submitting the DM9000A patch series yesterday introduced a bug in reading the rx-status registers in 32bit mode only. This patch repairs this. Signed-off-by: Remy Bohmer <linux@bohmer.net> Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
| * | | DM9000: Some minor code cleanupsRemy Bohmer2008-06-04-15/+26
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Some lines of the U-boot DM9000x driver are longer than 80 characters, or need some other minor cleanup. Signed-off-by: Remy Bohmer <linux@bohmer.net> Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
| * | | DM9000: Make driver work properly for DM9000ARemy Bohmer2008-06-04-39/+54
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The DM9000A network controller does not work with the U-boot DM9000x driver. Analysis showed that many incoming packets are lost. The DM9000A Application Notes V1.20 (section 5.6.1) recommend that the poll to check for a valid rx packet be done on the interrupt status register, not directly by performing the dummy read and the rx status check as is currently the case in the u-boot driver. When the recommended poll is done as suggested the driver starts working correctly on 10Mbit/HD, but on 100MBit/FD packets come in faster so that there can be more than 1 package in the fifo at the same time. The driver must perform the rx-status check in a loop and read and handle all packages until there is no more left _after_ the interrupt RX flag is set. This change has been tested with DM9000A, DM9000E, DM9000EP. Signed-off-by: Remy Bohmer <linux@bohmer.net> Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
| * | | DM9000: Improve eth_reset() routineRemy Bohmer2008-06-04-3/+31
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | According to the application notes of the DM9000 v1.22 chapter 5.2 bullet 2, the reset procedure must be done twice to properly reset the DM9000 by means of software. This errata is not needed anymore for the DM9000A, but it does not bother it. This change has been tested with DM9000A, DM9000E, DM9000EP. Signed-off-by: Remy Bohmer <linux@bohmer.net> Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
| * | | DM9000: improve eth_send() routineRemy Bohmer2008-06-04-4/+11
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The eth_send routine of the U-boot DM9000x driver does not match the DM9000 or DM9000A application notes/programming guides. This change improves the stability of the DM9000A network controller. This change has been tested with DM9000A, DM9000E, DM9000EP. Signed-off-by: Remy Bohmer <linux@bohmer.net> Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
| * | | DM9000: repair debug loggingRemy Bohmer2008-06-04-12/+21
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | It seems that the debugging code of the DM9000x driver in U-boot has not been compiled for a long time, because it cannot compile... Also rearranged some loglines to get more useful info while debugging. Signed-off-by: Remy Bohmer <linux@bohmer.net> Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
| * | | DM9000: Add data bus-width auto detection.Remy Bohmer2008-06-04-58/+129
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The U-boot DM9000x driver contains a compile time bus-width definition for the databus connected to the network controller. This compile check makes the code unclear, inflexible and is unneccessary. It can be asked to the network controller what its bus-width is by reading bits 6 and 7 of the interrupt status register. The linux kernel already uses a runtime mechanism to determine this bus-width, so the implementation below looks somewhat like that implementation. This change has been tested with DM9000A, DM9000E, DM9000EP. Signed-off-by: Remy Bohmer <linux@bohmer.net> Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
| * | | Merge branch 'master' of git://www.denx.de/git/u-bootBen Warren2008-06-02-4/+7
| |\ \ \ | | | |/ | | |/|
| * | | E1000: Add support for the 82541GI LF Intel Pro 1000 GT Desktop AdapterWolfgang Grandegger2008-06-02-1/+4
| | | | | | | | | | | | | | | | | | | | Signed-off-by: Wolfgang Grandegger <wg@grandegger.com> Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
| * | | ColdFire: Add 10 base ethernet support for mcf5445xTsiChung Liew2008-06-02-0/+6
| | | | | | | | | | | | | | | | | | | | Signed-off-by: TsiChung Liew <Tsi-Chung.Liew@freescale.com> Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
| * | | Add Marvell 88E1118 support for TSECRon Madrid2008-05-23-0/+31
| | | | | | | | | | | | | | | | | | | | Signed-off-by: Ron Madrid <ron_madrid@sbcglobal.net> Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
| * | | smc911x: add 16 bit supportJens Gehrlein2008-05-22-2/+19
| | | | | | | | | | | | | | | | | | | | Signed-off-by: Jens Gehrlein <sew_s@tqs.de> Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
* | | | FSL LAW: Add new interface to use the last free LAWKumar Gala2008-06-11-0/+19
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | LAWs have the concept of priority so its useful to be able to allocate the lowest (highest number) priority. We will end up using this with the new DDR code. Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* | | | FSL LAW: Keep track of LAW allocationsKumar Gala2008-06-11-7/+39
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Make it so we keep track of which LAWs have allocated and provide a function (set_next_law) which can allocate a LAW for us if one is free. In the future we will move to doing more "dynamic" LAW allocation since the majority of users dont really care about what LAW number they are at. Also, add CONFIG_MPC8540 or CONFIG_MPC8560 to those boards which needed them Signed-off-by: Kumar Gala <galak@kernel.crashing.org> Signed-off-by: Andy Fleming <afleming@freescale.com>
* | | | NAND: Added support for 128-bit OOB, adaptedSergei Poselenov2008-06-11-13/+33
| | | | | | | | | | | | | | | | Signed-off-by: Sergei Poselenov <sposelenov@emcraft.com>
* | | | TQM8548: Basic support for the TQM8548 modulesWolfgang Grandegger2008-06-11-10/+21
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch adds basic support for the TQM8548 module from TQ-Components (http://www.tqc.de/) including DDR2 SDRAM initialisation and support for eTSEC 3 and 4 Furthermore Flash buffer write has been enabled to speed up output to the Flash by approx. a factor of 10. Signed-off-by: Thomas Waehner <thomas.waehner@tqs.de> Signed-off-by: Wolfgang Grandegger <wg@grandegger.com>
* | | | NAND FSL UPM: driver re-write using the hwcontrol callbackWolfgang Grandegger2008-06-10-82/+46
| |_|/ |/| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This is a re-write of the NAND FSL UPM driver using the more universal hwcontrol callback (instead of the cmdfunc callback). Here is a brief list of furher modifications: - For the time being, the UPM setup writing the UPM array has been removed from the driver and must now be done by the board specific code. - The bus width definition in "struct fsl_upm_nand" is now in bits to comply with the corresponding Linux driver and 8, 16 and 32 bit accesses are supported. - chip->dev_read is only set if fun->dev_ready != NULL, which is required for boards not connecting the R/B pin. - A few issue have been fixed with MxMR bit manipulation like in the corresponding Linux driver. Note: I think the "io_addr" field of "struct fsl_upm" could be removed as well, because the address is already determined by "nand->IO_ADDR_[RW]", but I'm not 100% sure. This patch has been tested on a TQM8548 modules with the NAND chip Micron MT29F8G08FABWP. This patch is based on the following patches posted to this list a few minutes ago: PPC: add accessor macros to clear and set bits in one shot 83xx/85xx/86xx: add more MxMR local bus definitions Signed-off-by: Wolfgang Grandegger <wg@grandegger.com> Acked-by: Anton Vorontsov <avorontsov@ru.mvista.com>
* | | DTT: Issue one-shot command on AD7414 (LM75 code) to read tempStefan Roese2008-06-03-0/+13
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | On AD7414 the first value upon bootup is not read correctly. This is most likely because of the 800ms update time of the temp register in normal update mode. To get current values each time we issue the "dtt" command including upon powerup we switch into one-short mode. This patch fixes the problem on AD7414 equipped boards (Sequoia, Canyonlands etc), that temp value printed in the bootup log was incorrect. Signed-off-by: Stefan Roese <sr@denx.de>
* | | SPI Flash subsystemHaavard Skinnemoen2008-06-03-0/+616
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This adds a new SPI flash subsystem. Currently, only AT45 DataFlash in non-power-of-two mode is supported, but some preliminary support for other flash types is in place as well. Signed-off-by: Haavard Skinnemoen <haavard.skinnemoen@atmel.com>
* | | atmel_spi: Driver for the Atmel SPI controllerHans-Christian Egtvedt2008-06-03-0/+306
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This adds a driver for the SPI controller found on most AT91 and AVR32 chips, implementing the new SPI API. Changed in v4: - Update to new API - Handle zero-length transfers appropriately. The user may send a zero-length SPI transfer with SPI_XFER_END set in order to deactivate the chip select after a series of transfers with chip select active. This is useful e.g. when polling the status register of DataFlash. Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com>
* | | SPI API improvementsHaavard Skinnemoen2008-06-03-61/+191
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch gets rid of the spi_chipsel table and adds a handful of new functions that makes the SPI layer cleaner and more flexible. Instead of the spi_chipsel table, each board that wants to use SPI gets to implement three hooks: * spi_cs_activate(): Activates the chipselect for a given slave * spi_cs_deactivate(): Deactivates the chipselect for a given slave * spi_cs_is_valid(): Determines if the given bus/chipselect combination can be activated. Not all drivers may need those extra functions however. If that's the case, the board code may just leave them out (assuming they know what the driver needs) or rely on the linker to strip them out (assuming --gc-sections is being used.) To set up communication parameters for a given slave, the driver needs to call spi_setup_slave(). This returns a pointer to an opaque spi_slave struct which must be passed as a parameter to subsequent SPI calls. This struct can be freed by calling spi_free_slave(), but most driver probably don't want to do this. Before starting one or more SPI transfers, the driver must call spi_claim_bus() to gain exclusive access to the SPI bus and initialize the hardware. When all transfers are done, the driver must call spi_release_bus() to make the bus available to others, and possibly shut down the SPI controller hardware. spi_xfer() behaves mostly the same as before, but it now takes a spi_slave parameter instead of a spi_chipsel function pointer. It also got a new parameter, flags, which is used to specify chip select behaviour. This may be extended with other flags in the future. This patch has been build-tested on all powerpc and arm boards involved. I have not tested NIOS since I don't have a toolchain for it installed, so I expect some breakage there even though I've tried fixing up everything I could find by visual inspection. I have run-time tested this on AVR32 ATNGW100 using the atmel_spi and DataFlash drivers posted as a follow-up. I'd like some help testing other boards that use the existing SPI API. But most of all, I'd like some comments on the new API. Is this stuff usable for everyone? If not, why? Changed in v4: - Build fixes for various boards, drivers and commands - Provide common struct spi_slave definition that can be extended by drivers - Pass a struct spi_slave * to spi_cs_activate and spi_cs_deactivate - Make default bus and mode build-time configurable - Override default SPI bus ID and mode on mx32ads and imx31_litekit. Changed in v3: - Add opaque struct spi_slave for controller-specific data associated with a slave. - Add spi_claim_bus() and spi_release_bus() - Add spi_free_slave() - spi_setup() is now called spi_setup_slave() and returns a struct spi_slave - soft_spi now supports four SPI modes (CPOL|CPHA) - Add bus parameter to spi_setup_slave() - Convert the new i.MX32 SPI driver - Convert the new MC13783 RTC driver Changed in v2: - Convert the mpc8xxx_spi driver and the mpc8349emds board to the new API. Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com> Tested-by: Guennadi Liakhovetski <lg@denx.de>
* | | Fix warnings from gcc-4.3.0 build on a ppc hostKumar Gala2008-06-03-0/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | * The cfi_flash.c memset fix actual allows the board to boot so there is a bit more going on here than just resolving warnings associated with uninitialized variables. * include/asm/bitops.h:302: warning: '__swab32p' is static but used in inline function 'ext2_find_next_zero_bit' which is not static Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* | | Merge remote branch 'u-boot-at91/for-1.3.4'Wolfgang Denk2008-06-03-2/+167
|\ \ \
| * \ \ Merging Stelian Pop AT91 patchesJean-Christophe PLAGNIOL-VILLARD2008-05-24-2/+167
| |\ \ \ | | |/ / | |/| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Merge branch 'testing-V2' Conflicts: board/atmel/at91cap9adk/Makefile Fixing copyright board/atmel/at91sam9260ek/Makefile Fixing copyright board/atmel/at91sam9260ek/u-boot.lds Delete no more needed ld script Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
| | * | Add ATMEL LCD driverStelian Pop2008-05-10-0/+161
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch adds support for the ATMEL LCDC driver which is used on some AT91 and AVR platforms. Is has been tested with the AT91CAP9ADK, AT91SAM9261EK, AT91SAM9263EK and AT91SAM9RLEK boards. Adaptation for AVR32 should probably be easy. Signed-off-by: Stelian Pop <stelian@popies.net> Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
| | * | AT91SAM9263EK supportStelian Pop2008-05-10-2/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch adds support for the AT91SAM9263 chip and the AT91SAM9263EK board. Signed-off-by: Stelian Pop <stelian@popies.net> Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
| | * | AT91SAM9261EK supportStelian Pop2008-05-10-0/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch adds support for the AT91SAM9261 chip and the AT91SAM9261EK board. Signed-off-by: Stelian Pop <stelian@popies.net> Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
| | * | Fix @ -> <at> substitutionStelian Pop2008-05-08-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | When applying the AT91CAP9 patches upstream, something transformed the '@' character into the ' <at> ' sequence. The patch below restores the original form in all the places where it has been modified (the AT91CAP9 files, the AT91SAM9260 files which were copied from AT91CAP9, and a couple of other files where the ' <at> ' sequence was present). Signed-off-by: Stelian Pop <stelian@popies.net> Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
* | | | nand: Correct NAND erase percentage outputDirk Behme2008-05-28-0/+7
| |_|/ |/| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | For NAND erase sizes smaller than one NAND erase block, erase percentage output becomes grater than 100% e.g. -- cut -- > nand info Device 0: NAND 64MiB 1,8V 8-bit, sector size 16 KiB > nand erase 0x100000 0x2000 NAND erase: device 0 offset 0x100000, size 0x2000 Erasing at 0x100000 -- 200% complete. OK > -- cut -- Correct this and give user a warning that more is erased than specified: -- cut -- > nand erase 0x100000 0x2000 NAND erase: device 0 offset 0x100000, size 0x2000 Warning: Erase size 0x00002000 smaller than one erase block 0x00004000 Erasing 0x00004000 instead Erasing at 0x100000 -- 100% complete. OK > -- cut -- Signed-off-by: Dirk Behme <dirk.behme@gmail.com>
* | | Fix endianess conversion in usb_ohci.cChristian Eggers2008-05-22-3/+3
| | | | | | | | | | | | | | | Signed-off-by: Christian Eggers <ceggers@gmx.de> Signed-off-by: Markus Klotzbuecher <mk@denx.de>
* | | USB: add support for multiple PCI OHCI controllersSergei Poselenov2008-05-22-1/+4
|/ / | | | | | | | | | | | | | | | | | | | | | | | | Add new configuration variable CONFIG_PCI_OHCI_DEVNO. In case of several PCI USB controllers on a board this variable specifys which controller to use. Also add USB support for sokrates board. See doc/README.generic_usb_ohci for details. Signed-off-by: Sergei Poselenov <sposelenov@emcraft.com> Signed-off-by: Markus Klotzbuecher <mk@denx.de>
* | Big white-space cleanup.Wolfgang Denk2008-05-21-1721/+1796
| | | | | | | | | | | | | | | | | | | | | | This commit gets rid of a huge amount of silly white-space issues. Especially, all sequences of SPACEs followed by TAB characters get removed (unless they appear in print statements). Also remove all embedded "vim:" and "vi:" statements which hide indentation problems. Signed-off-by: Wolfgang Denk <wd@denx.de>
generated by cgit v1.1 at 2024-11-28 06:11:38 +0000