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* dm: regulator: add function device_get_supply_regulator()Przemyslaw Marczak2015-11-02-0/+7
| | | | | | | | | | | | Some devices are supplied by configurable regulator's output. But there was no function for getting it. This commit adds function, that allows for getting the supply device by it's phandle. The returned regulator device can be used with regulator uclass's API. Signed-off-by: Przemyslaw Marczak <p.marczak@samsung.com> Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
* dm: pmic: add s2mps11 PMIC I/O driverPrzemyslaw Marczak2015-11-02-0/+77
| | | | | | | | | | | | | | | | | | This driver allows I/O operations on the Samsung S2MPS11 PMIC, which provides lots of LDO/BUCK outputs. To enable it, update defconfig with: - CONFIG_PMIC_S2MPS11 and additional, if were not defined: - CONFIG_CMD_PMIC - CONFIG_ERRNO_STR The binding info: doc/device-tree-bindings/pmic/s2mps11.txt Signed-off-by: Przemyslaw Marczak <p.marczak@samsung.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Anand Moon <linux.amoon@gmail.com> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
* Merge branch 'master' of git://git.denx.de/u-boot-fsl-qoriqTom Rini2015-10-30-141/+402
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| * drivers/ddr/fsl_ddr: Make SR_IE configurableJoakim Tjernlund2015-10-30-1/+1
| | | | | | | | | | | | | | | | | | SR_IE(Self-refresh interrupt enable) is needed for Hardware Based Self-Refresh. Make it configurable and let board code handle the rest. Signed-off-by: Joakim Tjernlund <joakim.tjernlund@transmode.se> Reviewed-by: York Sun <yorksun@freescale.com>
| * armv8/ls1043ardb: esdhc: Add esdhc support for ls1043ardbYangbo Lu2015-10-29-6/+6
| | | | | | | | | | | | | | | | This patch adds esdhc support for ls1043ardb. Signed-off-by: Yangbo Lu <yangbo.lu@freescale.com> Signed-off-by: Gong Qianyu <Qianyu.Gong@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
| * armv8/ls1043a: Add Fman supportShaohui Xie2015-10-29-2/+128
| | | | | | | | | | | | | | | | Signed-off-by: Hou Zhiqiang <B48286@freescale.com> Signed-off-by: Shaohui Xie <Shaohui.Xie@freescale.com> Signed-off-by: Mingkai Hu <Mingkai.Hu@freescale.com> Signed-off-by: Gong Qianyu <Qianyu.Gong@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
| * armv8/fsl_lsch3: Change arch to fsl-layerscapeMingkai Hu2015-10-29-6/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | There are two LS series processors are built on ARMv8 Layersacpe architecture currently, LS2085A and LS1043A. They are based on ARMv8 core although use different chassis, so create fsl-layerscape to refactor the common code for the LS series processors which also paves the way for adding LS1043A platform. Signed-off-by: Mingkai Hu <Mingkai.Hu@freescale.com> Signed-off-by: Hou Zhiqiang <B48286@freescale.com> Signed-off-by: Gong Qianyu <Qianyu.Gong@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
| * net/fm: Add QSGMII PCS initShaohui Xie2015-10-29-5/+13
| | | | | | | | | | | | | | | | | | | | | | | | QSGMII PCS needed to be programmed same as SGMII PCS, and there are four ports in QSGMII PCS, port 0, 1, 2, 3, all the four ports shared port 0's MDIO controller, so when programming port 0, we continue to program other three ports. Signed-off-by: Shaohui Xie <Shaohui.Xie@freescale.com> Signed-off-by: Mingkai Hu <Mingkai.Hu@freescale.com> Signed-off-by: Gong Qianyu <Qianyu.Gong@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
| * net: Move some header files to include/Shaohui Xie2015-10-29-6/+6
| | | | | | | | | | | | | | | | | | | | The fsl_dtsec.h & fsl_tgec.h & fsl_fman.h can be shared on both ARM and PPC, move it out of ppc to include/, and change the path in drivers accordingly. Signed-off-by: Shaohui Xie <Shaohui.Xie@freescale.com> Signed-off-by: Gong Qianyu <Qianyu.Gong@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
| * net: fm: bug fix when CONFIG_PHYLIB not definedShaohui Xie2015-10-29-1/+7
| | | | | | | | | | | | | | | | codes related to phylib operations should be wrapped by CONFIG_PHYLIB. Signed-off-by: Shaohui Xie <Shaohui.Xie@freescale.com> Signed-off-by: Gong Qianyu <Qianyu.Gong@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
| * net/fm: Make the return value logic consistent with conventionHou Zhiqiang2015-10-29-24/+36
| | | | | | | | | | | | | | | | | | | | In convention, the '0' is a normal return value indicating there isn't an error. While some functions of FMan IM driver treat '0' as an error return value. Signed-off-by: Hou Zhiqiang <B48286@freescale.com> Signed-off-by: Gong Qianyu <Qianyu.Gong@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
| * net/fm: Add support for 64-bit platformsHou Zhiqiang2015-10-29-33/+60
| | | | | | | | | | | | | | | | | | | | | | | | The FMan IM driver is developed for 32-bit platfroms and isn't friendly to 64-bit platforms, so do the minimal refactor: 1. Refine the MURAM management and access. 2. Correct the initialization and operations for QDs and BDs. Signed-off-by: Hou Zhiqiang <B48286@freescale.com> Signed-off-by: Gong Qianyu <Qianyu.Gong@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
| * net/fm: Fix the endian issue to support both endianness platformsHou Zhiqiang2015-10-29-38/+43
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The Frame Manager(FMan) is a big-endian peripheral, so the registers, internal MURAM and BDs, which are allocated in main memory and used to communication between core and FMan, should be accessed in big-endian. The big-endian platforms can access them directly as the code implemented so far, while for the little-endian platforms it need to swap the byte-order. Signed-off-by: Hou Zhiqiang <B48286@freescale.com> Signed-off-by: Shaohui Xie <Shaohui.Xie@freescale.com> Signed-off-by: Mingkai Hu <Mingkai.Hu@freescale.com> Signed-off-by: Gong Qianyu <Qianyu.Gong@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
| * driver: net: ldpaa_eth: Set MAC address during interface openPrabhakar Kushwaha2015-10-29-12/+3
| | | | | | | | | | | | | | | | | | | | Currently ldpaa ethernet driver rely on DPL file to statically configure mac address for the DPNIs. It is not a correct approach. Add support setting MAC address from env variable or Random MAC address. Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
| * crypto/fsl: SEC driver cleanup for 64 bit and endiannessAneesh Bansal2015-10-29-20/+107
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The SEC driver code has been cleaned up to work for 64 bit physical addresses and systems where endianess of SEC block is different from the Core. Changes: 1. Descriptor created on Core is modified as per SEC block endianness before the job is submitted. 2. The read/write of physical addresses to Job Rings will be depend on endianness of SEC block as 32 bit low and high part of the 64 bit address will vary. 3. The 32 bit low and high part of the 64 bit address in descriptor will vary depending on endianness of SEC. Signed-off-by: Aneesh Bansal <aneesh.bansal@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
* | Merge branch 'master' of git://git.denx.de/u-boot-netTom Rini2015-10-29-33/+85
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| * | dm: core: Remove unnecessary codes in uclass_pre_remove_device()Bin Meng2015-10-29-7/+0
| | | | | | | | | | | | | | | | | | | | | | | | dev->uclass->uc_drv->per_device_auto_alloc_size is to be freed in device_free(), so is dev->seq. Remove these unnecessary codes. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Acked-by: Simon Glass <sjg@chromium.org>
| * | net: pch_gbe: Add driver remove supportBin Meng2015-10-29-0/+12
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | In pch_gbe_probe(), some additional resources are allocated (eg: mdio, phy). We should free these in the driver remove phase. Add pch_gbe_remove() to clean it up. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
| * | net: designware: Add driver remove supportBin Meng2015-10-29-0/+12
| | | | | | | | | | | | | | | | | | | | | | | | | | | In designware_eth_probe(), some additional resources are allocated (eg: mdio, phy). We should free these in the driver remove phase. Add designware_eth_remove() to clean it up. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Acked-by: Simon Glass <sjg@chromium.org>
| * | net: phy: Test previous phydev->dev against new mac devBin Meng2015-10-29-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | In phy_connect_dev(), if the phy device has an accociated mac device before, a warning message will be printed. But we should test the old device against the new one, if they are actually the same one, don't print the warning message. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
| * | net: phy: Change to print all phys that are not foundBin Meng2015-10-29-1/+8
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | In get_phy_device_by_mask(), when no phy is found, currently we only print a message to show the first phy address that is not found. But this is not always the case as multiple phys can be specified by phy_mask. Change to print all phys that are not found, and to reduce the console boot log, change to use 'debug' instead of 'printf'. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
| * | net: phy: Don't create phy device when there is no phyBin Meng2015-10-29-1/+2
| | | | | | | | | | | | | | | | | | | | | | | | In get_phy_device_by_mask(), when no phy is found, we should not create any phy device. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
| * | net: phy: micrel: disable NAND-tree for KSZ8051Sylvain Rochet2015-10-29-0/+29
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | NAND-tree is used to check wiring between MAC and PHY using NAND gates on the PHY side, hence the name. NAND-tree initial status is latched at reset by probing the IRQ pin. However some devices are sharing the PHY IRQ pin with other peripherals such as Atmel SAMA5D[34]x-EK boards when using the optional TM7000 display module, therefore they are switching the PHY in NAND-tree test mode depending on the current IRQ line status at reset. This patch ensure PHY is not in NAND-tree test mode only for the Micrel KSZ8051 PHY used by Atmel. There are other Micrel PHY affected but I doubt they are used on such weird hardware design. Signed-off-by: Sylvain Rochet <sylvain.rochet@finsecur.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
| * | net: rtl8169: Build warning fixes for 64-bitStephen Warren2015-10-29-4/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Casting from dev->priv to pci_dev_t changes the value's size on a 64-bit system. This causes the compiler to complain about casting a pointer to an integer of a different (smaller) size. To avoid this, cast to an integer of matching size first, then perform an int->int cast to perform the size change. This signals explicitly that we do want to change the size, and avoids the compiler warning. This is legitimate since we know the pointer actually stores a small integer, not a pointer value. Signed-off-by: Stephen Warren <swarren@nvidia.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
| * | net: phy: micrel: add support for KSZ8021RNL & KSZ8031RNLSylvain Lemieux2015-10-29-0/+11
| | | | | | | | | | | | | | | | | | | | | This patch adds support for Micrel KSZ8021RNL & KSZ8031RNL. Signed-off-by: Sylvain Lemieux <slemieux@tycoint.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
| * | smsc95xx: Use zero length packets when RX fifo is emptyStefan Brüns2015-10-29-16/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Using NAKs on empty RX fifo for bulk in transfers is the right choice for a interrupt driven model, but U-Boot uses polling and expects an immediate answer if there is no incoming packet. Using ZLP Bulk In Response (BIR) mode avoids unexpected timeouts in the host controller driver. As ZLP mode is reset default, there is no need to set it. Signed-off-by: Stefan Brüns <stefan.bruens@rwth-aachen.de> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
| * | smsc95xx: Fetch whole burst with 1 URB, avoid framing errorsStefan Brüns2015-10-28-3/+4
| |/ | | | | | | | | | | | | | | | | | | | | smsc95xx_recv() does not reassemble bursts spread over multiple URBs. If there is a lot of broadcast traffic, the fifo will fill up to the burst cap limit. Lowering the burst cap to the URB size ensures no packet spans multiple urbs. Caveat, lower limit for working burst cap is 5/33 HS/FS packets. Signed-off-by: Stefan Brüns <stefan.bruens@rwth-aachen.de> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
* | Merge branch 'master' of git://git.denx.de/u-boot-spiTom Rini2015-10-28-361/+1009
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| * | spi: altera_spi: Minor cleanupJagan Teki2015-10-28-5/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | - Moved macro definitions to top - Give tab space to CONFIG_ALTERA_SPI_IDLE_VAL value - Re-arrange header includes ascending order Acked-by: Thomas Chou <thomas@wytron.com.tw> Signed-off-by: Jagan Teki <jteki@openedev.com>
| * | spi: altera_spi: Use BIT macroJagan Teki2015-10-28-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Replace numerical bit shift with BIT macro in altera_spi :%s/(1 << nr)/BIT(nr)/g where nr = 0, 1, 2 .... 31 Cc: Marek Vasut <marex@denx.de> Acked-by: Thomas Chou <thomas@wytron.com.tw> Reviewed-by: Tom Rini <trini@konsulko.com> Signed-off-by: Jagan Teki <jteki@openedev.com>
| * | spi: xilinx_spi: Use GENMASKJagan Teki2015-10-27-7/+7
| | | | | | | | | | | | | | | | | | | | | | | | Replace numeric mask hexcodes with GENMASK macro in xilinx_spi Cc: Michal Simek <michal.simek@xilinx.com> Signed-off-by: Jagan Teki <jteki@openedev.com>
| * | spi: tegra: Use GENMASKJagan Teki2015-10-27-9/+9
| | | | | | | | | | | | | | | | | | | | | | | | | | | Replace numeric mask hexcodes with GENMASK macro in tegra*.c Cc: Stephen Warren <swarren@wwwdotorg.org> Cc: Tom Warren <twarren@nvidia.com> Signed-off-by: Jagan Teki <jteki@openedev.com>
| * | spi: omap3_spi: Use GENMASKJagan Teki2015-10-27-5/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | Replace numeric mask hexcodes with GENMASK macro in omap3_spi Cc: Nikita Kiryanov <nikita@compulab.co.il> Reviewed-by: Tom Rini <trini@konsulko.com> Signed-off-by: Jagan Teki <jteki@openedev.com>
| * | spi: fsl_qspi: Use GENMASKJagan Teki2015-10-27-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | Replace numeric mask hexcodes with GENMASK macro in fsl_qspi Cc: York Sun <yorksun@freescale.com> Cc: Haikun Wang <Haikun.Wang@freescale.com> Signed-off-by: Jagan Teki <jteki@openedev.com>
| * | spi: designware_spi: Use GENMASKJagan Teki2015-10-27-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Replace numeric mask hexcodes with GENMASK macro in designware_spi Cc: Stefan Roese <sr@denx.de> Cc: Marek Vasut <marex@denx.de> Reviewed-by: Tom Rini <trini@konsulko.com> Signed-off-by: Jagan Teki <jteki@openedev.com>
| * | spi: atmel_spi: Use GENMASKJagan Teki2015-10-27-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | Replace numeric mask hexcodes with GENMASK macro in atmel_spi Cc: Bo Shen <voice.shen@atmel.com> Reviewed-by: Tom Rini <trini@konsulko.com> Signed-off-by: Jagan Teki <jteki@openedev.com>
| * | spi: xilinx_spi: Use BIT macroJagan Teki2015-10-27-16/+16
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Replace numerical bit shift with BIT macro in xilinx_spi :%s/(1 << nr)/BIT(nr)/g where nr = 0, 1, 2 .... 31 Cc: Michal Simek <michal.simek@xilinx.com> Reviewed-by: Tom Rini <trini@konsulko.com> Signed-off-by: Jagan Teki <jteki@openedev.com>
| * | spi: ti_qspi: Use BIT macroJagan Teki2015-10-27-5/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Replace numerical bit shift with BIT macro in ti_qspi :%s/(1 << nr)/BIT(nr)/g where nr = 0, 1, 2 .... 31 Reviewed-by: Vignesh R <vigneshr@ti.com> Reviewed-by: Tom Rini <trini@konsulko.com> Signed-off-by: Jagan Teki <jteki@openedev.com>
| * | spi: tegra: Use BIT macroJagan Teki2015-10-27-86/+86
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Replace numerical bit shift with BIT macro in tegra*.c :%s/(1 << nr)/BIT(nr)/g where nr = 0, 1, 2 .... 31 Cc: Stephen Warren <swarren@wwwdotorg.org> Cc: Tom Warren <twarren@nvidia.com> Reviewed-by: Tom Rini <trini@konsulko.com> Signed-off-by: Jagan Teki <jteki@openedev.com>
| * | spi: sh_qspi: Use BIT macroJagan Teki2015-10-27-8/+8
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Replace numerical bit shift with BIT macro in sh_qspi :%s/(1 << nr)/BIT(nr)/g where nr = 0, 1, 2 .... 31 Cc: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com> Reviewed-by: Tom Rini <trini@konsulko.com> Signed-off-by: Jagan Teki <jteki@openedev.com>
| * | spi: omap3_spi: Use BIT macroJagan Teki2015-10-27-24/+24
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Replace numerical bit shift with BIT macro in omap3_spi :%s/(1 << nr)/BIT(nr)/g where nr = 0, 1, 2 .... 31 Cc: Nikita Kiryanov <nikita@compulab.co.il> Reviewed-by: Tom Rini <trini@konsulko.com> Signed-off-by: Jagan Teki <jteki@openedev.com>
| * | spi: mpc8xxx_spi: Use BIT macroJagan Teki2015-10-27-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Replace numerical bit shift with BIT macro in mpc8xxx_spi :%s/(1 << nr)/BIT(nr)/g where nr = 0, 1, 2 .... 31 Reviewed-by: Tom Rini <trini@konsulko.com> Signed-off-by: Jagan Teki <jteki@openedev.com>
| * | spi: ich: Use BIT macroJagan Teki2015-10-27-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Replace numerical bit shift with BIT macro in ich :%s/(1 << nr)/BIT(nr)/g where nr = 0, 1, 2 .... 31 Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com> Signed-off-by: Jagan Teki <jteki@openedev.com>
| * | spi: fsl: Use BIT macroJagan Teki2015-10-27-13/+13
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Replace numerical bit shift with BIT macro in fsl_*spi.c :%s/(1 << nr)/BIT(nr)/g where nr = 0, 1, 2 .... 31 Cc: York Sun <yorksun@freescale.com> Cc: Haikun Wang <Haikun.Wang@freescale.com> Reviewed-by: Tom Rini <trini@konsulko.com> Signed-off-by: Jagan Teki <jteki@openedev.com>
| * | spi: designware_spi: Use BIT macroJagan Teki2015-10-27-7/+7
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Replace numerical bit shift with BIT macro in designware_spi :%s/(1 << nr)/BIT(nr)/g where nr = 0, 1, 2 .... 31 Cc: Stefan Roese <sr@denx.de> Cc: Marek Vasut <marex@denx.de> Reviewed-by: Tom Rini <trini@konsulko.com> Signed-off-by: Jagan Teki <jteki@openedev.com>
| * | spi: cadence_qspi_apb: Use BIT macroJagan Teki2015-10-27-14/+14
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Replace numerical bit shift with BIT macro in cadence_qspi_apb :%s/(1 << nr)/BIT(nr)/g where nr = 0, 1, 2 .... 31 Cc: Stefan Roese <sr@denx.de> Cc: Marek Vasut <marex@denx.de> Acked-by: Vikas Manocha <vikas.manocha@st.com> Reviewed-by: Tom Rini <trini@konsulko.com> Signed-off-by: Jagan Teki <jteki@openedev.com>
| * | spi: bfin_spi6xx: Use BIT macroJagan Teki2015-10-27-4/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Replace numerical bit shift with BIT macro in bfin_spi6xx :%s/(1 << nr)/BIT(nr)/g where nr = 0, 1, 2 .... 31 Reviewed-by: Tom Rini <trini@konsulko.com> Signed-off-by: Jagan Teki <jteki@openedev.com>
| * | spi: atmel_spi: Use BIT macroJagan Teki2015-10-27-26/+26
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Replace numerical bit shift with BIT macro in atmel_spi :%s/(1 << nr)/BIT(nr)/g where nr = 0, 1, 2 .... 31 Cc: Bo Shen <voice.shen@atmel.com> Reviewed-by: Tom Rini <trini@konsulko.com> Signed-off-by: Jagan Teki <jteki@openedev.com>
| * | spi: zynq_[q]spi: Use GENMASK macroJagan Teki2015-10-27-7/+7
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | GENMASK macro used on zynq_spi.c and zynq_qspi.c GENMASK is used to create a contiguous bitmask([hi:lo]). Ex: (0x7 << 3) => GENMASK(5, 3) Cc: Michal Simek <michal.simek@xilinx.com> Acked-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com> Signed-off-by: Jagan Teki <jteki@openedev.com>
| * | spi: zynq_[q]spi: Use BIT macroJagan Teki2015-10-27-18/+18
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Used BIT macro on zynq_spi.c and zynq_qspi.c :%s/(1 << nr)/BIT(nr)/g where nr = 0, 1, 2 .... 31 Cc: Michal Simek <michal.simek@xilinx.com> Acked-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com> Reviewed-by: Tom Rini <trini@konsulko.com> Signed-off-by: Jagan Teki <jteki@openedev.com>
generated by cgit v1.1 at 2024-09-19 21:05:08 +0000