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* x86: Move CONFIG_X86_SERIAL to KconfigSimon Glass2015-08-05-0/+10
| | | | | | | Move this config option to Kconfig and tidy up. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
* pci: Indicate prefetchable memory allocate when debuggingSimon Glass2015-08-05-2/+3
| | | | | | | | | | At present the PCI output displays 'Mem' when it allocates memory for a PCI device, whether it is prefetchable or not. There is a distinction since the memory comes from separate pools. Use 'Prf' instead of 'Mem' when allocating prefetchable memory. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
* pci: Add a constant for an invalid interruptSimon Glass2015-08-05-1/+2
| | | | | | | Rather than using 0xff in the code, add a constant. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
* pci: Fix up code for CONFIG_PCI_ENUM_ONLYSimon Glass2015-08-05-1/+3
| | | | | | | | This option is not used by any board but appears to still be useful, at least for testing. With recent commits it does not build, so fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
* pci: Use debug() instead of DEBUGF() in pci_auto.cSimon Glass2015-08-05-25/+23
| | | | | | | | | This file does not need its own way of doing debug(). Clean it up to use the new way. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Pavel Machek <pavel@denx.de> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
* x86: Add some missing global_data declarations in files that use gdSimon Glass2015-08-05-0/+2
| | | | | | | Some files use global_data but don't declare it. Fix this. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
* dm: serial: Correct logic in serial_find_console_or_panic()Simon Glass2015-08-05-1/+1
| | | | | | | | | | | | | In a final attempt to find a console UART this function uses the first first available serial device. However the check for a valid device is inverted. This code is only executed when there is in fact no serial UART, but at present it can fail to reach the panic_str() call in this case, and start trying to use a non-existent UART. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
* dm: core: Check for empty list in uclass_find_device()Simon Glass2015-08-05-0/+2
| | | | | | | | This function needs to check the list has entries before traversing it. Fix this bug. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
* x86: Sanity test on vesa parameters before setting up kernel screen_infoBin Meng2015-08-05-0/+4
| | | | | | | | We should not set up kernel screen_info when the vesa parameters are insane, otherwise kernel will panic. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Acked-by: Simon Glass <sjg@chromium.org>
* dm: pci: Allow scan bridge child devices before relocationBin Meng2015-08-05-4/+0
| | | | | | | | | On some platforms pci devices behind bridge need to be probed (eg: a pci uart on recent x86 chipset) before relocation. Remove such limitation so that dm pci can be used before relocation. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Acked-by: Simon Glass <sjg@chromium.org>
* drivers/ddr/fsl: Adjust bstopre valueYork Sun2015-08-03-5/+7
| | | | | | | | | By default the bstopre value has been set to 0x100, used to be 1/4 value of refint. Modern DDR has increased the refresh time. Adjust to 1/4 of refresh interval dynamically. Individual board can still override this value in board ddr file, or to use auto-precharge. Signed-off-by: York Sun <yorksun@freescale.com>
* drivers/crypto/fsl: clean-up - use fdt_setprop_u32 helperhoria.geanta@freescale.com2015-08-03-9/+8
| | | | | | Signed-off-by: Horia Geantă <horia.geanta@freescale.com> Acked-by: Ruchika Gupta<ruchika.gupta@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
* drivers/crypto/fsl: fix snooping for write transactionshoria.geanta@freescale.com2015-08-03-4/+8
| | | | | | | | | | | | | | | | | | | | HW coherency won't work properly for CAAM write transactions if AWCACHE is left to default (POR) value - 4'b0001. It has to be programmed to 4'b0010. For platforms that have HW coherency support: -PPC-based: the update has no effect; CAAM coherency already works due to the IOMMU (PAMU) driver setting the correct memory coherency attributes -ARM-based: the update fixes cache coherency issues, since IOMMU (SMMU) driver is not programmed to behave similar to PAMU Fixes: b9eebfade974c ("fsl_sec: Add hardware accelerated SHA256 and SHA1") Signed-off-by: Horia Geantă <horia.geanta@freescale.com> Reviewed-by: Aneesh Bansal <aneesh.bansal@freescale.com> Reviewed-by: Mingkai Hu <Mingkai.Hu@freescale.com> Acked-by: Ruchika Gupta<ruchika.gupta@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
* drivers/crypto/fsl: fix "era" property value on LE platformshoria.geanta@freescale.com2015-08-03-2/+1
| | | | | | | | | | Use fdt_setprop_u32() instead of fdt_setprop(). Fixes: 0181937fa371a ("crypto/fsl: Add fixup for crypto node") Signed-off-by: Horia Geantă <horia.geanta@freescale.com> Reviewed-by: Mingkai Hu <Mingkai.Hu@freescale.com> Acked-by: Ruchika Gupta<ruchika.gupta@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
* drivers/pci/layerscape: Add EP mode supportMinghuan Lian2015-08-03-2/+135
| | | | | | | | | | | | | | | | The patch will initialize PCIe controller on EP mode 1. Setup bar: bar0 32bit 4K for specific configuration bar1 32bit 8K for MSIX bar2 64bit 4K for descriptor of memory bar4 64bit 1M for DMA memory test 2. Setup iATU: iATU inbound 0-3 to map bar transaction to memory address started at CONFIG_SYS_PCI_EP_MEMORY_BASE iATU outbound 0 to map 4G memory space Signed-off-by: Minghuan Lian <Minghuan.Lian@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
* drivers/pci: Add function to find an extended capabilityMinghuan Lian2015-08-03-0/+53
| | | | | | | | | | PCIe extends device's configuration space to 4k and provides extended capability. The patch adds function to find them. The code is ported from Linux PCIe driver. Signed-off-by: Minghuan Lian <Minghuan.Lian@freescale.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: York Sun <yorksun@freescale.com>
* drivers/fsl-mc: flib changes for mc 8.0.0Prabhakar Kushwaha2015-08-03-129/+261
| | | | | | | | | MC firware version 8.0.0 contains new command flags. This patch contains modifications in FLIB files to support the new command flags. Signed-off-by: Itai Katz <itai.katz@freescale.com> Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
* drivers/crypto/fsl: enable raw data instead of von Neumann dataAlex Porosanu2015-08-03-1/+10
| | | | | | | | | | | | The sampling of the oscillator can be done in multiple modes for generating the entropy value. By default, this is set to von Neumann. This patch changes the sampling to raw data, since it has been discovered that the generated entropy has a better 'quality'. Signed-off-by: Alex Porosanu <alexandru.porosanu@freescale.com> Acked-by: Ruchika Gupta<ruchika.gupta@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
* drivers/crypto/fsl: disable RNG oscillator maximum frequency checkAlex Porosanu2015-08-03-2/+2
| | | | | | | | | | | | | | | | | The rtfrqmax & rtfrqmin set the bounds of the expected frequency of the oscillator, when SEC runs at its maximum frequency. For certain platforms (f.i. T2080), the oscillator is very fast and thus if the SEC runs at a lower than normal frequency, the ring oscillator is incorrectly detected as being out of bounds. This patch effectively disables the maximum frequency check, by setting a high enough maximum allowable frequency for the oscillator. The reasoning behind this is that usually a broken oscillator will run too slow (i.e. not run at all) rather than run too fast. Signed-off-by: Alex Porosanu <alexandru.porosanu@freescale.com> Acked-by: Ruchika Gupta<ruchika.gupta@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
* driver/qe: use strncpy instead of strcpyZhao Qiang2015-08-03-1/+1
| | | | | | | strncpy is safer than strcpy, use it to instead of strcpy. Signed-off-by: Zhao Qiang <B45475@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
* drivers/qe: transform parameter to compatible typeZhao Qiang2015-08-03-2/+3
| | | | | | | | when using printf, the parameter type need to be compatible type, so transform them to compatible type Signed-off-by: Zhao Qiang <B45475@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
* fsl_esdhc.c: Always make check_and_invalidate_dcache_range availableTom Rini2015-08-02-2/+0
| | | | | | | This function is called from esdhc_send_cmd so we need it available to everyone. Signed-off-by: Tom Rini <trini@konsulko.com>
* Merge branch 'master' of git://www.denx.de/git/u-boot-imxTom Rini2015-08-02-27/+139
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| * mxc: gpio add i.MX6UL supportPeng Fan2015-08-02-0/+4
| | | | | | | | | | | | i.MX6UL does not have GPIO6/7, so do not include them for i.MX6UL. Signed-off-by: Peng Fan <Peng.Fan@freescale.com>
| * sf: kconfig: add kconfig options for spi flashesNikita Kiryanov2015-08-02-0/+44
| | | | | | | | | | | | | | | | | | | | Add kconfig options for various SPI flashes and use them in cm-fx6 defconfig. Cc: Jagan Teki <jteki@openedev.com> Cc: Stefano Babic <sbabic@denx.de> Cc: Igor Grinberg <grinberg@compulab.co.il> Signed-off-by: Nikita Kiryanov <nikita@compulab.co.il> Acked-by: Igor Grinberg <grinberg@compulab.co.il>
| * usb: kconfig: create a menu for usbNikita Kiryanov2015-08-02-0/+2
| | | | | | | | | | | | | | | | | | | | With recent additions to USB Kconfig the number of USB options had grown large enough to warrant a separate menu for USB. Add a Kconfig menu for USB. Cc: Marek Vasut <marex@denx.de> Signed-off-by: Nikita Kiryanov <nikita@compulab.co.il>
| * usb: kconfig: usb keyboard kconfigNikita Kiryanov2015-08-02-0/+27
| | | | | | | | | | | | | | | | | | | | Add Kconfig options for USB keyboard and use them for cm-fx6. Cc: Marek Vasut <marex@denx.de> Cc: Stefano Babic <sbabic@denx.de> Cc: Igor Grinberg <grinberg@compulab.co.il> Signed-off-by: Nikita Kiryanov <nikita@compulab.co.il> Acked-by: Igor Grinberg <grinberg@compulab.co.il>
| * arm: mx6: usb: kconfig: add USB_EHCI_MX6 kconfig optionNikita Kiryanov2015-08-02-0/+7
| | | | | | | | | | | | | | | | | | | | | | | | Add USB_EHCI_MX6 option to menuconfig and use it when migrating cm-fx6 usb config to defconfig. Cc: Masahiro Yamada <yamada.masahiro@socionext.com> Cc: Marek Vasut <marex@denx.de> Cc: Stefano Babic <sbabic@denx.de> Cc: Igor Grinberg <grinberg@compulab.co.il> Signed-off-by: Nikita Kiryanov <nikita@compulab.co.il> Acked-by: Igor Grinberg <grinberg@compulab.co.il>
| * mmc:fsl_esdhc invalidate dcache before readPeng Fan2015-07-26-0/+8
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | DCIMVAC is upgraded to DCCIMVAC for the individual processor (Cortex-A7) that the DCIMVAC is executed on. We should follow the linux dma follow. Before DMA read, first invalidate dcache then after DMA read, invalidate dcache again. With the DMA direction DMA_FROM_DEVICE, the dcache need be invalidated again after the DMA completion. The reason is that we need explicity make sure the dcache been invalidated thus to get the DMA'ed memory correctly from the physical memory. Any cache-line fill during the DMA operations such as the pre-fetching can cause the DMA coherency issue, thus CPU get the stale data. Signed-off-by: Peng Fan <Peng.Fan@freescale.com> Signed-off-by: Ye.Li <B37916@freescale.com> Signed-off-by: Nitin Garg <nitin.garg@freescale.com> Signed-off-by: Jason Liu <r64343@freescale.com> Reviewed-by: Stefano Babic <sbabic@denx.de>
| * power: pmic: Add support for MAX77696 PMICFabio Estevam2015-07-26-0/+33
| | | | | | | | | | | | Add support for MAX77696 PMIC. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
| * Merge branch 'master' of git://git.denx.de/u-bootStefano Babic2015-07-17-1044/+445
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| * | thermal: imx_thermal: fix busywait if IMX6 temp <0CTim Harvey2015-07-10-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The temperature calculation must be typecasted to keep the compiler from sign extending a negative value prior to division. This fixes an issue where if the CPU temperature is <0C it will get stuck in the busywait loop until the CPU heats up to 0C. Cc: Ye Li <b37916@freescale.com> Cc: Jason Liu <r64343@freescale.com> Signed-off-by: Tim Harvey <tharvey@gateworks.com>
| * | i2c: fix vf610 supportAlbert ARIBAUD \(3ADEV\)2015-07-10-1/+2
| | | | | | | | | | | | | | | | | | | | | Add support in mxc_i2c driver, iomux_v3 and vf610 architecture for the four I2C instances available in VF610. Signed-off-by: Albert ARIBAUD (3ADEV) <albert.aribaud@3adev.fr>
| * | net: fec_mxc: remove useless struct nbufAlbert ARIBAUD \(3ADEV\)2015-07-10-15/+5
| | | | | | | | | | | | | | | | | | | | | | | | This locally defined struct is actually only used once and as an opaque type. Remove it for clarity. Signed-off-by: Albert ARIBAUD (3ADEV) <albert.aribaud@3adev.fr> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
| * | thermal:imx_thermal: enter busywait cooling loop when over max CPU tempTim Harvey2015-07-10-10/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Remove the check for temperature being within the min/max range and enter the busywait cooling loop whenever the CPU temperature is over the critical temp. This fixes the issue where if a board was booted at a temp greater than the CPU temperature max, it would skip the loop and never indicate or try to address the overtemp issue. Cc: Ye Li <b37916@freescale.com> Cc: Jason Liu <r64343@freescale.com> Signed-off-by: Tim Harvey <tharvey@gateworks.com>
* | | Merge branch 'master' of git://git.denx.de/u-boot-tegraTom Rini2015-07-29-10/+49
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| * | | ARM: Tegra210: Add support to common Tegra source/config filesTom Warren2015-07-28-2/+41
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Derived from Tegra124, modified as appropriate during T210 board bringup. Cleaned up debug statements to conserve string space, too. This also adds misc 64-bit changes from Thierry Reding/Stephen Warren. Signed-off-by: Tom Warren <twarren@nvidia.com> Signed-off-by: Thierry Reding <treding@nvidia.com> Signed-off-by: Stephen Warren <swarren@nvidia.com>
| * | | mmc: tegra: Build warning fixes for 64-bitThierry Reding2015-07-27-3/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Signed-off-by: Thierry Reding <treding@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com> Signed-off-by: Stephen Warren <swarren@nvidia.com> Reviewed-by: Simon Glass <sjg@chromium.org>
| * | | i2c: tegra: Build warning fixes for 64-bitThierry Reding2015-07-27-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Signed-off-by: Thierry Reding <treding@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com> Signed-off-by: Stephen Warren <swarren@nvidia.com> Acked-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com>
| * | | dfu: fix 64-bit compile warningsStephen Warren2015-07-27-3/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Use %p to print pointers. The max value of (i_buf - i_buf_start) should be dfu_buf_size, which is an unsigned long, so cast the pointer difference to that type to print. Change-Id: Iee242df9f8eb091aecfe0cea4c282b28b547acfe Signed-off-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com>
* | | | dm: pci: Support bridge device configuration correctlyBin Meng2015-07-28-18/+61
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Commit aec241d "dm: pci: Use the correct hose when configuring devices" was an attempt to fix pci bridge device configuration, but unfortunately that does not work 100%. In pciauto_config_devices(), the fix tried to call pciauto_config_device() with a ctlr_hose which is supposed to be the root controller hose, however when walking through a pci topology with 2 or more pci bridges this logic simply fails. The call chain is: pciauto_config_devices()->pciauto_config_device() ->dm_pci_hose_probe_bus(). Here the call to dm_pci_hose_probe_bus() does not make any sense as the given hose is not the bridge device's hose, instead it is either the root controller's hose (case#1: if it is the 2nd pci bridge), or the bridge's parent bridge's hose (case#2: if it is the 3rd pci bridge). In both cases the logic is wrong. For example, for failing case#1 if the bridge device to config has the same devfn as one of the devices under the root controller, the call to pci_bus_find_devfn() will return the udevice of that pci device under the root controller as the bus, but this is wrong as the udevice is not a bus which does not contain all the necessary bits associated with the udevice which causes further failures. To correctly support pci bridge device configuration, we should still call pciauto_config_device() with the pci bridge's hose directly. In order to access valid pci region information, we need to refer to the root controller simply by a call to pci_bus_to_hose(0) and get the region information there in the pciauto_prescan_setup_bridge(), pciauto_postscan_setup_bridge() and pciauto_config_device(). Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
* | | | dm: pci: Pass only device/function to pci_bus_find_devfn()Bin Meng2015-07-28-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | In dm_pci_hose_probe_bus(), pci_bus_find_devfn() is called with a bdf which includes a bus number, but it really should not as this routine only expects a device/function encoding. Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
* | | | dm: pci: Use complete bdf in all pci config read/write routinesBin Meng2015-07-28-27/+27
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Currently pci_bus_read_config() and pci_bus_write_config() are called with bus number masked off in the parameter bdf, and bus number is supposed to be added back in the bridge driver's pci config read/write ops if the device is behind a pci bridge. However this logic only works for a pci topology where there is only one bridge off the root controller. If there is addtional bridge in the system, the logic will create a non-existent bdf where its bus number gets accumulated across bridges. To correct this, we change all pci config read/write routines to use complete bdf all the way up to the root controller. Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
* | | | dm: pci: Correct primary/secondary/subordinate bus number assignmentBin Meng2015-07-28-0/+9
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | In driver model, each pci bridge device has its own hose structure. hose->first_busno points to the bridge device's device number, so we should not substract hose->first_busno before programming the bridge device's primary/secondary/subordinate bus number registers. Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
* | | | Merge branch 'zynq' of git://www.denx.de/git/u-boot-microblazeTom Rini2015-07-28-9/+21
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| * | | | spi: zynq_spi: Simplify debug macroMichal Simek2015-07-28-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Trivial fix. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
| * | | | net: gem: Extend timeout valueMichal Simek2015-07-28-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Extend time for MDIO. (Because of zed board) Signed-off-by: Michal Simek <michal.simek@xilinx.com>
| * | | | spi: Fix zynq SPI bindingMichal Simek2015-07-28-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Zynq is using Cadence IP where binding is documented in the Linux kernel and there is no reason to use different binding. Synchronize it. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
| * | | | zynq: gem: Setting up WRAP bit for one TX bdMichal Simek2015-07-28-1/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Setting up WRAP bit to indicate that this is the last TX BD in the chain. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
| * | | | zynq: gem: Increase the Rx buffer descriptors to 32Siva Durga Prasad Paladugu2015-07-28-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Increase the Rx Buffer descriptors to 32. This will avoid Rx buffer descriptors overflow if more packets were received at one shot before we process the received ones. This fixes the issue of intermittent timeouts during tftp on a 1Gb connection with tftp server running on windows. Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
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