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| * | | net/ethoc: implement MDIO bus and support phylibMax Filippov2016-08-15-6/+150
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Implement MDIO bus read/write functions, initialize the bus and scan for the PHY when phylib is enabled. Limit PHY speeds to 10/100 Mbps. Cc: Michal Simek <monstr@monstr.eu> Signed-off-by: Max Filippov <jcmvbkbc@gmail.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
| * | | net/ethoc: support private memory configurationsMax Filippov2016-08-15-5/+41
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The ethoc device can be configured to have a private memory region instead of having access to the main memory. In that case egress packets must be copied into that memory for transmission and pointers to that memory need to be passed to net_process_received_packet or returned from the recv callback. Signed-off-by: Max Filippov <jcmvbkbc@gmail.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
| * | | net/ethoc: don't mix virtual and physical addressesMax Filippov2016-08-15-10/+13
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Addresses used in buffer descriptors and passed in platform data or device tree are physical. Addresses used by CPU to access packet data and registers are virtual. Don't mix these addresses and use virt_to_phys for translation. Signed-off-by: Max Filippov <jcmvbkbc@gmail.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
| * | | net/ethoc: support device treeMax Filippov2016-08-15-0/+15
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add .of_match table and .ofdata_to_platdata callback to allow for ethoc device configuration from the device tree. Signed-off-by: Max Filippov <jcmvbkbc@gmail.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
| * | | net/ethoc: add CONFIG_DM_ETH supportMax Filippov2016-08-15-47/+174
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Extract reusable parts from ethoc_init, ethoc_set_mac_address, ethoc_send and ethoc_receive, move the rest under #ifdef CONFIG_DM_ETH. Add U_BOOT_DRIVER, eth_ops structure and implement required methods. Signed-off-by: Max Filippov <jcmvbkbc@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
| * | | net/ethoc: use priv instead of dev internallyMax Filippov2016-08-15-55/+56
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Don't use physical base address of registers directly, ioremap it first. Save pointer in private struct ethoc and use that struct in all internal functions. Signed-off-by: Max Filippov <jcmvbkbc@gmail.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
| * | | net/ethoc: add Kconfig entry for the driverMax Filippov2016-08-15-0/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add Kconfig entry for the driver, remove #define CONFIG_ETHOC from the only board configuration that uses it and put it into that board's defconfig. Cc: Stefan Kristiansson <stefan.kristiansson@saunalahti.fi> Signed-off-by: Max Filippov <jcmvbkbc@gmail.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
| * | | net: e1000: Fix the build with driver model and SPI EEPROMAlban Bedel2016-08-15-30/+35
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | When adding support for the driver model the SPI EEPROM feature had been ignored. Fix the build with both CONFIG_DM_ETH and CONFIG_E1000_SPI enabled. Signed-off-by: Alban Bedel <alban.bedel@avionic-design.de> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
| * | | net: smsc95xx: Use correct get_unaligned functionsChris Packham2016-08-15-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The __get_unaligned_le* functions may not be declared on all platforms. Instead, get_unaligned_le* should be used. On many platforms both of these are the same function. Signed-off-by: Chris Packham <judge.packham@gmail.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
| * | | net: macb: Fix build error for CONFIG_DM_ETH enabledWenyou Yang2016-08-15-8/+69
| |/ / | | | | | | | | | | | | | | | | | | | | | Use the right phy_connect() prototype for CONFIGF_DM_ETH. Support to get the phy interface from dt and set GMAC_UR. Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
* | | i2c: tegra: add standardized clk/reset API supportBryan Wu2016-08-15-4/+85
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | clk/reset API was tested on T186 platform and previous chip like T210/T124 will still use the old APIs. Signed-off-by: Bryan Wu <pengw@nvidia.com> (swarren, simplified some ifdefs, removed indent level inside an ifdef) (swarren, added comment about the ifdefs) Signed-off-by: Stephen Warren <swarren@nvidia.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Heiko Schocher <hs@denx.de> Signed-off-by: Tom Warren <twarren@nvidia.com>
* | | pci: tegra: port to standard clock/reset/pwr domain APIsStephen Warren2016-08-15-5/+159
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Tegra186 supports the new standard clock, reset, and power domain APIs. Older Tegra SoCs still use custom APIs. Enhance the Tegra PCIe driver so that it can operate with either set of APIs. On Tegra186, the BPMP handles all aspects of PCIe PHY (UPHY) programming. Consequently, this logic is disabled too. Signed-off-by: Stephen Warren <swarren@nvidia.com> Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com>
* | | mmc: tegra: port to standard clock/reset APIsStephen Warren2016-08-15-9/+55
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Tegra186 supports the new standard clock and reset APIs. Older Tegra SoCs still use custom APIs. Enhance the Tegra MMC driver so that it can operate with either set of APIs. Signed-off-by: Stephen Warren <swarren@nvidia.com> Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com>
* | | i2c: add Tegra186 BPMP driverStephen Warren2016-08-15-0/+140
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | On Tegra186, some I2C controllers are directly controlled by the main CPU, whereas others are controlled by the BPMP, and can only be accessed by the main CPU via IPC requests to the BPMP. This driver covers the latter case. Signed-off-by: Stephen Warren <swarren@nvidia.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Heiko Schocher <hs@denx.de> Signed-off-by: Tom Warren <twarren@nvidia.com>
* | | power domain: add Tegra186 driverStephen Warren2016-08-15-0/+100
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | In Tegra186, SoC power domains are manipulated using IPC requests to the BPMP (Boot and Power Management Processor). This change implements a driver that does that. Signed-off-by: Stephen Warren <swarren@nvidia.com> Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com>
* | | reset: add Tegra186 reset driverStephen Warren2016-08-15-0/+89
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | In Tegra186, on-SoC reset signals are manipulated using IPC requests to the BPMP (Boot and Power Management Processor). This change implements a driver that does that. It is unconditionally selected by CONFIG_TEGRA186 since virtually any Tegra186 build of U-Boot will need the feature. Signed-off-by: Stephen Warren <swarren@nvidia.com> Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com>
* | | clock: add Tegra186 clock driverStephen Warren2016-08-15-0/+118
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | In Tegra186, on-SoC clocks are manipulated using IPC requests to the BPMP (Boot and Power Management Processor). This change implements a driver that does that. A tegra/ sub-directory is created to follow the existing pattern. It is unconditionally selected by CONFIG_TEGRA186 since virtually any Tegra186 build of U-Boot will need the feature. Signed-off-by: Stephen Warren <swarren@nvidia.com> Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com>
* | | misc: add Tegra BPMP driverStephen Warren2016-08-15-0/+270
|/ / | | | | | | | | | | | | | | | | | | | | | | | | | | | | The Tegra BPMP (Boot and Power Management Processor) is a separate auxiliary CPU embedded into Tegra to perform power management work, and controls related features such as clocks, resets, power domains, PMIC I2C bus, etc. This driver provides the core low-level communication path by which feature-specific drivers (such as clock) can make requests to the BPMP. This driver is similar to an MFD driver in the Linux kernel. It is unconditionally selected by CONFIG_TEGRA186 since virtually any Tegra186 build of U-Boot will need the feature. Signed-off-by: Stephen Warren <swarren@nvidia.com> Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com>
* | Merge git://git.denx.de/u-boot-dmTom Rini2016-08-12-11/+25
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| * | misc: add "call" uclass opStephen Warren2016-08-12-0/+11
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The call op requests that the callee pass a message to the underlying HW or device, wait for a response, and then pass back the response error code and message to the callee. It is useful for drivers that represent some kind of messaging or IPC channel to a remote device. Signed-off-by: Stephen Warren <swarren@nvidia.com> Acked-by: Simon Glass <sjg@chromium.org>
| * | power: pmic: act8846: add missing newline to debug statementsJohn Keeping2016-08-12-2/+2
| | | | | | | | | | | | | | | Signed-off-by: John Keeping <john@metanate.com> Acked-by: Simon Glass <sjg@chromium.org>
| * | power: regulator: act8846: fix reading valuesJohn Keeping2016-08-12-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | The voltage and control registers need to be looked up from the value in driver_data. Adjust the get_value and get_enable functions to match the corresponding set_* functions. Signed-off-by: John Keeping <john@metanate.com> Acked-by: Simon Glass <sjg@chromium.org>
| * | fdt: allow fdtdec_get_addr_size_*() to translate addressesStephen Warren2016-08-12-7/+10
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Some code may want to read reg values from DT, but from nodes that aren't associated with DM devices, so using dev_get_addr_index() isn't appropriate. In this case, fdtdec_get_addr_size_*() are the functions to use. However, "translation" (via the chain of ranges properties in parent nodes) may still be desirable. Add a function parameter to request that, and implement it. Update all call sites to default to the original behaviour. Signed-off-by: Stephen Warren <swarren@nvidia.com> Reviewed-by: Simon Glass <sjg@chromium.org> Squashed in build fix from Stephen: Signed-off-by: Simon Glass <sjg@chromium.org>
* | | kconfig: use bool instead of boolean for type definition attributesMasahiro Yamada2016-08-12-9/+9
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Linux stopped the use of keyword 'boolean' in Kconfig. Refer to commit 6341e62b212a2541efb0160c470e90bd226d5496 ("kconfig: use bool instead of boolean for type definition attributes") in Linux Kernel. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
* | | drivers: net: cpsw: always flush cache of size aligned to PKTALIGNLokesh Vutla2016-08-12-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | cpsw tries to flush dcache which is not in the range of PKTALIGN. Because of this the following warning comes while flushing: CACHE: Misaligned operation at range [dffecec0, dffed016] Fix it by flushing cache of size aligned to PKTALIGN. Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
* | | drivers/sysreset: group sysreset driversMax Filippov2016-08-12-12/+212
| | | | | | | | | | | | | | | | | | | | | | | | Create drivers/sysreset and move sysreset-uclass and all sysreset drivers there. Signed-off-by: Max Filippov <jcmvbkbc@gmail.com> Acked-by: Simon Glass <sjg@chromium.org>
* | | i2c: Drop redundant platform data setting in driversSimon Glass2016-08-12-6/+0
|/ / | | | | | | | | | | | | | | | | The i2c uclass has a default setting for per_child_platdata_auto_alloc_size so drivers do not need to set it. Remove this from drivers to avoid confusion. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
* | Merge branch 'master' of git://git.denx.de/u-boot-usbTom Rini2016-08-11-107/+879
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| * | eth: asix88179: Add support for the driver modelAlban Bedel2016-08-09-0/+184
| | | | | | | | | | | | | | | | | | Adjust this driver to support driver model for Ethernet. Signed-off-by: Alban Bedel <alban.bedel@avionic-design.de>
| * | eth: asix88179: Prepare supporting the driver modelAlban Bedel2016-08-09-28/+47
| | | | | | | | | | | | | | | | | | | | | Change the prototype of a few functions to allow resuing the code for the driver model. Signed-off-by: Alban Bedel <alban.bedel@avionic-design.de>
| * | eth: asix88179: Fix receiving on big endian systemAlban Bedel2016-08-07-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | In asix_recv() the call to convert the endianess of the receive header was applied on the wrong variable. Instead of converting rx_hdr it converted pkt_hdr which is a pointer, and not yet initialiazed at this point. Signed-off-by: Alban Bedel <alban.bedel@avionic-design.de>
| * | eth: asix88179: Add VID:DID for Cypress GX3 USB Ethernet AdapterAlban Bedel2016-08-07-0/+2
| | | | | | | | | | | | | | | | | | | | | Added support for the Cypress GX3 SuperSpeed to Gigabit Ethernet Bridge Controller (VID_04b4/PID_3610). Signed-off-by: Alban Bedel <alban.bedel@avionic-design.de>
| * | usb: xhci: fsl: Add code to use CONFIG_DM_USBRajesh Bhagat2016-08-07-1/+82
| | | | | | | | | | | | | | | | | | Adds code to use driver model for USB XHCI FSL driver Signed-off-by: Rajesh Bhagat <rajesh.bhagat@nxp.com>
| * | usb: ehci: fsl: Add code to use CONFIG_DM_USBRajesh Bhagat2016-08-07-4/+127
| | | | | | | | | | | | | | | | | | Adds code to use driver model for USB EHCI FSL driver Signed-off-by: Rajesh Bhagat <rajesh.bhagat@nxp.com>
| * | drivers: usb: fsl: Make function for initialization to use in CONFIG_DM_USBRajesh Bhagat2016-08-07-27/+36
| | | | | | | | | | | | | | | | | | | | | Moves code from ehci_hcd_init to new function ehci_fsl_init which can be re-used in CONFIG_DM_USB. Signed-off-by: Rajesh Bhagat <rajesh.bhagat@nxp.com>
| * | usb: add (move) CONFIG_USB_HOST to KconfigMasahiro Yamada2016-08-07-0/+7
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The meaning of CONFIG_USB in U-Boot is different from that in Linux. As you see in drivers/usb/Kconfig of Linux, CONFIG_USB enables the USB host controller support, while CONFIG_USB_SUPPORT is used to enable the whole of the USB sub-system. When I added CONFIG_USB into Kconfig by commit 6e7e9294d321 ("usb: add basic USB configs in Kconfig"), I planned to follow the Linux's convention, i.e. CONFIG_USB to enable/disable the USB host support. Then, commit 68f7c5db2d1e ("usb: Generic USB Kconfig option, that fits both host and gadget and comments") changed the logic of the CONFIG_USB to point to the whole of the USB sub-system. As a result, currently we do not have an option for USB host. This commit adds CONFIG_USB_HOST, which will be useful to compile in the USB host support code. CONFIG_USB_HOST is not referenced at all, but strangely some boards define it in board headers. I removed them because USB_HOST will be selected in Kconfig going forward. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
| * | usb: add CONFIG_USB_UHCI_HCD in KconfigMasahiro Yamada2016-08-07-0/+17
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | There is no UHCI driver entry in Kconfig for now, but we have some UHCI drivers, for example, LEON. This is a placeholder in case we want to move them to Kconfig in the future. The help message was copied from Linux. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
| * | usb: add CONFIG_USB_OHCI_HCD in KconfigMasahiro Yamada2016-08-07-10/+25
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add this option as a common config for all OHCI controllers. Its help message was copied from Linux. Also, I moved it below EHCI to respect the order in Linux's Kconfig. Add CONFIG_USB_OHCI_HCD=y to axs103_defconfig, which is the only user of OHCI_GENERIC. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
| * | net: usb: r8152: Add DM supportStefan Roese2016-08-07-22/+221
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add support for driver model, so that CONFIG_DM_ETH can be defined and used with this driver. This patch also adds the read_rom_hwaddr() callback so that the ROM MAC address will be used to the DM part of this driver. Signed-off-by: Stefan Roese <sr@denx.de> Cc: Stephen Warren <swarren@nvidia.com> Cc: Ted Chen <tedchen@realtek.com> Reviewed-by: Simon Glass <sjg@chromium.org> Cc: Joe Hershberger <joe.hershberger@ni.com>
| * | dm: ehci-mx6: support driver modelPeng Fan2016-08-07-14/+130
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Support driver model for ehci mx6 driver. Consolidate code to be shared between DM and non-DM, such as introducing ehci_mx6_common_init. For simplicity, some old fasion code are keeped for DM usage, such as board_ehci_power and board_usb_phy_mode. And 'dr-mode', usbphy and vbus handling code for DM is not added now. These will be added in future patches. Signed-off-by: Peng Fan <peng.fan@nxp.com> Cc: Marek Vasut <marex@denx.de> Cc: Mateusz Kulikowski <mateusz.kulikowski@gmail.com> Cc: Stefan Agner <stefan@agner.ch> Cc: Simon Glass <sjg@chromium.org>
* | | i2c: i2c-uclass-compat: avoid any BSS usageVignesh R2016-08-08-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | As I2C can be used before DRAM initialization for reading EEPROM, avoid using static variables stored in BSS, since BSS is in DRAM, which may not have been initialised yet. Explicitly mark "static global" variables as belonging to the .data section. Signed-off-by: Vignesh R <vigneshr@ti.com> Acked-by: Heiko Schocher<hs@denx.de> Reviewed-by: Simon Glass <sjg@chromium.org>
* | | drivers: net: keystone_net: add support for multi slave ethernetMugunthan V N2016-08-08-45/+177
| | | | | | | | | | | | | | | | | | | | | | | | | | | Keystone net can have multiple ethernet slaves, currently only slave 1 is supported by the driver. Register multiple slaves as individual ethernets to network framework. Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com> Reviewed-by: Tom Rini <trini@konsulko.com>
* | | drivers: net: keystone_net: fix line termination with semi-colonMugunthan V N2016-08-08-3/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | Each line should be terminated by semi-colon. It was not caught earlier as there is a proper statement. Fix it by changing the comma with semi-colon. Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com> Reviewed-by: Tom Rini <trini@konsulko.com>
* | | net: cpsw: Add support to drive gpios for ethernet to be functionalVignesh R2016-08-08-0/+12
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | On DRA72 EVM, cpsw slaves may be muxed with other modules. This selection is controlled by a pcf gpio line. Add support for cpsw driver to acquire mode-gpios and select the appropriate slave using gpio APIs. Signed-off-by: Vignesh R <vigneshr@ti.com> Reviewed-by: Tom Rini <trini@konsulko.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com> Reviewed-by: Mugunthan V N <mugunthanvnm@ti.com>
* | | gpio: Add driver for TI PCF8575 I2C GPIO expanderVignesh R2016-08-08-0/+188
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | TI's PCF8575 is a 16-bit I2C GPIO expander.The device features a 16-bit quasi-bidirectional I/O ports. Each quasi-bidirectional I/O can be used as an input or output without the use of a data-direction control signal. The I/Os should be high before being used as inputs. Read the device documentation for more details[1]. This driver is based on pcf857x driver available in Linux v4.7 kernel. It supports basic reading and writing of gpio pins. [1] http://www.ti.com/lit/ds/symlink/pcf8575.pdf Signed-off-by: Vignesh R <vigneshr@ti.com> Reviewed-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Mugunthan V N <mugunthanvnm@ti.com>
* | | spi: cadence_qspi_apb: Ensure baudrate doesn't exceed max valueChin Liang See2016-08-07-2/+5
|/ / | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Ensuring the baudrate divisor value doesn't exceed the max value in the calculation.It will be capped at max value to ensure the correct value being written into the register. Example of the existing bug is when calculated div = 16. After and with the mask, the value written to register is actually 0 (register field for baudrate divisor). With this fix, the value written is now 15 which is max value for baudrate divisor. Signed-off-by: Chin Liang See <clsee@altera.com> Cc: Marek Vasut <marex@denx.de> Cc: Jagan Teki <jteki@openedev.com> Cc: Dinh Nguyen <dinguyen@altera.com>
* | Merge git://git.denx.de/u-boot-rockchipTom Rini2016-08-06-16/+848
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| * | rockchip: remove log2 reimplementation from clock driversHeiko Stübner2016-08-05-14/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | The already available ilog2 function does exactly the same in the common case than the log2 function the current clock-driver reimplement. So, simply move to that one. Signed-off-by: Heiko Stuebner <heiko@sntech.de> Acked-by: Simon Glass <sjg@chromium.org>
| * | clock: rk3399: add support for dwmmc 400KKever Yang2016-08-05-8/+21
| | | | | | | | | | | | | | | | | | | | | | | | | | | MMC core will use 400KHz for card initialize first and then switch to higher frequency like 50MHz, we need to support both 400KHz and about 50MHz for dwmmc controller. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Acked-by: Simon Glass <sjg@chromium.org>
| * | move: rockchip: move clock drivers into a subdirectoryHeiko Stübner2016-08-05-3/+10
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | With the number of Rockchip clock drivers increasing, don't clutter up the core drivers/clk directory with them and instead move them out of the way into a separate subdirectory. Suggested-by: Simon Glass <sjg@chromium.org> Signed-off-by: Heiko Stuebner <heiko@sntech.de> Acked-by: Simon Glass <sjg@chromium.org> Updated for rk3399: Signed-off-by: Simon Glass <sjg@chromium.org>
generated by cgit v1.1 at 2024-08-22 05:19:41 +0000