| Commit message (Collapse) | Author | Age | Lines |
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There is a hole in shadow registers address map of size 0x100
between bank 5 and bank 6 on iMX6QP, iMX6DQ, iMX6SDL, iMX6SX and iMX6UL.
Bank 5 ends at 0x6F0 and Bank 6 starts at 0x800. When reading the fuses,
we should account for this hole in address space.
Similar hole exists between bank 14 and bank 15 of size
0x80 on iMX6QP, iMX6DQ, iMX6SDL and iMX6SX.
Note: iMX6SL has only 0-7 banks and there is no hole.
Note: iMX6UL doesn't have this one.
When reading, we use register offset, so need to account for holes
to get the correct address.
When writing, we use bank/word index, there is no need to account
for holes, always use bank/word index from fuse map.
Signed-off-by: Nitin Garg <nitin.garg@freescale.com>
Signed-off-by: Peng Fan <Peng.Fan@freescale.com>
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Set wdog WCR register SRS bit to turn off internal reset signal WDOG_RESET_B_DEB
for mx7d. So that the warm reset is disabled.
Signed-off-by: Ye.Li <B37916@freescale.com>
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The iomuxc structure has changed to add 0x4000 offset for i.MX6SX and UL,
so when using this structure to access gpr registers needs to change
the base address to IOMUXC_BASE_ADDR.
Signed-off-by: Ye.Li <B37916@freescale.com>
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Add maximum ecc strength for each platfrom to avoid the calculated ecc
exceed the limitation.
Signed-off-by: Han Xu <b45815@freescale.com>
(cherry picked from commit fdc5bac6ae8b699924c4e84b86e38aa73f694827)
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This patch adds enable/disable hooks support for ldb_di[0/1] clocks
and enables/disables them when necessary.
Signed-off-by: Liu Ying <Ying.Liu@freescale.com>
(cherry picked from commit 839a1da941be48baf27c9cb28939cc6b2030424a)
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The LDB is found in MX6 variants and MX53, so this patch makes the ldb_di clock
relevant code be built only for them.
Signed-off-by: Liu Ying <Ying.Liu@freescale.com>
(cherry picked from commit c0dc175a9780505ec8939bda5dda9c2ec549a7f0)
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From IC guys:
"
After a thorough accuracy study of the Temp sense circuit,
we found that with our current equation, an average part can
read 7 degrees lower than a known forced temperature.
We also found out that the standard variance was around 2C;
which is the tightest distribution that we could create.
We need to change the temp sense equation to center the average
part around the target temperature.
Old Equation:
Temp = Troom,cal – slope*(Count measured – Count room fuse)
Where
Troom,cal = 25C and
Slope = 0.4297157 – (0.0015974 * Count room fuse)
New Equation:
Temp = Troom,cal – slope*(Count measured – Count room fuse) +offset
Where
Troom,cal = 25C and
Slope = 0.4445388 – (0.0016549 * Count room fuse)
Offset = 3.580661
"
According the new equation, update the thermal driver.
c1 and c2 changed to u64 type and update comments.
Signed-off-by: Peng Fan <Peng.Fan@freescale.com>
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register
Add platform check to avoid to access the reserved register
Signed-off-by: Fugang Duan <B38611@freescale.com>
Signed-off-by: Peng Fan <Peng.Fan@freescale.com>
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i.MX6UL qspi controller also needs at least 16 bytes when writing.
Signed-off-by: Peng Fan <Peng.Fan@freescale.com>
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comment out GPIO6/7 for MX6UL
Signed-off-by: Peng Fan <Peng.Fan@freescale.com>
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I2C4 support for i.MX
Signed-off-by: Peng Fan <Peng.Fan@freescale.com>
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The minimal hold time according to IEE802.3 (clause 22) is 10 ns.
HOLDTIME + 1 is the number of clk cycles the fec is holding the output.
Set the right hold time value when the MDC root clock is greater than
100Mhz.
The issue was reported on i.MX28 and is fixed by Uwe Kleine-König in kernel:
https://git.kernel.org/cgit/linux/kernel/git/next/linux-next.git/commit/
drivers/net/ethernet/freescale/fec_main.c?id=63c607321492c5efc7a31bc4ea734b877f8e7f87
Signed-off-by: Fugang Duan <B38611@freescale.com>
(cherry picked from commit 0373a160e7f698064a6625e85f9120b6c81c1b61)
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Update pcie code to align with imx_v2014.04. Mainly add DEBUG
related stuff.
Signed-off-by: Peng Fan <Peng.Fan@freescale.com>
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The string display on second line repeats the last word of
first line and does not show full.
This is the bug introduced by the fixing to MLK-10542.
Signed-off-by: Ye.Li <B37916@freescale.com>
(cherry picked from commit ac430cee8c42f0acad9e126631d772b99f1166ea)
(cherry picked from commit ff62c5b275a9b5e47d570d3eb10622799bf12070)
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The caculation of left space for version string is not correct, should
use VIDEO_COLS not VIDEO_LINE_LEN / 2, otherwise we will get larger space
than actual have and cause string to overlay logo picture.
Also current version string display only supports two lines words at max.
This also causes overlay when the LCD pixel colume size is not enough.
Signed-off-by: Ye.Li <B37916@freescale.com>
(cherry picked from commit ed53487d36a886fb4557088804a4b5232b168889)
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Fix reading temperature.
Signed-off-by: Peng Fan <Peng.Fan@freescale.com>
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Change to load EPDC waveform from FAT partition and allocate waveform
buffer, framebuffer and working buffer in dynamic manner not static.
So many EPDC configurations are removed.
To enable the EPDC feature, must define CONFIG_MXC_EPDC and CONFIG_SPLASH_SCREEN.
Signed-off-by: Ye.Li <B37916@freescale.com>
(cherry picked from commit 4d55a4124be3a3a6288c3c845d17fd9d4f2b8b43)
Conflicts:
include/configs/mx6slevk.h
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This patch is to add atmel AT45DB021E spi flash support.
Since this flash is different from the spi flash that we previous use such
as m25p32 and spanion spi nor flashes, pieces of code are added.
1.
The default page size is 264 bytes, but the mtd/spi framework can not
handle such page. So we need to configure the page size from 264 to 256 bytes.
Page Size command seq
“Power of 2” binary page size (256 bytes)| 3Dh 2Ah 80h A6h
DataFlash page size (264 bytes) | 3Dh 2Ah 80h A7h
And when probe the flash, configure the flash to 256 bytes page size, if
the page size is already 256bytes, just return and do not configure it again.
The page size configuration times is only about 10000, so to avoid configuring
it each time.
2.
Add the flash params in sf_params.c.
3.
This flash support 2K block erase, add this flag.
4.
The status command is 0xD7, different from others. It's polling status
bit is Bit 7
-> 0 Device is busy with an internal operation.
-> 1 Device is ready.
This patch has been tested on mx7d 19x19 ddr3 arm2 board. And tested
on mx7d 12x12 lpddr3 board. All works fine.
Note:
Since this flash is only 256KB, we can not test spi boot on mx7d 19x19 arm2
board. If want to test this flash, open CONFIG_SYS_USE_SPINOR.
Signed-off-by: Peng Fan <Peng.Fan@freescale.com>
(cherry picked from commit 9b6ac1f82b09d243dc674c780abcacf0e12262c2)
Conflicts:
drivers/mtd/spi/sf_internal.h
drivers/mtd/spi/sf_params.c
drivers/mtd/spi/sf_probe.c
include/spi_flash.h
Signed-off-by: Peng Fan <Peng.Fan@freescale.com>
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This commit ca4113da25b42bce44a2e7998966a47352f11613
"mmc: fix OCR Polling"
does not consider cmd structure, and may leave it in uninitialized state.
We can directly use op_cond_response here, since until here,
op_cond_response already get the OCR value from chip.
Signed-off-by: Peng Fan <Peng.Fan@freescale.com>
Suggested-by: Ye.Li <B37916@freescale.com>
(cherry picked from commit a033d2d43904f27778ee6a44f3e35494f9f72152)
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Need to check value of spi_setup_slave and spi_setup_slave_fdt.
If their return value 'bus' is NULL, there is no need to pass it
to following spi_flash_probe_tail.
If 'bus' is null, the original function flow is as following:
spi_flash_probe
|->spi_setup_slave
|->spi_probe_bus_tail
|->spi_flash_probe_slave
|->spi_free_slave
Alougth check the pointer in spi_free_slave is ok, checking the return value
of spi_setup_slave and spi_setup_slave_fdt is better.
Before this fix:
"
=> sf probe 0:2
FSL_QSPI: Not a valid cs !
SF: Failed to set up slave
data abort
pc : [<fff66dcc>] lr : [<fff7628c>]
reloc pc : [<87814dcc>] lr : [<8782428c>]
sp : fdf4fcf0 ip : e630396c fp : fe0d0888
r10: fffa2538 r9 : fdf4feb8 r8 : 02625a00
r7 : 00000002 r6 : fff94ec0 r5 : 00000000 r4 : 9355553c
r3 : 1af0593c r2 : cb3fe030 r1 : fff94eb8 r0 : e59ff018
Flags: nZCv IRQs off FIQs off Mode SVC_32
Resetting CPU ...
"
After this fix:
"
=> sf probe 0:2
FSL_QSPI: Not a valid cs !
Failed to initialize SPI flash at 0:2
"
No data abort using this patch.
Signed-off-by: Peng Fan <Peng.Fan@freescale.com>
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Upgrade to upstream way, using power_init_board.
Add pfuze300 support.
Signed-off-by: Peng Fan <Peng.Fan@freescale.com>
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If in mmc_send_op_cond, OCR_BUSY is set in CMD1's response, then
state is transfered to Ready state, and there is no need to send
CMD1 again. Otherwise following CMD1 will recieve no response, or
timeour error from driver such as fsl_esdhc.c.
If not into Ready state in previous CMD1, then continue CMD1 command.
In mmc_complete_op_cond, we use the value mmc->op_cond_response
from mmc_send_op_cond, since there should be no CMD1 command between
mmc_send_op_cond and mmc_complete_op_cond
Before fixing this, uboot log shows:
"
CMD_SEND:0
ARG 0x00000000
MMC_RSP_NONE
CMD_SEND:8
ARG 0x000001AA
MMC_RSP_R1,5,6,7 0x18EC1504
CMD_SEND:55
ARG 0x00000000
MMC_RSP_R1,5,6,7 0x18EC1504
CMD_SEND:0
ARG 0x00000000
MMC_RSP_NONE
CMD_SEND:1
ARG 0x00000000
MMC_RSP_R3,4 0x00FF8080
CMD_SEND:1
ARG 0x40300000
MMC_RSP_R3,4 0xC0FF8080 --> Already OCR_BUSY set
CMD_SEND:1
ARG 0x40300000
MMC_RSP_R3,4 0x0096850A --> Failed CMD1
MMC init failed
"
Using this patch, this issue is fixed, emmc can be detected correctly.
This issue exists on mx7dsabresd and mx7d_12x12_lpddr3_arm2 board.
Upstream Patchwork:
https://patchwork.ozlabs.org/patch/451775/
Signed-off-by: Peng Fan <Peng.Fan@freescale.com>
(cherry picked from commit ca4113da25b42bce44a2e7998966a47352f11613)
Signed-off-by: Peng Fan <Peng.Fan@freescale.com>
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Update GPMI NAND driver and BCH head file with definitions for CONFIG_MX7
Signed-off-by: Ye.Li <B37916@freescale.com>
(cherry picked from commit 9c50677dac30085742ef216b9f2e19308e123d2b)
Signed-off-by: Peng Fan <Peng.Fan@freescale.com>
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Update APBH-DMA driver and head files with definitions for CONFIG_MX7
Signed-off-by: Ye.Li <B37916@freescale.com>
(cherry picked from commit 07299056426f1f25aab51ab5531c4846d4c7560f)
Signed-off-by: Peng Fan <Peng.Fan@freescale.com>
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When booting in eMMC fast boot, the uboot v2013.04 always hangs.
The root cause is that MMC host does not exit from boot mode after
bootrom loading image. So the first command 'CMD0' sent
in uboot will pull down the CMD line to low and cause errors.
This patch cleans the MMC boot register in "mmc_init" to put the
MMC host back to normal mode.
Signed-off-by: Ye Li <b37916@freescale.com>
Signed-off-by: Nitin Garg <nitin.garg@freescale.com>
(cherry picked from commit 2ead2f9501c6d2571e0f5365bd808ed7c73257ef)
Signed-off-by: Peng Fan <Peng.Fan@freescale.com>
Conflicts:
drivers/mmc/fsl_esdhc.c
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Update driver codes and registers define for MX7. Implement udc callback
function in MX7 arch.
Signed-off-by: Ye.Li <B37916@freescale.com>
(cherry picked from commit e55c4f7bf5a66b34c2d01c42bac667cb3789b0c1)
Signed-off-by: Peng Fan <Peng.Fan@freescale.com>
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Add udc and fastboot support
We did not use the upstream way.
Currently use CI_UDC and USB_GAGDET of upstream can make fastboot work,
but lack of flash operation, so we still use our way.
Signed-off-by: Peng Fan <Peng.Fan@freescale.com>
Signed-off-by: Nitin Garg <nitin.garg@freescale.com>
Signed-off-by: Ye.Li <B37916@freescale.com>
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Add thermal driver for mx7
Signed-off-by: Peng Fan <Peng.Fan@freescale.com>
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Change macro name to make driver support more platforms.
Signed-off-by: Peng Fan <Peng.Fan@freescale.com>
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This patch is from commit c83c6cc7dedf9759bf193044ff5c3572d5f6afd2
Signed-off-by: Peng Fan <Peng.Fan@freescale.com>
Signed-off-by: Ye.Li <B37916@freescale.com>
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EPDC board contain a elan touch screen, this screen is a i2c
slave. If this EPDC board connect to i.MX6SL-EVK board, after
uboot boot up, if we do i2c operation, like i2c probe, then
the i2c bus block. This is due to the elan touch screen i2c slave.
This device needs to do some initialization opearation before its
i2c operation, otherwise this i2c device pull down the i2c clk line,
and make the i2c bus hang. This means elan needs a special flow on
i2c before its address is acked, otherwise the i2c bus will be hang.
This patch is a workaround, it add a void function which is defined
as a weak symbol in i2c driver, and it is called before every i2c
operation. In mx6slevk, this function was overwrite to execute elan
initialization. So that, for mx6slevk board, it will initialize
elan before every i2c operation, but for other boards, it just work
as before.
Signed-off-by: Haibo Chen <haibo.chen@freescale.com>
(cherry picked from commit 4c587b29c423ce61b2471ed20f31ff533d9d8a39)
Signed-off-by: Peng Fan <Peng.Fan@freescale.com>
Conflicts:
arch/arm/include/asm/arch-mx6/mx6sl_pins.h
board/freescale/mx6slevk/mx6slevk.c
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DCIMVAC is upgraded to DCCIMVAC for the individual processor
(Cortex-A7) that the DCIMVAC is executed on.
We should follow the linux dma follow. Before DMA read, first
invalidate dcache then after DMA read, invalidate dcache again.
Signed-off-by: Peng Fan <Peng.Fan@freescale.com>
(cherry picked from commit dddb52ebdc6c4919da0103a364563dbe2c100874)
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DCIMVAC is upgraded to DCCIMVAC for the individual processor
(Cortex-A7) that the DCIMVAC is executed on.
We should follow the linux dma follow. Before DMA read, first
invalidate dcache then after DMA read, invalidate dcache again.
With the DMA direction DMA_FROM_DEVICE, the dcache need be
invalidated again after the DMA completion. The reason is
that we need explicity make sure the dcache been invalidated
thus to get the DMA'ed memory correctly from the physical memory.
Any cache-line fill during the DMA operations such as the
pre-fetching can cause the DMA coherency issue, thus CPU get the stale data.
Signed-off-by: Peng Fan <Peng.Fan@freescale.com>
Signed-off-by: Ye.Li <B37916@freescale.com>
Signed-off-by: Nitin Garg <nitin.garg@freescale.com>
Signed-off-by: Jason Liu <r64343@freescale.com>
(cherry picked from commit 13cdb96bc52b3079ba91a08c1704307e5598ee59)
Conflicts:
drivers/mmc/fsl_esdhc.c
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Add mx7 in driver/watchdog/Makefile to support watchdog driver for imx7
Signed-off-by: Peng Fan <Peng.Fan@freescale.com>
(cherry picked from commit 19d698109fd136586b292430989e0f6edb723db6)
Conflicts:
drivers/watchdog/Makefile
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There are two FEC controller on MX7, and each MDIO bus can be shared
with other. So add a configuration for this case.
Signed-off-by: Peng Fan <Peng.Fan@freescale.com>
Signed-off-by: Ye.Li <B37916@freescale.com>
(cherry picked from commit d31b4fcc6175b1bc9a2cf672678da212b133af17)
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Ocotp of i.MX7D has different operation rule.
This patch is to add support for i.MX7D ocotp.
Note:
DIV_ROUND is changed to DIV_ROUND_CLOSEST
Signed-off-by: Peng Fan <Peng.Fan@freescale.com>
Signed-off-by: Ye.Li <B37916@freescale.com>
(cherry picked from commit d0c3564b6a0f430254edcd8db1f33588bbeccb08)
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Add i2c support for i.MX7D.
Signed-off-by: Peng Fan <Peng.Fan@freescale.com>
(cherry picked from commit b52cb9d40e71305b7a11b0bbc68fddd8e84e3b17)
Conflicts:
drivers/i2c/mxc_i2c.c
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Add usb driver for i.MX7D.
Signed-off-by: Ye.Li <B37916@freescale.com>
Signed-off-by: Peng Fan <Peng.Fan@freescale.com>
(cherry picked from commit c78f52798d6b7dda775d272c3ccb9899e548d3d6)
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Add CONFIG_MX7 for mxc gpio driver
Signed-off-by: Peng Fan <Peng.Fan@freescale.com>
(cherry picked from commit 6e3f8dc68f1606cbbcdb4997fc0bdf1ac8a3f3b6)
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Update the u-boot code to support NAND chips with oob size up to 744
byte.
For the NAND flash MT29F32G08CBADA, which consists of 2 planes x 1064
blocks per plane. Obviously the block number is not power-of-2. But all
MTD driver assumes the page per block and block per plane must be a
power of 2 number. So the last 40 blocks in each plane must be
truncated.
Signed-off-by: Allen Xu <b45815@freescale.com>
(cherry picked from commit 9045626dbc7798cc340f64699bc9bd35c537498a)
Signed-off-by: Peng Fan <Peng.Fan@freescale.com>
Conflicts:
include/linux/mtd/nand.h
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Let's use the i.MX common miscellaneous reset API
to reset the LCDIF block so that we may eliminate
a random hang issue at the arch_preboot_os() stage
when we disable the LCDIF. This patch also waits
for a VSYNC interrupt to guarantee the reset is
done at the VSYNC edge, which somehow makes the
LCDIF consume the display FIFO(?) and helps the
LCDIF work normally at the kernel stage.
Tested-by: Jason Liu <r64343@freescale.com>
Tested-by: Sandor Yu <R01008@freescale.com>
Tested-by: Ye.Li <B37916@freescale.com>
Tested-by: Guo Sally <b38912@freescale.com>
Signed-off-by: Liu Ying <Ying.Liu@freescale.com>
(cherry picked from commit 45fa2ad38b846596e61ce8fc477713dede8a43e7)
Signed-off-by: Peng Fan <Peng.Fan@freescale.com>
(cherry picked from commit 9d782aa487c4ffe096c94bbda5867b44afd6a440)
Signed-off-by: Peng Fan <Peng.Fan@freescale.com>
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For GPIO group which shared by multiple masters, it may set in RDC
to shared and semaphore required. Before access the GPIO register,
the GPIO driver must get the RDC semaphore, and release the semaphore
after the GPIO register access.
When CONFIG_MXC_RDC is set, the features related to RDC semaphores
is enabled in mxc_gpio driver.
Signed-off-by: Ye.Li <B37916@freescale.com>
(cherry picked from commit 84d63e2e2ce12f714e88baad8b2325684614a7c1)
Signed-off-by: Peng Fan <Peng.Fan@freescale.com>
Conflicts:
drivers/gpio/mxc_gpio.c
(cherry picked from commit c9943b9c8a78bb2c9886bfe582e82978387d8dee)
Signed-off-by: Peng Fan <Peng.Fan@freescale.com>
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Current code use the hardcoded ECC strength which is not aligned with
the kernel.
This patch use the same ECC strength as used in the kernel.
We do not support the NAND whose OOB size is larger then 512bytes.
Signed-off-by: Huang Shijie <b32955@freescale.com>
Signed-off-by: Ye.Li <B37916@freescale.com>
(cherry picked from commit 8b3db31d607be02409b1f4937d91241f48229e96)
Signed-off-by: Peng Fan <Peng.Fan@freescale.com>
Conflicts:
drivers/mtd/nand/mxs_nand.c
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Instead of waiting for DC triple buffer to be cleared, this patch changes
to wait for a relevant DP sync flow end irq when disabling sync BG flows.
In this way, we align the implement to the FSL internal IPUv3 driver.
After applying this patch, the uboot hang up issue at the arch_preboot_os
stage on the MX6DL platforms is not observed any more.
Signed-off-by: Liu Ying <Ying.Liu@freescale.com>
Signed-off-by: Nitin Garg <nitin.garg@freescale.com>
(cherry picked from commit 56d72035946c40f45d2f49ccb1520734e34ecc89)
Signed-off-by: Peng Fan <Peng.Fan@freescale.com>
(cherry picked from commit d8ac526681589c62287d014fedee4c9e64fbca66)
Signed-off-by: Peng Fan <Peng.Fan@freescale.com>
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This patch is from commit b79371410aa44972dea53d5c19d256170928dcbd
"ENGR00315499-9: ARM:iMX6SL EVK: Add keyboard support"
Since board file already added related bsp and pin settings,
this patch only add driver.
Signed-off-by: Peng Fan <Peng.Fan@freescale.com>
Signed-off-by: Nitin Garg <nitin.garg@freescale.com>
Signed-off-by: Peng Fan <Peng.Fan@freescale.com>
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Implement simple functionalities for MAX7310 GPIO input and output.
Because MAX7310 is a off-chip device and need to co-exist with
on-chip GPIO, new APIs are added specifically for expander device.
CONFIG_MAX7310_IOEXP is used to enable the MAX7310 driver. The I2C
related configurations also need to set together.
Signed-off-by: Ye.Li <B37916@freescale.com>
Signed-off-by: Nitin Garg <nitin.garg@freescale.com>
(cherry picked from commit e3b699dab2c92268799b56c28c6a8fcda4f6110b)
Signed-off-by: Peng Fan <Peng.Fan@freescale.com>
Conflicts:
drivers/gpio/Makefile
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Add EPDC splash screen feature for MX6SL EVK, and MX6DL SABRESD board.
- Currently, splash screen consists of a simple black border
around a white screen. Done this way to save in memory footprint.
- EPDC splash screen is disabled by default in the config file for MX6DL_SABRESD
and MX6SL_EVK. If left enabled, the U-Boot image will not boot correctly
(hang), since some additional content on the boot device (waveform file) is
required for EPDC splash to work correctly.
Please refer to Linux Reference Manual for how to flash WAVEFORM file.
Signed-off-by: Robby Cai <R63905@freescale.com>
Signed-off-by: Nitin Garg <nitin.garg@freescale.com>
(cherry picked from commit b8ab9b3eabb94bbbc1eea63e7c0e2a87d2d645f4)
Signed-off-by: Peng Fan <Peng.Fan@freescale.com>
Conflicts:
arch/arm/include/asm/arch-mx6/mx6sl_pins.h
board/freescale/mx6sabresd/mx6sabresd.c
board/freescale/mx6slevk/mx6slevk.c
drivers/video/Makefile
include/configs/mx6sabresd.h
include/configs/mx6slevk.h
include/lcd.h
drivers/video/Makefile
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Use freescale vendor qspi driver but not upstream qspi driver
Signed-off-by: Peng Fan <Peng.Fan@freescale.com>
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Add gis module, current gis is support vadc input.
Add power down function to lcdif driver.
Signed-off-by: Sandor Yu <R01008@freescale.com>
Signed-off-by: Ye.Li <B37916@freescale.com>
(cherry picked from commit a007b00dd8ef9f773dfdebef0b1deb0990281793)
Conflicts:
drivers/video/Makefile
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Add pxp module.
Support csc between YUV444 and RGB888 and scaling.
Signed-off-by: Sandor Yu <R01008@freescale.com>
Signed-off-by: Ye.Li <B37916@freescale.com>
(cherry picked from commit 4c6e1f9ed1b2f5c98a34502b44b6414593fdd290)
Signed-off-by: Peng Fan <Peng.Fan@freescale.com>
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