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* dfu: NAND specific routines for DFU operationPantelis Antoniou2013-04-10-0/+196
| | | | | | | | Support for NAND storage devices to work with the DFU framework. Signed-off-by: Pantelis Antoniou <panto@antoniou-consulting.com> Signed-off-by: Tom Rini <trini@ti.com> Acked-by: Scott Wood <scottwood@freescale.com>
* nand: Extend nand_(read|write)_skip_bad with *actual and limit parametersTom Rini2013-04-10-8/+60
| | | | | | | | | | | | | | | | | We make these two functions take a size_t pointer to how much space was used on NAND to read or write the buffer (when reads/writes happen) so that bad blocks can be accounted for. We also make them take an loff_t limit on how much data can be read or written. This means that we can now catch the case of when writing to a partition would exceed the partition size due to bad blocks. To do this we also need to make check_skip_len count not just complete blocks used but partial ones as well. All callers of nand_(read|write)_skip_bad are adjusted to call these with the most sensible limits available. The changes were started by Pantelis and finished by Tom. Signed-off-by: Pantelis Antoniou <panto@antoniou-consulting.com> Signed-off-by: Tom Rini <trini@ti.com>
* dfu: Support larger than memory transfers.Pantelis Antoniou2013-04-10-89/+262
| | | | | | | | | | | | | | | | | | | Previously we didn't support upload/download larger than available memory. This is pretty bad when you have to update your root filesystem for example. This patch removes that limitation (and the crashes when you transfered any file larger than 4MB) by making raw image writes be done in chunks and making file maximum size be configurable. The sequence number is a 16 bit counter; make sure we handle rollover correctly. This fixes the wrong transfers for large (> 256MB) images. Also utilize a variable to handle initialization, so that we don't rely on just the counter sent by the host. Signed-off-by: Pantelis Antoniou <panto@antoniou-consulting.com> Signed-off-by: Tom Rini <trini@ti.com>
* dfu:ext4:fix: Change ext4write command order of parametersŁukasz Majewski2013-04-08-2/+2
| | | | | | | | | | | | | | Following commit: "cmd_ext4: BREAK and correct ext4write parameter order" SHA1:0171d52c410cbaa9290b1b214e695697c835bfe5 introduced cleanup of ext4write semantics to be consistent with other filesystem's writing commands (e.g. fatwrite). This commit provides correct ext4write command generation at DFU eMMC code. Signed-off-by: Lukasz Majewski <l.majewski@samsung.com> Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
* Merge branch 'master' of git://www.denx.de/git/u-boot-cfi-flashTom Rini2013-04-04-23/+78
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| * cfi_flash: Use uintptr_t for casts from u32 to void *Stefan Roese2013-04-04-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | This fixes this build warning: Configuring for qemu_mips64 - Board: qemu-mips64, Options: SYS_BIG_ENDIAN text data bss dec hex filename 215344 13082 218720 447146 6d2aa qemu_mips64/u-boot cfi_flash.c: In function 'flash_map': cfi_flash.c:217:9: warning: cast to pointer from integer of different size [-Wint-to-pointer-cast] Signed-off-by: Stefan Roese <sr@denx.de> Cc: Tom Rini <trini@ti.com>
| * mtd: cfi_flash: Write buffer size adjustment for M29EW Numonyx devicesJagannadha Sutradharudu Teki2013-04-02-0/+23
| | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch addjusted the write buffer size for M29EW devices those are operated in 8-bit mode. The M29EW devices seem to report the CFI information wrong when it's in 8 bit mode. There's an app note from Numonyx on this issue and there's a patch in the open source as well for Linux, but it doesn't seem to be in mainline. Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com> Tested-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
| * mtd: cfi_flash: Fix CFI flash driver for 8-bit bus supportaaron.williams@caviumnetworks.com2013-04-02-23/+55
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This commit is based on that patch from aaron.williams@caviumnetworks.com with same commit title. pulled the same code changes into current u-boot tree. http://patchwork.ozlabs.org/patch/140863/ http://lists.denx.de/pipermail/u-boot/2011-April/089606.html This patch corrects the addresses used when working with Spansion/AMD FLASH chips. Addressing for 8 and 16 bits is almost identical except in the 16-bit case the LSB of the address is always 0. The confusion arose because the addresses in the datasheet for 16-bit mode are word addresses but this code assumed it was byte addresses. I have only been able to test this on our Octeon boards which use either an 8-bit or 16-bit bus. I have not tested the case where there's an 8-bit part on a 16-bit bus. This patch also adds some delays as suggested by Spansion. If a part can be both 8 and 16-bits, it forces it to work in 8-bit mode if an 8-bit bus is detected. Apart from the pulled changes, fixed few minor code cleanups and tested on 256M29EW, 512M29EW flashes. Before this fix: --------------- Bank # 1: CFI conformant flash (8 x 8) Size: 64 MB in 512 Sectors AMD Standard command set, Manufacturer ID: 0xFF, Device ID: 0xFF Erase timeout: 4096 ms, write timeout: 2 ms Buffer write timeout: 5 ms, buffer size: 1024 bytes After this fix: -------------- Bank # 1: CFI conformant flash (8 x 8) Size: 64 MB in 512 Sectors AMD Standard command set, Manufacturer ID: 0x89, Device ID: 0x7E2301 Erase timeout: 4096 ms, write timeout: 2 ms Buffer write timeout: 5 ms, buffer size: 1024 bytes Signed-off-by: Aaron Williams <aaron.williams@caviumnetworks.com> Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com> Tested-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
* | biosemu: include <asm/io.h> headerLinus Walleij2013-04-02-0/+4
| | | | | | | | | | | | | | | | | | | | | | | | This makes sure we have inline functions such as inb/outb that are used in these two files by including the arch-specific <asm/io.h> header. However the ARM version does not provide the accessors unless the config symbol __io is also defined so add that in front of the include. After this the bios emulator will compile on ARM systems. Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* | Consolidate bool typeYork Sun2013-04-01-651/+595
|/ | | | | | | | | | | | | 'bool' is defined in random places. This patch consolidates them into a single header file include/linux/types.h, using stdbool.h introduced in C99. All other #define, typedef and enum are removed. They are all consistent with true = 1, false = 0. Replace FALSE, False with false. Replace TRUE, True with true. Skip *.py, *.php, lib/* files. Signed-off-by: York Sun <yorksun@freescale.com>
* video: bcm2835: fix build issuesAnatolij Gustschin2013-03-29-11/+0
| | | | | | | | | After merging LCD patches for v2013.04 the bcm2835 video driver building is broken due to removal of many global variables. Fix the driver. Signed-off-by: Anatolij Gustschin <agust@denx.de> Cc: Stephen Warren <swarren@wwwdotorg.org>
* Merge branch 'for-v2013.04'Anatolij Gustschin2013-03-29-185/+1186
|\ | | | | | | | | | | | | Conflicts: drivers/video/Makefile Signed-off-by: Anatolij Gustschin <agust@denx.de>
| * video: Fix splash screen alignmentMatthias Weisser2013-03-21-7/+7
| | | | | | | | | | | | | | | | | | | | commit d484b52 "video: Skip bitmaps which do not fit into the screen in cfb_console" breaks splash screen alignment which is passed in as magic (BMP_ALIGN_CENTER) x/y coordinates. Moving the check after the alignment block fixes this. Signed-off-by: Matthias Weisser <weisserm@arcor.de> Acked-by: Simon Glass <sjg@chromium.org>
| * lcd, fb: remove duplicated prototypes and unused codeJeroen Hofstee2013-03-21-73/+0
| | | | | | | | | | | | | | | | | | cc: Anatolij Gustschin <agust@denx.de> cc: Cliff Brake <cliff.brake@gmail.com> cc: John Zhan <zhanz@sinovee.com> cc: Marek Vasut <marek.vasut@gmail.com> cc: Wolfgang Denk <wd@denx.de> Signed-off-by: Jeroen Hofstee <jeroen@myspectrum.nl>
| * common/lcd.c: remove global lcd_baseJeroen Hofstee2013-03-21-26/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | lcd_base is available as gd->fb_base as well, there is no need to keep a seperate copy. For completeness the ack of Bo Shen is for the atmel part. Cc: Alessandro Rubini <rubini@unipv.it> Cc: Anatolij Gustschin <agust@denx.de> Cc: Bo Shen <voice.shen@atmel.com> Cc: Haavard Skinnemoen <haavard.skinnemoen@atmel.com> Cc: Kyungmin Park <kyungmin.park@samsung.com> Cc: Marek Vasut <marek.vasut@gmail.com> Cc: Minkyu Kang <mk7.kang@samsung.com> Cc: Nikita Kiryanov <nikita@compulab.co.il> Cc: Simon Glass <sjg@chromium.org> Cc: Stelian Pop <stelian@popies.net> Cc: Tom Warren <twarren@nvidia.com> Acked-by: Bo Shen <voice.shen@atmel.com> Signed-off-by: Jeroen Hofstee <jeroen@myspectrum.nl> [agust: also fix cm_t35 board while rebasing] Signed-off-by: Anatolij Gustschin <agust@denx.de>
| * common/lcd.c: cleanup use of global variablesJeroen Hofstee2013-03-21-36/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | console_col, console_row, lcd_line_length, lcd_console_address had to be declared in board / driver specific code, but were not actually used there on many boards. Get rid of the global variables. for completeness, the ack of Bo Shen is for the atmel part Cc: Alessandro Rubini <rubini@unipv.it> Cc: Anatolij Gustschin <agust@denx.de> Cc: Bo Shen <voice.shen@atmel.com> Cc: Kyungmin Park <kyungmin.park@samsung.com> Cc: Marek Vasut <marek.vasut@gmail.com> Cc: Minkyu Kang <mk7.kang@samsung.com> Cc: Nikita Kiryanov <nikita@compulab.co.il> Cc: Simon Glass <sjg@chromium.org> Cc: Stelian Pop <stelian@popies.net> Cc: Tom Warren <twarren@nvidia.com> Acked-by: Bo Shen <voice.shen@atmel.com> Signed-off-by: Jeroen Hofstee <jeroen@myspectrum.nl> [agust: rebased and fixed cm_t35 board] Signed-off-by: Anatolij Gustschin <agust@denx.de>
| * lcd, pxafb: move the pxafb to drivers/videoJeroen Hofstee2013-03-21-0/+651
| | | | | | | | | | | | | | | | | | | | | | | | | | Since the lcd code was compiled unconditionally for pxa also add CONFIG_PXA_LCD to the boards using this framebuffer. Since driver/video contains video and lcd drivers, add lcd to the name to make clear it belongs to common/lcd.c. cc: Anatolij Gustschin <agust@denx.de> cc: Cliff Brake <cliff.brake@gmail.com> cc: Marek Vasut <marek.vasut@gmail.com> Acked-by: Marek Vasut <marex@denx.de> Signed-off-by: Jeroen Hofstee <jeroen@myspectrum.nl>
| * lcd, mpc8xx: move the mpc8xx driver to drivers/videoJeroen Hofstee2013-03-21-0/+619
| | | | | | | | | | | | | | | | | | Since the lcd code was compiled unconditionally in arch also add CONFIG_MPC8XX_LCD to the boards using this driver. cc: Anatolij Gustschin <agust@denx.de> cc: Wolfgang Denk <wd@denx.de> Signed-off-by: Jeroen Hofstee <jeroen@myspectrum.nl>
| * lcd, tegra: remove unused cursor functionsJeroen Hofstee2013-03-21-52/+0
| | | | | | | | | | | | | | cc: Anatolij Gustschin <agust@denx.de> cc: Simon Glass <sjg@chromium.org> Acked-by: Simon Glass <sjg@chromium.org> Signed-off-by: Jeroen Hofstee <jeroen@myspectrum.nl>
| * lcd, amba: remove this driver since it is not usedJeroen Hofstee2013-03-21-78/+0
| | | | | | | | | | | | | | | | | | | | Since CONFIG_VIDEO_AMBA is not set by any board, it does not seem to be used, so remove it since there is no way to (compile) test it. cc: Alessandro Rubini <rubini@unipv.it> cc: Anatolij Gustschin <agust@denx.de> Acked-by: Alessandro Rubini <rubini@unipv.it> Signed-off-by: Jeroen Hofstee <jeroen@myspectrum.nl>
| * common/lcd.c: cleanup use of global variablesWolfgang Denk2013-03-21-11/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | lcd_color_fg and lcd_color_bg had to be declared in board specific code, but were not actually used there; in addition, we have getter / setter functions for these, which were not used either. Get rid of the global variables, and use the getter function where needed (so far no setter calls are needed). Signed-off-by: Wolfgang Denk <wd@denx.de> Cc: Alessandro Rubini <rubini@unipv.it> Cc: Anatolij Gustschin <agust@denx.de> Cc: Bo Shen <voice.shen@atmel.com> Cc: Haavard Skinnemoen <haavard.skinnemoen@atmel.com> Cc: Kyungmin Park <kyungmin.park@samsung.com> Cc: Marek Vasut <marek.vasut@gmail.com> Cc: Minkyu Kang <mk7.kang@samsung.com> Cc: Nikita Kiryanov <nikita@compulab.co.il> Cc: Simon Glass <sjg@chromium.org> Cc: Stelian Pop <stelian@popies.net> Cc: Tom Warren <twarren@nvidia.com> Acked-by: Simon Glass <sjg@chromium.org> Acked-by: Jeroen Hofstee <jeroen@myspectrum.nl> [agust: also fixed cm_t35 board while rebasing] Signed-off-by: Anatolij Gustschin <agust@denx.de>
* | Merge branch 'u-boot/master' into 'u-boot-arm/master'Albert ARIBAUD2013-03-28-163/+2332
|\ \ | |/ |/| | | | | | | | | Conflicts: drivers/spi/tegra20_sflash.c include/fdtdec.h lib/fdtdec.c
| * Merge branch 'u-boot-tegra/master' into 'u-boot-arm/master'Albert ARIBAUD2013-03-26-150/+795
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| | * tegra114: add SPI driverAllen Martin2013-03-25-0/+421
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add driver for tegra114 SPI controller. This controller is not compatible with either the tegra20 or tegra30 controllers, so it requires a new driver. Signed-off-by: Allen Martin <amartin@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com> Reviewed-by: Stephen Warren <swarren@nvidia.com>
| | * sf: winbond: add W25Q32DWAllen Martin2013-03-25-0/+5
| | | | | | | | | | | | | | | | | | | | | | | | Add support for Winbond W25Q32DW 32Mbit part Signed-off-by: Allen Martin <amartin@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com> Reviewed-by: Stephen Warren <swarren@nvidia.com>
| | * spi: add common fdt SPI driver interfaceAllen Martin2013-03-25-45/+197
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add a common interface to fdt based SPI drivers. Each driver is represented by a table entry in fdt_spi_drivers[]. If there are multiple SPI drivers in the table, the first driver to return success from spi_init() will be registered as the SPI driver. Signed-off-by: Allen Martin <amartin@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com> Reviewed-by: Stephen Warren <swarren@nvidia.com>
| | * tegra20: spi: move fdt probe to spi_initAllen Martin2013-03-25-43/+67
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Make the tegra20 SPI driver similar to the tegra30 (and soon to be tegra114) SPI drivers in preparation of common fdt SPI driver front end. Signed-off-by: Allen Martin <amartin@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com> Reviewed-by: Stephen Warren <swarren@nvidia.com>
| | * tegra: spi: pull register structs out of headersAllen Martin2013-03-25-11/+110
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Move register structs from headers into .c files and use common name. This is in preparation of making common fdt front end for SPI drivers. Signed-off-by: Allen Martin <amartin@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com> Reviewed-by: Stephen Warren <swarren@nvidia.com>
| | * tegra: spi: remove non fdt supportAllen Martin2013-03-25-37/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | Remove non fdt support from tegra20 and tegra30 SPI drivers in preparation of new common fdt based SPI driver front end. Signed-off-by: Allen Martin <amartin@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com> Reviewed-by: Stephen Warren <swarren@nvidia.com>
| | * tegra: spi: rename tegra SPI driversAllen Martin2013-03-25-4/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | Rename tegra SPI drivers to tegra20_flash and tegra20_slink in preparation for commonization and addition of tegra114_spi. Signed-off-by: Allen Martin <amartin@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com> Reviewed-by: Stephen Warren <swarren@nvidia.com>
| | * tegra: remove support for UART SPI switchAllen Martin2013-03-25-24/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This feature was only used for tegra20 seaboard that had a pinmux conflict on the SPI pins. These boards were never manufactured, so remove this support to clean up SPI driver. Signed-off-by: Allen Martin <amartin@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com> Reviewed-by: Stephen Warren <swarren@nvidia.com>
| * | Merge branch 'u-boot-samsung/master' into 'u-boot-arm/master'Albert ARIBAUD2013-03-26-5/+1194
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| | * mmc:sdhci:fix: Change default interrupts enabled at SDHCI initializationŁukasz Majewski2013-03-12-3/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch changes sdhci_init()'s behavior to NOT enable all interrupt sources by default. Moreover interrupt signaling has been disabled. This patch do not enable interrupts which aren't served in u-boot (they are defined at sdhci.h but NOT used elsewhere): - SDHCI_INT_CARD_INSERT, SDHCI_INT_CARD_REMOVE, SDHCI_BUS_POWER, SDHCI_INT_CARD_REMOVE, SDHCI_INT_CARD_INT Special care shall be put on SDHCI_INT_CARD_INT, which indicates interrupt generated by SD card. According to "SD Host Controller Simplified Spec. ver 3.00" when bit 8 (Card Interrupt Status Enable) at "Normal Interrupt Status Enable Register" (offset 0x34) is set, the card interrupt detection is started. Then eMMC card may cause the SD controller to set this bit and then this interrupt is passed to booted OS and might cause kernel crash. To sum up: - Only enable interrupts, which are served at u-boot - This cleanup as a side effect fixes SDHCI's CARD INTERRUPT problem at Linux kernel (versions 3.6+, sdhci controller) - Keep masked bits at "Normal Interrupt Signal Enable Register" (0x38h) Signed-off-by: Lukasz Majewski <l.majewski@samsung.com> Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com> Cc: Lei Wen <leiwen@marvell.com> Cc: Andy Fleming <afleming@freescale.com> Acked-by: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
| | * Exynos5: TMU: Add hardware trippingAkshay Saraswat2013-03-12-5/+20
| | | | | | | | | | | | | | | | | | | | | | | | | | | This adds hardware tripping at 110 degrees celsius which must enable forced system shutdown in case TMU fails to power off. Signed-off-by: Akshay Saraswat <akshay.s@samsung.com> Acked-by: Simon Glass <sjg@chromium.org> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
| | * Exynos5: TMU: Add driver for Thermal Management UnitAkshay Saraswat2013-03-12-0/+305
| | | | | | | | | | | | | | | | | | | | | | | | | | | Adding Exynos Thermal Management Unit driver to monitor SOC temperature and take actions corresponding to states of TMU. Signed-off-by: Akshay Saraswat <akshay.s@samsung.com> Acked-by: Simon Glass <sjg@chromium.org> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
| | * Sound: Support for MAX98095 codec in driverRajeshwari Shinde2013-03-08-2/+7
| | | | | | | | | | | | | | | | | | | | | | | | | | | This patchs adds support for MAX98095 codec in sound driver. Signed-off-by: Rajeshwari Shinde <rajeshwari.s@samsung.com> Acked-by: Simon Glass <sjg@chromium.org> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
| | * Sound: MAX98095: Add the driver for codecRajeshwari Shinde2013-03-08-0/+862
| | | | | | | | | | | | | | | | | | | | | | | | | | | This patch adds the driver for codec MAX98095 required by Snow Board Signed-off-by: Rajeshwari Shinde <rajeshwari.s@samsung.com> Acked-by: Simon Glass <sjg@chromium.org> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
| * | mmc: omap_hsmmc.c: only register getcd/getwp callbacks if gpio could be usedPeter Korsgaard2013-03-24-2/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | Gets rid of warnings from omap_gpio: ERROR : check_gpio: invalid GPIO -1 (and undefined behaviour as the -1 error code is interpreted as gpio value) Signed-off-by: Peter Korsgaard <peter.korsgaard@barco.com>
| * | mmc: mmc_getcd/getwp: use sensible defaultsPeter Korsgaard2013-03-24-4/+12
| | | | | | | | | | | | | | | | | | | | | | | | | | | Let mmc_getcd() return true and mmc_getwp() false if mmc driver doesn't provide handlers for them. Signed-off-by: Peter Korsgaard <peter.korsgaard@barco.com> [trini: Add braces around first if test in each case to fix warning] Signed-off-by: Tom Rini <trini@ti.com>
| * | ns16550: enable quirks for ti814xMatt Porter2013-03-24-2/+3
| | | | | | | | | | | | | | | | | | | | | TI814X requires the same quirks as AM33XX to be enabled. Signed-off-by: Matt Porter <mporter@ti.com> Reviewed-by: Tom Rini <trini@ti.com>
| * | am33xx: Add required includes to some omap/am33xx codeTom Rini2013-03-24-0/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | - In arch/arm/cpu/armv7/omap-common/timer.c, drivers/mtd/nand/omap_gpmc.c and drivers/net/cpsw.c add #include files that the driver needs but had been relying on <config.h> to bring in. - In arch/arm/cpu/armv7/omap-common/lowlevel_init.S add <config.h> - In am335x_evm.h and pcm051.h don't globally include <asm/arch/hardware.h> and <asm/arch/cpu.h> but just <asm/arch/omap.h> as that is the only include which defines things the config uses. Cc: Lars Poeschel <poeschel@lemonage.de> Signed-off-by: Tom Rini <trini@ti.com>
| * | mmc: add bcm2835 driverStephen Warren2013-03-20-0/+190
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This adds a simple driver for the BCM2835's SD controller. Workarounds are implemented for: * Register writes can't be too close to each-other in time, or they will be lost. * Register accesses must all be 32-bit, so implement custom accessors. This code was extracted from: git://github.com/gonzoua/u-boot-pi.git master which was created by Oleksandr Tymoshenko. Portions of the code there were obviously based on the Linux kernel at: git://github.com/raspberrypi/linux.git rpi-3.6.y commit f5b930b "Main bcm2708 linux port" signed-off-by Dom Cobley. swarren changed the following for upstream: * Removed hack udelay()s in bcm2835_sdhci_raw_writel(); setting SDHCI_QUIRK_WAIT_SEND_CMD appears to solve the issues. * Remove register logging from read*/write* functions. * Sort out confusion with min/max_freq values passed to add_sdhci(). * Use more descriptive variable names and calculations in IO accessors. * Simplified and commented twoticks_delay calculation. * checkpatch fixes. Cc: Andy Fleming <afleming@gmail.com> Signed-off-by: Oleksandr Tymoshenko <gonzo@bluezbox.com> Signed-off-by: Stephen Warren <swarren@wwwdotorg.org> Acked-by: Andy Fleming <afleming@gmail.com>
| * | video: add a driver for the bcm2835Stephen Warren2013-03-20-0/+128
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The firmware running on the bcm2835 SoC's VideoCore CPU manages the display controller. Add a simple "LCD" driver that communicates with the firmware using the property mailbox protocol. This configures the display and frame-buffer to match whatever physical resolution the firmware chosen when booting, which is typically the native resolution of the attached display device, presumably unless otherwise specified in config.txt on the boot media. Enable this driver in the Raspberry Pi board configuration. Signed-off-by: Stephen Warren <swarren@wwwdotorg.org> Acked-by: Anatolij Gustschin <agust@denx.de>
* | | Merge branch 'spi' of git://git.denx.de/u-boot-x86Tom Rini2013-03-20-138/+1062
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| * | sf: Enable FDT-based configuration and memory mappingSimon Glass2013-03-19-1/+45
| | | | | | | | | | | | | | | | | | | | | Enable device tree control of SPI flash, and use this to implement memory-mapped SPI flash, which is supported on Intel chips. Signed-off-by: Simon Glass <sjg@chromium.org>
| * | x86: spi: Set maximum write size for ICHSimon Glass2013-03-19-0/+5
| | | | | | | | | | | | | | | | | | | | | This SPI controller can only write 64 bytes at a time. Add this restriction in so that 'sf write' works correct for blocks larger than 64 bytes. Signed-off-by: Simon Glass <sjg@chromium.org>
| * | sf: Respect maximum SPI write sizeSimon Glass2013-03-19-2/+8
| | | | | | | | | | | | | | | | | | | | | | | | Some SPI flash controllers (e.g. Intel ICH) have a limit on the number of bytes that can be in a write transaction. Support this by breaking the writes into multiple transactions. Signed-off-by: Simon Glass <sjg@chromium.org>
| * | x86: spi: Add Intel ICH driverSimon Glass2013-03-19-0/+893
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This supports Intel ICH7/9. The Intel controller is a little unusual in that it is mostly intended for use with SPI flash, and has some optimisations and features specifically for that application. In particular it is not possible to support ongoing transactions that continue over many calls with SPI_XFER_BEGIN and SPI_XFER_END. This driver supports writes of up to 64 bytes at a time, the limit for the controller. Future work will improve this. Signed-off-by: Bernie Thompson <bhthompson@chromium.org> Signed-off-by: Duncan Laurie <dlaurie@chromium.org> Signed-off-by: Bill Richardson <wfrichar@chromium.org> Signed-off-by: Vadim Bendebury <vbendeb@chromium.org> Signed-off-by: Gabe Black <gabeblack@chromium.org> Signed-off-by: Simon Glass <sjg@chromium.org>
| * | sf: Use spi_flash_alloc() in each SPI flash driverSimon Glass2013-03-19-52/+8
| | | | | | | | | | | | | | | | | | | | | | | | Rather than each device having its own way to allocate a SPI flash structure, use the new allocation function everywhere. This will make it easier to extend the interface without breaking devices. Signed-off-by: Simon Glass <sjg@chromium.org>
| * | sf: Add spi_flash_alloc() to create a new SPI flash structSimon Glass2013-03-19-0/+25
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | At present it is difficult to extend the SPI flash structure since all devices allocate it themselves, and few of them zero all fields. Add a new function spi_flash_alloc() which can be used by SPI devices to perform this allocation, and thus ensure that all devices can better cope with SPI structure changes. Signed-off-by: Simon Glass <sjg@chromium.org>
generated by cgit v1.1 at 2024-11-15 02:13:13 +0000