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* driver/ddr/fsl: Add DDR4 support to Freescale DDR driverYork Sun2014-04-22-269/+1906
| | | | | | | Mostly reusing DDR3 driver, this patch adds DDR4 SPD handling, register calculation and programming. Signed-off-by: York Sun <yorksun@freescale.com>
* net/phy: Fix PHY id for VSC8514Codrin Ciubotariu2014-04-22-1/+1
| | | | | | | | | | In the current Datasheet for VSC8514 there is a mistake, saying that the PHY id is 0x70570. The real value in the identifier registers is 0x70670. Linux PHY driver uses 0x70670 also. Signed-off-by: Codrin Ciubotariu <codrin.ciubotariu@freescale.com> Cc: York Sun <yorksun@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
* driver/fsl_ifc: Add a function to finalize CS0 address bindingYork Sun2014-04-22-0/+7
| | | | | | | | | For fsl-lsch3 NOR flash boot, IFC CS0 needs to be binded with address within 32-bit at fist. After u-boot relocates to DDR, CS0 can be binded to higher address to support large space. Signed-off-by: York Sun <yorksun@freescale.com> CC: Prabhakar Kushwaha <prabhakar@freescale.com>
* QE/U-QE: Add U-QE supportZhao Qiang2014-04-22-0/+2
| | | | | | | | | | | | | Modify code to adapt to both u-qe and qe. U_QE is a kind of cutted QE. the differences between U_QE and QE 1. UCC: U_QE supports 2 UCCs while QE supports up to 8 UCCs. 2. IMMR: have different immr base addr. 3. iopin: U_QE doesn't need to config iopin. Signed-off-by: Zhao Qiang <B45475@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
* QE/FMAN: modify CONFIG_SYS_QE_FMAN_FW_ADDR to CONFIG_SYS_FMAN_FW_ADDR and ↵Zhao Qiang2014-04-22-7/+7
| | | | | | | | | | | CONFIG_SYS_QE_FW_ADDR CONFIG_SYS_QE_FMAN_FW_ADDR is used to both Fman and QE for microcode address. Now using CONFIG_SYS_FMAN_FW_ADDR for Fman microcode address, and CONFIG_SYS_QE_FW_ADDR for QE microcode address. Signed-off-by: Zhao Qiang <B45475@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
* fsl/usb: Fix phy type for Second USB controllerNikhil Badola2014-04-22-2/+6
| | | | | | | | | Set correct phy_type value for second USB controller. This is required for supporting SOCs having 2 USB controllers working simultaneously, one with UTMI phy and other with ULPI phy Signed-off-by: Nikhil Badola <B46172@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
* e1000: remove redundant assignmentDavid Müller (ELSOFT AG)2014-04-18-1/+0
| | | | | Signed-off-by: David Mueller <d.mueller@elsoft.ch> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
* pcnet: force ordering of descriptor accessesPaul Burton2014-04-18-18/+19
| | | | | | | | | | | The ordering of accesses to the rx & tx descriptors is important, yet the send & recv functions accessed them via regular structure accesses. This leaves the compiler with the opportunity to reorder those accesses or to hoist them outside of loops. Prevent that from happening by using readl & writel to access the descriptors. As a nice bonus, this removes the need for the driver to care about endianness. Signed-off-by: Paul Burton <paul.burton@imgtec.com>
* pcnet: align rx buffers for cache invalidationPaul Burton2014-04-18-9/+12
| | | | | | | | | | The RX buffers are invalidated when a packet is received, however they were not suitably cache-line aligned. Allocate them seperately to the pcnet_priv structure and align to ARCH_DMA_MINALIGN in order to ensure suitable alignment for the cache invalidation, preventing anything else being placed in the same lines & lost. Signed-off-by: Paul Burton <paul.burton@imgtec.com>
* pcnet: access descriptor rings & init block uncachedPaul Burton2014-04-18-31/+35
| | | | | | | | | | | | | | | | | | | | | | | | | | The prior accesses to the descriptor rings & init block via cached memory had a few issues: - The memory needs cache flushes or invalidation at the appropriate times, but was not necessarily aligned on cache line boundaries. This could lead to data being incorrectly lost or written back to RAM at the wrong time. - There are points where ordering of writes to the memory is important, but because it's cached memory the pcnet controller would see cache lines written back ordered by address. This could occasionally lead to hardware seeing descriptors in an incorrect state. - Flushing the cache constantly is inefficient. So, to avoid all of those issues simply access the descriptors & init block via uncached memory. The MIPS-specific UNCACHED_SDRAM macro is used to do this (retrieving an address in kseg1) as I could see no existing generic solution. Since the MIPS Malta board is the only user of the pcnet driver, hopefully this doesn't matter. Signed-off-by: Paul Burton <paul.burton@imgtec.com>
* arm: remove lubbock board supportMasahiro Yamada2014-04-18-6/+0
| | | | | | | | | | | Enough time has passed since this board was moved to Orphan. Remove. - Remove board/lubbock/* - Remove include/configs/lubbock.h - Cleanup defined(CONFIG_LUBBOCK) - Move the entry from boards.cfg to doc/README.scrapyard Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
* powerpc: remove RPXClassic, RPXlite boards supportMasahiro Yamada2014-04-18-3/+3
| | | | | | | | | | | | | Enough time has passed since these boards were moved to Orphan. Remove. - Remove board/RPXlite/* - Remove board/RPXClassic/* - Remove include/configs/RPXlite.h - Remove include/configs/RPXClassic.h - Clean-up defined(CONFIG_RPXCLASSIC) - Move the entry from boards.cfg to doc/README.scrapyard Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
* mtd: delete unused filesMasahiro Yamada2014-04-17-1780/+0
| | | | | Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com> Cc: Scott Wood <scottwood@freescale.com>
* i2c: sh_i2c: bugfix: i2c probe command does not workTetsuyuki Kobayashi2014-04-14-1/+3
| | | | | | | | | | | | | | | | | | | | This is regression of commit 2035d77d i2c: sh_i2c: Update to new CONFIG_SYS_I2C framework Before commit 2035d77d, i2c probe command works properly on kzm9g board. KZM-A9-GT# i2c probe Valid chip addresses: 0C 12 1D 32 39 3D 40 60 After commit 2035d77d, i2c probe command does not work. KZM-A9-GT# i2c probe Valid chip addresses: 00 01 02 03 04 05 06 07 08 09 0A 0B 0C 0D 0E 0F 10 11 12 13 14 15 16 17 18 19 1A 1B 1C 1D 1E 1F 20 21 22 23 24 25 26 27 28 29 2A 2B 2C 2D 2E 2F 30 31 32 33 34 35 36 37 38 39 3A 3B 3C 3D 3E 3F 40 41 42 43 44 45 46 47 48 49 4A 4B 4C 4D 4E 4F 50 51 52 53 54 55 56 57 58 59 5A 5B 5C 5D 5E 5F 60 61 62 63 64 65 66 67 68 69 6A 6B 6C 6D 6E 6F 70 71 72 73 74 75 76 77 78 79 7A 7B 7C 7D 7E 7F sh_i2c_probe() calls sh_i2c_read(), but read length is 0. So acutally it does not read device at all. This patch prepares dummy buffer and read data into it. Signed-off-by: Tetsuyuki Kobayashi <koba@kmckk.co.jp> Acked-by: Heiko Schocher <hs@denx.de> Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
* Merge branch 'u-boot/master' into 'u-boot-arm/master'Albert ARIBAUD2014-04-08-938/+787
|\ | | | | | | | | | | | | | | Conflicts: arch/arm/cpu/arm926ejs/mxs/Makefile include/configs/trats.h include/configs/trats2.h include/mmc.h
| * ahci: Fix data abort on multiple scsi resets.Roger Quadros2014-04-02-7/+16
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Commit 2faf5fb82ed6 introduced a regression that causes a data abort when running scsi init followed by scsi reset. There are 2 problems with the original commit 1) ALLOC_CACHE_ALIGN_BUFFER() allocates memory on the stack but is assigned to ataid[port] and used by other functions. 2) The function ata_scsiop_inquiry() tries to free memory which was never allocated on the heap. Fix these problems by using tmpid as a temporary cache aligned buffer. Allocate memory separately for ataid[port] and re-use it if required. Fixes: 2faf5fb82ed6 (ahci: Fix cache align error messages) Reported-by: Eli Nidam <elini@marvell.com> Signed-off-by: Roger Quadros <rogerq@ti.com>
| * mmc:eSDHC: Workaround for data timeout issue on Txxx SoCHaijun.Zhang2014-04-02-0/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | 1. The Data timeout counter value in eSDHC_SYSCTL register is not working as it should be, so add quirks to enable this workaround to fix it to the max value 0xE. 2. Add CONFIG_SYS_FSL_ERRATUM_ESDHC111 to enable its workaround. * Update of patch for change mmc interface by Pantelis Antoniou <panto@antoniou-consulting.com> Signed-off-by: Haijun Zhang <Haijun.Zhang@freescale.com> Acked-by: Pantelis Antoniou <panto@antoniou-consulting.com>
| * mmc: fsl_esdhc: add controller reset in case of data related errors tooAndrew Gabbasov2014-04-02-27/+36
| | | | | | | | | | | | | | | | The controller reset is performed now if command error occurs. This commit adds the reset for the case of data related errors too. Signed-off-by: Andrew Gabbasov <andrew_gabbasov@mentor.com> Acked-by: Pantelis Antoniou <panto@antoniou-consulting.com>
| * mmc: fsl_esdhc: fix calculation of timeout for data transactionsAndrew Gabbasov2014-04-02-6/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Calculation of the timeout value should be based on actual clock value, written to controller registers. Since mmc->tran_speed is either the maximum allowed speed, or the preliminary value, that is be not yet set to registers, the actual timeout, taken by the controller, based on its clock settings, may be much longer than expected, based on mmc->tran_speed value. In particular it happens at early initialization stage, when typical value of mmc->tran_speed is 20MHz or 26MHz, while actual clock setting, configured in the controller, is 400kHz. It's more correct to use mmc->clock value for timeout calculation instead. Signed-off-by: Andrew Gabbasov <andrew_gabbasov@mentor.com> Acked-by: Pantelis Antoniou <panto@antoniou-consulting.com>
| * mmc: Add 'mmc rst-function' sub-commandTom Rini2014-04-02-0/+12
| | | | | | | | | | | | | | | | | | | | | | | | Some eMMC chips may need the RST_n_FUNCTION bit set to a non-zero value in order for warm reset of the system to work. Details on this being required will be part of the eMMC datasheet. Also add using this command to the dra7xx README. * Whitespace fix by panto Signed-off-by: Tom Rini <trini@ti.com> Acked-by: Pantelis Antoniou <panto@antoniou-consulting.com>
| * mmc: sh_mmcif: Fix warning by unused variableNobuhiro Iwamatsu2014-04-02-2/+1
| | | | | | | | | | | | Signed-off-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com> Reported-by: Masahiro Yamada <yamada.m@jp.panasonic.com> Acked-by: Pantelis Antoniou <panto@antoniou-consulting.com>
| * mmc: sh_mmcif: Fix compile errorNobuhiro Iwamatsu2014-04-02-1/+1
| | | | | | | | | | | | | | | | | | | | BY commit "mmc: Split mmc struct, rework mmc initialization (v2)", sh_mmcif has compile error. This fixes compile error. Signed-off-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com> CC: Pantelis Antoniou <panto@antoniou-consulting.com> Reported-by: Masahiro Yamada <yamada.m@jp.panasonic.com> Acked-by: Pantelis Antoniou <panto@antoniou-consulting.com>
| * drivers: i2c: delete an unused source fileMasahiro Yamada2014-03-31-387/+0
| | | | | | | | | | Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com> Cc: Heiko Schocher <hs@denx.de>
| * blackfin: mmc: Correct mmc_host_is_spi and bfin_sdh.cTom Rini2014-03-28-1/+1
| | | | | | | | | | | | | | | | In the recent mmc cleanup, the mmc_host_is_spi macro was broken and bfin_sdh.c had mmc->bus_width turned into mmc_bus_width(mmc), both of which were incorrect. Signed-off-by: Tom Rini <trini@ti.com>
| * drivers: crypto: ace_sha: add implementation of hardware based lib randPrzemyslaw Marczak2014-03-28-4/+77
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch adds implementation of rand library based on hardware random number generator of security subsystem in Exynos SOC. This library includes: - srand() - used for seed hardware block - rand() - returns random number - rand_r() - the same as above with given seed which depends on CONFIG_EXYNOS_ACE_SHA and CONFIG_LIB_HW_RAND. Signed-off-by: Przemyslaw Marczak <p.marczak@samsung.com> cc: Akshay Saraswat <akshay.s@samsung.com> cc: ARUN MANKUZHI <arun.m@samsung.com> cc: Minkyu Kang <mk7.kang@samsung.com> Cc: Michael Walle <michael@walle.cc> Cc: Tom Rini <trini@ti.com> Cc: Masahiro Yamada <yamada.m@jp.panasonic.com>
| * net/designware: align DMA buffer descriptors to D$ lineAlexey Brodkin2014-03-28-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | It's important to have ability to flush/invalidate each DMA buffer descriptor individually to prevent incoherency of adjacent BDs. Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com> Cc: Vineet Gupta <vgupta@synopsys.com> Cc: Joe Hershberger <joe.hershberger@ni.com> Cc: Vipin Kumar <vipin.kumar@st.com> Cc: Stefan Roese <sr@denx.de> Cc: Shiraz Hashim <shiraz.hashim@st.com> Cc: Albert ARIBAUD <albert.u.boot@aribaud.net> Cc: Amit Virdi <amit.virdi@st.com> Cc: Sonic Zhang <sonic.zhang@analog.com>
| * Merge branch 'master' of git://git.denx.de/u-boot-mmcTom Rini2014-03-28-472/+548
| |\
| | * dfu: mmc: Replace calls to u-boot commands with native mmc APIŁukasz Majewski2014-03-24-7/+24
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | For some time we have been using the run_command() with properly crafted string. Such approach turned to be unreliable and error prone. Switch to "native" mmc subsystem API would allow better type checking and shall improve speed. Also, it seems that this API is changing less often than u-boot commands. The approach similar to env operations on the eMMC has been reused. Signed-off-by: Lukasz Majewski <l.majewski@samsung.com>
| | * mmc: Split mmc struct, rework mmc initialization (v2)Pantelis Antoniou2014-03-24-385/+403
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The way that struct mmc was implemented was a bit of a mess; configuration and internal state all jumbled up in a single structure. On top of that the way initialization is done with mmc_register leads to a lot of duplicated code in drivers. Typically the initialization got something like this in every driver. struct mmc *mmc = malloc(sizeof(struct mmc)); memset(mmc, 0, sizeof(struct mmc); /* fill in fields of mmc struct */ /* store private data pointer */ mmc_register(mmc); By using the new mmc_create call one just passes an mmc config struct and an optional private data pointer like this: struct mmc = mmc_create(&cfg, priv); All in tree drivers have been updated to the new form, and expect mmc_register to go away before long. Changes since v1: * Use calloc instead of manually calling memset. * Mark mmc_register as deprecated. Signed-off-by: Pantelis Antoniou <panto@antoniou-consulting.com>
| | * mmc: Convert mmc struct's name array to a pointerPantelis Antoniou2014-03-24-15/+15
| | | | | | | | | | | | | | | | | | | | | Using an array is pointless; even more pointless (and scary) is using sprintf to fill it without a format string. Signed-off-by: Pantelis Antoniou <panto@antoniou-consulting.com>
| | * mmc: Remove ops from struct mmc and put in mmc_opsPantelis Antoniou2014-03-24-113/+171
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Remove the in-structure ops and put them in mmc_ops with a constant pointer to it. This makes the mmc structure smaller as well as conserving code space (in theory). All in-tree drivers are converted as well; this is done in a single patch in order to not break git bisect. Changes since V1: Fix compilation b0rked issue on omap platforms where OMAP_GPIO was not set. Signed-off-by: Pantelis Antoniou <panto@antoniou-consulting.com>
| * | dfu: mmc: Replace calls to u-boot commands with native mmc APIŁukasz Majewski2014-03-23-7/+24
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | For some time we have been using the run_command() with properly crafted string. Such approach turned to be unreliable and error prone. Switch to "native" mmc subsystem API would allow better type checking and shall improve speed. Also, it seems that this API is changing less often than u-boot commands. The approach similar to env operations on the eMMC has been reused. Signed-off-by: Lukasz Majewski <l.majewski@samsung.com>
| * | usb: dfu: introduce dfuMANIFEST stateHeiko Schocher2014-03-23-10/+42
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | on nand flash using ubi, after the download of the new image into the flash, the "rest" of the nand sectors get erased while flushing the medium. With current u-boot version dfu-util may show: Starting download: [##################################################] finished! state(7) = dfuMANIFEST, status(0) = No error condition is present unable to read DFU status as get_status is not answered while erasing sectors, if erasing needs some time. So do the following changes to prevent this: - introduce dfuManifest state According to dfu specification ( http://www.usb.org/developers/devclass_docs/usbdfu10.pdf ) section 7: "the device enters the dfuMANIFEST-SYNC state and awaits the solicitation of the status report by the host. Upon receipt of the anticipated DFU_GETSTATUS, the device enters the dfuMANIFEST state, where it completes its reprogramming operations." - when stepping into dfuManifest state, sending a PollTimeout DFU_MANIFEST_POLL_TIMEOUT in ms, to the host, so the host (dfu-util) waits the PollTimeout before sending a get_status again. Signed-off-by: Heiko Schocher <hs@denx.de> Cc: Lukasz Majewski <l.majewski@samsung.com> Cc: Kyungmin Park <kyungmin.park@samsung.com> Cc: Marek Vasut <marex@denx.de> Cc: Pantelis Antoniou <panto@antoniou-consulting.com>
| * | usb, dfu: extract flush code into seperate functionHeiko Schocher2014-03-23-18/+24
| |/ | | | | | | | | | | | | | | | | | | | | move the flushing code into an extra function dfu_flush(), so it can be used from other code. Signed-off-by: Heiko Schocher <hs@denx.de> Cc: Lukasz Majewski <l.majewski@samsung.com> Cc: Kyungmin Park <kyungmin.park@samsung.com> Cc: Marek Vasut <marex@denx.de> Cc: Pantelis Antoniou <panto@antoniou-consulting.com>
* | Merge branch 'master' of git://git.denx.de/u-boot-arm into masterStefano Babic2014-04-04-1413/+4809
|\ \ | | | | | | | | | | | | | | | | | | | | | Conflicts: arch/arm/cpu/arm926ejs/mxs/mxsimage.mx23.cfg arch/arm/cpu/arm926ejs/mxs/mxsimage.mx28.cfg Signed-off-by: Stefano Babic <sbabic@denx.de>
| * \ Merge branch 'u-boot/master' into 'u-boot-arm/master'Albert ARIBAUD2014-03-25-417/+2404
| |\ \ | | |/ | | | | | | | | | | | | | | | | | | Trivial merge conflict, needed to manually remove local_info as per commit 41364f0f. Conflicts: board/samsung/common/board.c
| | * sandbox: Add implementation of spi_setup_slave_fdt()Simon Glass2014-03-17-0/+13
| | | | | | | | | | | | | | | | | | This function is needed when CONFIG_OF_SPI is defined. Signed-off-by: Simon Glass <sjg@chromium.org>
| | * sandbox: Allow Ctrl-C to work in sandboxSimon Glass2014-03-17-1/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | It is useful for Cltl-C to be handled by U-Boot as it is on other boards. But it is also useful to be able to terminate U-Boot with Ctrl-C. Add an option to enable signals while in raw mode, and make this the default. Add an option to leave the terminal cooked, which is useful for redirecting output. Signed-off-by: Simon Glass <sjg@chromium.org>
| | * sound: Move Samsung-specific code into its own fileSimon Glass2014-03-17-221/+210
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The i2s code is in fact Samsung-specific, but there might be other implementation. Move this code into its own file. This makes it slightly more obviously how to adjust the code to support another SoC, when someone takes this task on. Also drop non-FDT support, since it isn't used on Exynos 5. Tested-by: Che-Liang Chiou <clchiou@chromium.org> Signed-off-by: Simon Glass <sjg@chromium.org>
| | * sandbox: Add LCD driverSimon Glass2014-03-17-0/+84
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add a simple LCD driver which uses SDL to display the image. We update the image regularly, while still providing for reasonable performance. Adjust the common lcd code to support sandbox. For command-line runs we do not want the LCD to be displayed, so add a --show_lcd option to enable it. Tested-by: Che-Liang Chiou <clchiou@chromium.org> Signed-off-by: Simon Glass <sjg@chromium.org>
| | * sandbox: Add a simple sound driverSimon Glass2014-03-17-0/+25
| | | | | | | | | | | | | | | | | | | | | Add a sound driver for sandbox, which uses SDL. Tested-by: Che-Liang Chiou <clchiou@chromium.org> Signed-off-by: Simon Glass <sjg@chromium.org>
| | * cros_ec: Implement I2C pass-throughSimon Glass2014-03-17-2/+268
| | | | | | | | | | | | | | | | | | | | | | | | | | | The Chrome EC has a feature where you can access its I2C buses through a pass-through arrangement. Add a command to support this, and export the function for it also. Reviewed-by: Vadim Bendebury <vbendeb@google.com> Signed-off-by: Simon Glass <sjg@chromium.org>
| | * cros_ec: sandbox: Add Chrome OS EC emulationSimon Glass2014-03-17-0/+576
| | | | | | | | | | | | | | | | | | | | | | | | Add a simple emulation of the Chrome OS EC for sandbox, so that it can perform various EC tasks such as keyboard handling. Reviewed-by: Vadim Bendebury <vbendeb@chromium.org> Signed-off-by: Simon Glass <sjg@chromium.org>
| | * cros_ec: Correct comparison between signed and unsigned numbersSimon Glass2014-03-17-16/+18
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Due to signed/unsigned comparison, '< sizeof(struct)' does not do the right thing, since if ec_command() returns a -ve number we will consider this be success. Adjust all comparisons to avoid this problem. This error was found with sandbox, which gives a segfault in this case. On ARM we may instead silently fail. We should also consider turning on -Wsign-compare to catch this sort of thing in future. Reviewed-by: Andrew Chew <achew@nvidia.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Vadim Bendebury <vbendeb@chromium.org> Tested-by: Andrew Chew <achew@nvidia.com> Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Jimmy Zhang <jimmzhang@nvidia.com>
| | * cros_ec: spi: Add support for EC protocol version 3Randall Spangler2014-03-17-0/+36
| | | | | | | | | | | | | | | | | | | | | | | | | | | Protocol version 3 will be attempted first; if the EC doesn't support it, u-boot will fall back to the old protocol version (2). Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Randall Spangler <rspangler@chromium.org> Signed-off-by: Simon Glass <sjg@chromium.org>
| | * cros_ec: Add base support for protocol v3Simon Glass2014-03-17-1/+164
| | | | | | | | | | | | | | | | | | | | | Protocol v2 was shipped with snow, link and spring. Protocol v3 is for pit and is targetted at SPI operation. Signed-off-by: Simon Glass <sjg@chromium.org>
| | * cros_ec: Clean up multiple EC protocol supportRandall Spangler2014-03-17-44/+47
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Version 1 protocols (without command version) were already no longer supported in cros_ec.c. This removes some dead code from the cros_ec_i2c driver. Version 2 protcols (with command version) are now called protocol_version=2, instead of cmd_version_is_supported=1. A subsequent change will introduce protocol version 3 for SPI. Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Randall Spangler <rspangler@chromium.org> Signed-off-by: Simon Glass <sjg@chromium.org>
| | * cros_ec: Sync up with latest Chrome OS EC versionSimon Glass2014-03-17-16/+17
| | | | | | | | | | | | | | | | | | The EC messages have been expanded and some parts have been renamed. Signed-off-by: Simon Glass <sjg@chromium.org>
| | * cros_ec: Move #ifdef to permit flash region accessSimon Glass2014-03-17-1/+2
| | | | | | | | | | | | | | | | | | | | | Flash region access is not tied to having commands, so adjust the #ifdef to reflect this. Signed-off-by: Simon Glass <sjg@chromium.org>
| | * cros_ec: Support systems with no EC interruptSimon Glass2014-03-17-4/+30
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Some systems do not have an EC interrupt. Rather than assuming that the interrupt is always present, and hanging forever waiting for more input, handle the missing interrupt. This works by reading key scans only until we get an identical one. This means the EC keyscan FIFO is empty. Tested-by: Che-Liang Chiou <clchiou@chromium.org> Signed-off-by: Simon Glass <sjg@chromium.org>
generated by cgit v1.1 at 2024-11-19 10:17:28 +0000