summaryrefslogtreecommitdiff
path: root/drivers
Commit message (Collapse)AuthorAgeLines
* serial_mxc: add support for MX51 processorStefano Babic2010-03-07-6/+12
| | | | | | | The patch adds support for the Freescale mx51 processor. Signed-off-by: Stefano Babic <sbabic@denx.de> Signed-off-by: Fred Fan <fanyefeng@gmail.com>
* ] fix monitor protection for CONFIG_MONITOR_IS_IN_RAMWolfgang Wegner2010-03-04-1/+2
| | | | | | | | | | For platforms with flash below ram addresses, the current check to activate monitor protection is wrong/insufficient. This patch fixes CONFIG_MONITOR_IS_IN_RAM for these systems by adding a check for this configuration. Signed-off-by: Wolfgang Wegner <w.wegner@astro-kom.de> Signed-off-by: Stefan Roese <sr@denx.de>
* convert common files to new SoC accessJens Scharsig2010-02-12-6/+48
| | | | | | | | * add's a warning to all files, which need update to new SoC access * convert common files in cpu/../at91 and a lot of drivers to use c stucture SoC access Signed-off-by: Jens Scharsig <js_at_ng@scharsoft.de>
* add a new AT91 GPIO driverJens Scharsig2010-02-12-0/+215
| | | | | | | | | * add a real AT91 GPIO driver instead of header inline code * resolve the mixing of port and pins * change board config files to use new driver * add macros to gpio to realize backward compatibility Signed-off-by: Jens Scharsig <js_at_ng@scharsoft.de>
* SPI: Fix 32 bit transfers in mxc_spi.cMagnus Lilja2010-02-12-0/+9
| | | | | | | | | | | | | | Commit f9b6a1575d9f1ca192e4cb60e547aa66f08baa3f, "i.MX31: fix SPI driver for shorter than 32 bit" broke 32 bit transfers. This patch makes single 32 bit transfer work again. Transfer lengths that are known not to work will abort and print an error message. Tested on i.MX31 Litekit and i.MX31 PDK using 32 bit transfers to the MC13783/ATLAS chip (using the 'date' command). Signed-off-by: Magnus Lilja <lilja.magnus@gmail.com>
* TI DaVinci: Driver for the davinci SPI controllerSekhar Nori2010-02-12-0/+325
| | | | | | | | | This adds a driver for the SPI controller found on davinci based SoCs from Texas Instruments. Signed-off-by: Sekhar Nori <nsekhar@ti.com> Signed-off-by: Sudhakar Rajashekhara <sudhakar.raj@ti.com> Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
* fec_mxc: add support for MX51 processorStefano Babic2010-02-06-41/+32
| | | | | | | | The patch add support for the Freescale mx51 processor to the FEC ethernet driver. Signed-off-by: Stefano Babic <sbabic@denx.de> Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
* NET: kirkwood-egiga smi access fixSiddarth Gore2010-02-06-6/+7
| | | | | | | | | | | | Although the datasheet mentions seperate smi registers for each port, using Port 1 smi register to access ethernet phys does not work. Hence only Port 0 smi register should be used to access all devices connected to the smi bus. This behavior is consistant with the mv643xx driver in the linux kernel. Signed-off-by: Siddarth Gore <gores@marvell.com> Acked-by: Prafulla Wadaskar <prafulla@marvell.com> Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
* ns16550: kick watchdog while waiting for a characterLadislav Michl2010-02-03-0/+2
| | | | | | | | ns16550 busyloops waiting for incoming byte causing watchdog to reboot while waiting for a key press. A call to WATCHDOG_RESET in NS16550_getc loop fixes it. Signed-off-by: Ladislav Michl <ladis@linux-mips.org>
* musb: Add host support for DM365 EVMPrathap Srinivas2010-02-03-2/+20
| | | | | | Add support for musb host on DM365 EVM. Signed-off-by: Prathap Srinivas <msprathap@ti.com>
* usb: musb: fix Blackfin DMA register paddingCliff Cai2010-02-03-1/+1
| | | | | | | | | The conversion from offsets to C structs lost a little padding in the DMA register map. Accessing endpoints other than ep0 with DMA would fail as the addresses wouldn't be adjusted correctly. Signed-off-by: Cliff Cai <cliff.cai@analog.com> Signed-off-by: Mike Frysinger <vapier@gentoo.org>
* Merge branch 'master' of git://git.denx.de/u-boot-cfi-flashWolfgang Denk2010-02-03-17/+18
|\
| * CFI: fix eraseregions numblocksLadislav Michl2010-02-02-17/+18
| | | | | | | | | | | | | | | | | | | | eraseregions numblocks was sometimes one less than actual, possibly producing erase regions with zero blocks. As MTD code touches eraseregions only if numeraseregions is greater that zero, allocate eraseregions only for non uniform erase size flash. Signed-off-by: Ladislav Michl <ladis@linux-mips.org> Signed-off-by: Stefan Roese <sr@denx.de>
* | Merge branch 'master' of git://git.denx.de/u-boot-netWolfgang Denk2010-02-03-719/+2153
|\ \
| * | new at91_emac network driver (NET_MULTI api)Jens Scharsig2010-01-31-0/+499
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | * add's at91_emac (AT91RM9200) network driver (NET_MULTI api) * enable driver with CONFIG_DRIVER_AT91EMAC * generic PHY initialization * modify AT91RM9200 boards to use NET_MULTI driver * the drivers has been tested with LXT971 Phy and DM9161 Phy at MII and RMII interface Signed-off-by: Jens Scharsig <js_at_ng@scharsoft.de> Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
| * | Add EP93xx ethernet driverMatthias Kaehlcke2010-01-31-0/+798
| | | | | | | | | | | | | | | | | | | | | Added ethernet driver for EP93xx SoCs Signed-off-by: Matthias Kaehlcke <matthias@kaehlcke.net> Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
| * | 83xx, uec: split enet_interface in two variablesHeiko Schocher2010-01-31-109/+131
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | There's no sensible reason to unite speed and interface type into one variable. So split this variable enet_interface into two vars: enet_interface_type, which hold the interface type and speed. Also: add the possibility for switching between 10 and 100 MBit interfaces on the fly, when running in FAST_ETH mode. Signed-off-by: Heiko Schocher <hs@denx.de> Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
| * | TI: DaVinci: Updating EMAC driver for DM365, DM646x and DA8XXNick Thompson2010-01-31-95/+171
| | | | | | | | | | | | | | | | | | | | | | | | | | | The EMAC IP on DM365, DM646x and DA830 is slightly different from that on DM644x. This change updates the DaVinci EMAC driver so that EMAC becomes operational on SOCs with EMAC v2. Signed-off-by: Nick Thompson <nick.thompson@ge.com> Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
| * | macb: Fix mii_phy_read and mii_phy_write functionsSemih Hazar2010-01-31-77/+33
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Enabling CONFIG_CMD_MII in AVR32 boards was not possible due to compile errors. This patch fixes miiphy_read and miiphy_write functions and registers them properly. Signed-off-by: Semih Hazar <semih.hazar@indefia.com> Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
| * | tsec: Add TSEC_FIBER flagPeter Tyser2010-01-31-2/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The TSEC_FIBER flag should be set when a PHY is operating with an external fiber interface. Currently it is only used to notify a user that the PHY is operating in fiber mode. A short description was also added to the other TSEC flag defines so that it is clear how they differ from one another. Signed-off-by: Peter Tyser <ptyser@xes-inc.com> Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
| * | tsec: Add support for using the BCM5482 PHY in fiber modePeter Tyser2010-01-31-4/+106
| | | | | | | | | | | | | | | | | | | | | | | | | | | The BCM5482 PHY supports both copper and fiber as an ethernet medium. By enabling its copper/fiber mode auto-detection feature it can dynamically determine if it should be configured for copper or fiber. Signed-off-by: Peter Tyser <ptyser@xes-inc.com> Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
| * | tsec: General cleanupPeter Tyser2010-01-31-345/+326
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | - Cleanup formatting of phy_info structures - Fix lines > 80 chars - Fix some random indentation inconsistencies Signed-off-by: Peter Tyser <ptyser@xes-inc.com> Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
| * | tsec: Make functions/data static when possiblePeter Tyser2010-01-31-43/+47
| | | | | | | | | | | | | | | | | | | | | This is generally good practice and saves ~150 bytes. Signed-off-by: Peter Tyser <ptyser@xes-inc.com> Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
| * | tsec: Clean up Broadcom PHY status parsingPeter Tyser2010-01-31-43/+34
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | - Remove unnecessary printing "Enet starting in <speed>/<duplex>" This same information is already printed during normal ethernet operation in the form "Speed: 1000, full duplex". - Add a check for link before determining link speed and duplex If there is no link, speed/duplex don't matter. This also removes the annoying and unneeded "Auto-neg error, defaulting to 10BT/HD" message that occurs when no link is detected. - Whitespace and line > 80 characters cleanup Signed-off-by: Peter Tyser <ptyser@xes-inc.com> Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
| * | tsec: Force TBI PHY to 1000Mbps full duplex in SGMII modePeter Tyser2010-01-31-1/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | In SGMII mode the link between a processor's internal TBI PHY and an external PHY should always be 1000Mbps, full duplex. Also, the SGMII interface between an internal TBI PHY and external PHY does not support in-band auto-negotation. Previously, when configured for SGMII mode a TBI PHY would attempt to restart auto-negotation during initializtion. This auto-negotation between a TBI PHY and external PHY would fail and result in unusable ethernet operation. Forcing the TBI PHY and and external PHY to link at 1000Mbps full duplex in SGMII mode resolves this issue of auto-negotation failing. Note that 10Mbps and 100Mbps operation is still possible on the external side of the external PHY even when SGMII is operating at 1000Mbps. The SGMII interface still operates at 1000Mbps, but each byte of data is repeated 100 or 10 times for 10/100Mbps and the external PHY handles converting this data stream into proper 10/100Mbps signalling. Signed-off-by: Peter Tyser <ptyser@xes-inc.com> Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
| * | NET: Fix MAC addr handling for smc911xSeunghyeon Rhee2010-01-31-6/+9
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch turns off MAC address mismatch warning when optional eeprom programmed with MAC address is not available. In that case, smc911x's MAC address register has its default value ff:ff:ff:ff:ff:ff and it's not a valid address. This makes eth_initialize() show the warning which has no meaningful information while environment variable ethaddr overrides the address read from the register. If there's no eeprom and the value of MAC address register is not valid after initialization, dev->enetaddr had better not be updated and maintain its initial value 00:00:00:00:00:00, which I think is what eth_initialize() expects. This is not a bug fix. Even without this patch, the driver works fine. It's just for enhancing the way of displaying messages. Signed-off-by: Seunghyeon Rhee <seunghyeon@lpmtec.com> Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
| * | cs8900_initialize() cleanupMatthias Kaehlcke2010-01-31-2/+1
| |/ | | | | | | | | | | | | cs8900_initialize(): remove unecessary calls to free() and fix memory leak Signed-off-by: Matthias Kaehlcke <matthias@kaehlcke.net> Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
* | Merge branch 'master' of git://git.denx.de/u-boot-nand-flashWolfgang Denk2010-02-03-71/+546
|\ \
| * | Nand mxc_nand add v1.1 controller supportJohn Rigby2010-01-27-71/+546
| |/ | | | | | | | | | | | | | | Add support for version 1.1 of the nfc nand flash controller which is on the i.mx25 soc. Signed-off-by: John Rigby <jcrigby@gmail.com> CC: Scott Wood <scottwood@freescale.com>
* | video: add amba-clcd prime-cellAlessandro Rubini2010-01-27-0/+80
|/ | | | | | | | | | This adds support for the CLCD logic cell. It accepts precompiled register values for specific configuration through a board-supplied data structure. It is used by the Nomadik nhk8815, added by a later patch in this series. Signed-off-by: Alessandro Rubini <rubini@unipv.it> Acked-by: Andrea Gallo <andrea.gallo@stericsson.com>
* Merge branch 'master-sync' of git://git.denx.de/u-boot-armWolfgang Denk2010-01-23-8/+2017
|\
| * SPEAr : usbd driver support for SPEAr SoCsVipin KUMAR2010-01-23-0/+1001
| | | | | | | | | | | | | | | | | | | | | | | | | | SPEAr SoCs contain a synopsys usb device controller. USB Device IP can work in 2 modes - DMA mode - Slave mode The driver adds support only for slave mode operation of usb device IP. This driver is used along with standard USBTTY driver to obtain a tty interface over USB on the host Signed-off-by: Vipin <vipin.kumar@st.com>
| * SPEAr : nand driver support for SPEAr SoCsVipin KUMAR2010-01-23-0/+125
| | | | | | | | | | | | | | | | SPEAr SoCs contain an FSMC controller which can be used to interface with a range of memories eg. NAND, SRAM, NOR. Currently, this driver supports interfacing FSMC with NAND memories Signed-off-by: Vipin <vipin.kumar@st.com>
| * SPEAr : smi driver support for SPEAr SoCsVipin KUMAR2010-01-23-0/+524
| | | | | | | | | | | | | | | | SPEAr SoCs contain a serial memory interface controller. This controller is used to interface with spi based memories. This patch adds the driver for this IP. Signed-off-by: Vipin <vipin.kumar@st.com>
| * SPEAr : i2c driver support added for SPEAr SoCsVipin KUMAR2010-01-23-0/+332
| | | | | | | | | | | | | | SPEAr SoCs contain a synopsys i2c controller. This patch adds the driver for this IP. Signed-off-by: Vipin <vipin.kumar@st.com>
| * Kirkwood: Upgated licencing for files imported from linux source to GPLv2 or ↵Prafulla Wadaskar2010-01-23-8/+35
| | | | | | | | | | | | | | | | | | | | | | | | | | | | later These are few files directly imported from Linux kernel source. Those are not modifyed at all ar per strategy. These files contains source with GPLv2 only whereas u-boot expects GPLv2 or latter These files are updated for the same from prior permission from original writes Acked-by: Nicolas Pitre <nico@marvell.com> Signed-off-by: Prafulla Wadaskar <prafulla@marvell.com>
* | ppc4xx: Fix sending type 1 PCI transactionsFelix Radensky2010-01-23-1/+2
|/ | | | | | | | | | The list of 4xx SoCs that should send type 1 PCI transactions is not defined correctly. As a result PCI-PCI bridges and devices behind them are not identified. The following 4xx variants should send type 1 transactions: 440GX, 440GP, 440SP, 440SPE, 460EX and 460GT. Signed-off-by: Felix Radensky <felix@embedded-sol.com> Signed-off-by: Stefan Roese <sr@denx.de>
* MXC: Add large page oob layout for i.MX31 NAND controller.Magnus Lilja2010-01-19-0/+12
| | | | | | | | | | | | | Import the large page oob layout from Linux mxc_nand.c driver. The CONFIG_SYS_NAND_LARGEPAGE option is used to activate the large page oob layout. Run time detection is not supported as this moment. This has been tested on the i.MX31 PDK board with a large page NAND device. Signed-off-by: Magnus Lilja <lilja.magnus@gmail.com>
* mxc_nand: Update driver to work with i.MX31.Magnus Lilja2010-01-19-3/+31
| | | | | | Tested on i.MX31 Litekit. Signed-off-by: Magnus Lilja <lilja.magnus@gmail.com>
* netconsole: mark local funcs with staticMike Frysinger2010-01-18-5/+5
| | | | Signed-off-by: Mike Frysinger <vapier@gentoo.org>
* Merge branch 'master' of git://git.denx.de/u-boot-blackfinWolfgang Denk2010-01-17-460/+131
|\
| * Blackfin: bfin_spi: round up clock dividerCliff Cai2010-01-17-1/+6
| | | | | | | | | | | | | | | | If the requested clock cannot be exactly obtained, round it up so that we err on the side of slightly slower rather than slightly faster. Signed-off-by: Cliff Cai <cliff.cai@analog.com> Signed-off-by: Mike Frysinger <vapier@gentoo.org>
| * Blackfin: convert bfin_sdh to generic mmcCliff Cai2010-01-17-458/+120
| | | | | | | | | | Signed-off-by: Cliff Cai <cliff.cai@analog.com> Signed-off-by: Mike Frysinger <vapier@gentoo.org>
| * Blackfin: bfin_spi: let boards control idle valueCliff Cai2010-01-17-1/+5
| | | | | | | | | | | | | | Some SPI devices like to see high idle values rather than low. Signed-off-by: Cliff Cai <cliff.cai@analog.com> Signed-off-by: Mike Frysinger <vapier@gentoo.org>
* | PCIe, USB: Replace 'end point' references with 'endpoint'Peter Tyser2010-01-17-1/+1
|/ | | | | | | | | When referring to PCIe and USB 'endpoint' is the standard naming convention. Signed-off-by: Peter Tyser <ptyser@xes-inc.com> Acked-by: Stefan Roese <sr@denx.de> Acked-by: Remy Bohmer <linux@bohmer.net>
* Merge branch 'master' of git://git.denx.de/u-boot-armWolfgang Denk2010-01-12-25/+20
|\
| * Davinci: NAND enable ECC even when not in NAND boot modeNick Thompson2010-01-04-0/+2
| | | | | | | | | | | | | | | | | | | | | | | | Davinci: NAND enable ECC even when not in NAND boot mode On Davinci platforms, the default NAND device is enabled (for ECC) in low level boot code when NAND boot mode is used. If booting in another mode, NAND ECC is not enabled. The driver should make sure ECC is enabled regardless of boot mode if NAND is configured in U-Boot. Signed-off-by: Nick Thompson <nick.thompson@ge.com>
| * Davinci: Configurable NAND chip selectsNick Thompson2010-01-04-14/+11
| | | | | | | | | | | | | | | | | | | | Davinci: Configurable NAND chip selects Add a CONFIG_SYS_NAND_CS setting to all davinci configs and use it to setup the NAND controller in the davinci_nand mtd driver. Signed-off-by: Nick Thompson <nick.thompson@gefanuc.com>
| * TWL4030: make LEDs selectable for twl4030_led_init()Grazvydas Ignotas2010-01-04-11/+7
| | | | | | | | | | | | | | | | | | | | | | | | Not all boards have both LEDs hooked, so enabling both on boards with single LED will just waste power. Make it possible to choose LEDs by adding argument to twl4030_led_init(). Using this turn on only LEDB for pandora, leave both LEDs on for all other boards, as it was before this patch. Signed-off-by: Grazvydas Ignotas <notasas@gmail.com>
* | Merge branch 'master' of git://git.denx.de/u-boot-nand-flashWolfgang Denk2010-01-12-54/+146
|\ \
generated by cgit v1.1 at 2024-12-30 01:18:36 +0000