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* serial: sh: fix internal clock source on SCIFVladimir Barinov2015-02-25-2/+3
| | | | | | | | | | | | The formula to calculate SCIF BRR for R-Car H2/M2/E2 SoCs is as follows: BRR = pclk / (64 * 2^(2n-1) * baudrate) - 1, the prescaler is 0 due to SCSMR settings, hence n=0 Also SCSCR must be set to use internal or external clock source. Signed-off-by: Vladimir Barinov <vladimir.barinov@cogentembedded.com> Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
* serial: sh: Remove invalid UTF-8 characterNobuhiro Iwamatsu2015-02-25-1/+1
| | | | | | | | serial_sh.c contains invalid UTF-8 character. This deletes the character. Signed-off-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com> Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
* Merge branch 'master' of git://git.denx.de/u-boot-mmcTom Rini2015-02-23-14/+70
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| * mmc: sdhci: fix bus width switching on Samsung SoCsMatt Reimer2015-02-23-1/+2
| | | | | | | | | | | | | | | | | | | | | | | | Fix bus width switching from 8-bit mode down to 4-bit or 1-bit modes on Samsung SoCs using SDHCI_QUIRK_USE_WIDE8. These SoCs report controller version 2.0 yet they support 8-bit bus widths. If 8-bit mode was previously enabled and then an operation like "mmc dev" caused a switch back down to 4-bit or 1-bit mode, WIDE8 was left set, causing failures. This problem was manifested by "mmc dev" timing out. Signed-off-by: Matt Reimer <mreimer@sdgsystems.com>
| * mmc: print SD/eMMC type for inited mmc devicesPrzemyslaw Marczak2015-02-23-0/+8
| | | | | | | | | | | | | | | | | | | | | | | | Depending on the boot priority, the eMMC/SD cards, can be initialized with the same numbers for each boot. To be sure which mmc device is SD and which is eMMC, this info is printed by 'mmc list' command, when the init is done. Signed-off-by: Przemyslaw Marczak <p.marczak@samsung.com> Cc: Pantelis Antoniou <panto@antoniou-consulting.com>
| * mmc: exynos dwmmc: check boot mode before init dwmmcPrzemyslaw Marczak2015-02-23-1/+10
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Before this commit, the mmc devices were always registered in the same order. So dwmmc channel 0 was registered as mmc 0, channel 1 as mmc 1, etc. In case of possibility to boot from more then one device, the CONFIG_SYS_MMC_ENV_DEV should always point to right mmc device. This can be achieved by init boot device as first, so it will be always registered as mmc 0. Thanks to this, the 'saveenv' command will work fine for all mmc boot devices. Exynos based boards usually uses mmc host channels configuration: - 0, or 0+1 for 8 bit - as a default boot device (usually eMMC) - 2 for 4bit - as an optional boot device (usually SD card slot) And usually the boot order is defined by OM pin configuration, which can be changed in a few ways, eg. - Odroid U3 - eMMC card insertion -> first boot from eMMC - Odroid X2/XU3 - boot priority jumper By this commit, Exynos dwmmc driver will check the OM pin configuration, and then try to init the boot device and register it as mmc 0. Signed-off-by: Przemyslaw Marczak <p.marczak@samsung.com> Cc: Minkyu Kang <mk7.kang@samsung.com> Cc: Jaehoon Chung <jh80.chung@samsung.com> Cc: Pantelis Antoniou <panto@antoniou-consulting.com> Cc: Simon Glass <sjg@chromium.org> Cc: Akshay Saraswat <akshay.s@samsung.com>
| * sunxi: mmc: Always declare High Capacity capabilityHans de Goede2015-02-23-5/+1
| | | | | | | | | | | | | | | | | | High Capacity (e)MMC cards work fine on sun4i / sun5i, and not having this capability set causes u-boot to not recognize the eMMC on an Utoo P66 A13 tablet, so always set it thereby fixing this. Signed-off-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Ian Campbell <ijc@hellion.org.uk>
| * mmc: exynos_dw_mmc: use the exynos specific data structureJaehoon Chung2015-02-23-13/+47
| | | | | | | | | | | | | | | | Clksel value is exynos specific value. It removed "clksel_val" into dwmci_host and created the "dwmci_exynos_priv_data" structure for exynos specific data. Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com>
| * mmc: exynos_dw_mmc: set to clksel_val into board-init functionJaehoon Chung2015-02-23-0/+4
| | | | | | | | | | | | | | | | | | "clksel_val" is assigned to property of mmc or defined value. But it doesn't write at initial sequence. There is a reason that get the wrong source-clock value. This patch fixed it. Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com>
| * mmc: dw_mmc: fixed the wrong bit controlJaehoon Chung2015-02-23-1/+1
| | | | | | | | | | | | If mode is not DDR-mode, then it needs to clear it. Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com>
* | Merge git://git.denx.de/u-boot-sunxiTom Rini2015-02-21-6/+47
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| * sunxi: musb: Check Vbus-det before enabling otg port powerHans de Goede2015-02-21-0/+29
| | | | | | | | | | | | | | | | | | | | | | | | Sending out 5V when there is a charger connected to the otg port is not a good idea, so check for this and error out. Note this commit currently breaks otg support on the q8h tablets, as we need to do some magic with the pmic there to get vbus info, this is deliberate (better safe then sorry), fixing this is on my TODO list. Signed-off-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Ian Campbell <ijc@hellion.org.uk>
| * sunxi: mmc: Always declare High Capacity capabilityHans de Goede2015-02-21-5/+1
| | | | | | | | | | | | | | | | | | High Capacity (e)MMC cards work fine on sun4i / sun5i, and not having this capability set causes u-boot to not recognize the eMMC on an Utoo P66 A13 tablet, so always set it thereby fixing this. Signed-off-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Ian Campbell <ijc@hellion.org.uk>
| * sunxi: video: Add support for tl059wv5c0 lcd panelsHans de Goede2015-02-20-0/+7
| | | | | | | | | | | | | | | | Add support for the 6" 480x800 tl059wv5c0 panel used on e.g. Utoo P66 and Aigo M60/M608/M606 tablets. Signed-off-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Ian Campbell <ijc@hellion.org.uk>
| * sunxi: video: Add support for LCD reset pinHans de Goede2015-02-20-1/+10
| | | | | | | | | | | | | | On some boards there is a gpio to reset the LCD panel, add support for this. Signed-off-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Ian Campbell <ijc@hellion.org.uk>
* | serial: ns16550: Support debug UARTSimon Glass2015-02-19-2/+61
| | | | | | | | | | | | | | | | Add debug UART functions to permit ns16550 to provide an early debug UART. Try to avoid using the stack so that this can be called from assembler before a stack is set up (at least on ARM and PowerPC). Signed-off-by: Simon Glass <sjg@chromium.org>
* | serial: ns16550: Add access functions that don't need platdataSimon Glass2015-02-19-18/+30
| | | | | | | | | | | | | | | | For the debug UART we need to be able to provide any parameters before driver model is set up. Add parameters to the low-level access functions to make this possible. Signed-off-by: Simon Glass <sjg@chromium.org>
* | serial: Support an early UART for debuggingSimon Glass2015-02-19-0/+46
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This came up in a discussion on the mailing list here: https://patchwork.ozlabs.org/patch/384613/ My concerns at the time were: - it doesn't need to be written in assembler - it doesn't need to be ARM-specific This patch provides a possible alternative. It works by allowing any serial driver to export one init function and provide a putc() function. These can be used to output debug data before the real serial driver is available. This implementation does not depend on driver model, and it is possible for it to operate without a stack on some architectures (e.g. PowerPC, ARM). It provides the same features as the ARM-specific debug.S but with more UART and architecture support. Signed-off-by: Simon Glass <sjg@chromium.org>
* | dm: Move CONFIG_I2C_COMPAT to KconfigSimon Glass2015-02-19-0/+9
| | | | | | | | | | | | | | | | | | Make this option available in Kconfig and clean up the board that uses it. Note there is also an entry in exynos5-common.h but this affects multiple boards and should be dropped as part of the Samsung I2C migration to driver model. Signed-off-by: Simon Glass <sjg@chromium.org>
* | dm: cros_ec: Convert to KconfigSimon Glass2015-02-19-1/+53
|/ | | | | | | | | Since both I2C and SPI are converted to Kconfig, we can convert cros_ec to Kconfig for these buses. LPC will need to wait until driver mode PCI is available. Signed-off-by: Simon Glass <sjg@chromium.org>
* Merge branch 'master' of http://git.denx.de/u-boot-sunxiTom Rini2015-02-17-16/+33
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| * sunxi: otg: Fix peripheral modeHans de Goede2015-02-16-12/+1
| | | | | | | | | | | | | | | | Peripheral mode needs us to signal vusb high to the phy for it to work, just like the host mode does. Signed-off-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Ian Campbell <ijc@hellion.org.uk>
| * sunxi: video: Dynamically reserve framebuffer memoryHans de Goede2015-02-16-5/+13
| | | | | | | | | | | | | | | | | | | | Only use CONFIG_SUNXI_MAX_FB_SIZE to reserve memory at the top when relocating u-boot, and calculate the actual amount of memory necessary when setting up the video-mode and use only that, freeing up some additional memory for use by the kernel. Signed-off-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Ian Campbell <ijc@hellion.org.uk>
| * sunxi: video: Do not use CONFIG_SYS_MEM_TOP_HIDE for the framebufferHans de Goede2015-02-16-1/+21
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Do not use CONFIG_SYS_MEM_TOP_HIDE for the framebuffer, instead override board_get_usable_ram_top to make sure that u-boot is not relocated into the area where we want to use the framebuffer, and patch the devicetree from sunxi_simplefb_setup() to tell the kernel to not touch the framebuffer. This makes u-boot properly see the framebuffer as dram, and initalize the level 2 cache for it, fixing the very slow cfb scrolling problem. As an added bonus this stops us from reserving the framebuffer when simplefb is not used because an older kernel is booted, or hdp is used and no hdmi cable was plugged in, freeing up the memory for kernel use in these cases. Reported-by: Siarhei Siamashka <siarhei.siamashka@gmail.com> Signed-off-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Ian Campbell <ijc@hellion.org.uk>
* | PCI: add 64-bit prefetchable memory supportDavid Feng2015-02-16-1/+35
| | | | | | | | | | | | | | | | | | | | | | PCI specification allow prefetchable memory to be 32-bit or 64-bit. PCI express specification states that all memmory bars for prefetchable memory must be implemented as 64-bit. They all require that 64 bit prefetchble memory are suported especially when u-boot is ported to more and more 64bit processors. Signed-off-by: David Feng <fenghua@phytium.com.cn> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
* | net: keystone_net: move serdes setup to initialization functionVitaly Andrianov2015-02-16-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | On Keystone2 devices serdes must be initialized before accessing MDIO bus. This commit moves the keystone2_net_serdes_setup() from keystone2_eth_open to keystone2_emac_initialize to meet that requirement. This also eliminates unnecessary serdes initializatin every time when the keystone2_eth_open is being called. Signed-off-by: Vitaly Andrianov <vitalya@ti.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com> Tested-by: Nishanth Menon <nm@ti.com>
* | mtd, omap: fix case NAND_OMAP_GPMC_PREFETCH not definedEgli, Samuel2015-02-16-1/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The patch c316f577b4b72d1a1aeb559e9b3fad20808f1ffd breaks siemens boards because prefetch mode is not enabled. I assume it breaks other boards as well that don't use prefetch. This patch sets read_buf to nand_read_buf if NAND_OMAP_GPMC_PREFETCH is not defined. Signed-off-by: Samuel Egli <samuel.egli@siemens.com> CC: Daniel Mack <zonque@gmail.com> CC: Guido Martínez <guido@vanguardiasur.com.ar> CC: Tom Rini <trini@ti.com> CC: Heiko Schocher <hs@denx.de>
* | dm: Add support for all targets which requires MANUAL_RELOCMichal Simek2015-02-12-0/+80
| | | | | | | | | | | | | | | | | | | | Targets with CONFIG_NEEDS_MANUAL_RELOC do not use REL/RELA relocation (mostly only GOT) where functions aray are not updated. This patch is fixing function pointers for DM core and serial-uclass to ensure that relocated functions are called. Signed-off-by: Michal Simek <michal.simek@xilinx.com> Acked-by: Simon Glass <sjg@chromium.org>
* | dm:gpio:mxc add DT supportPeng Fan2015-02-12-17/+64
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch add DT support for mxc gpio driver. There are one place using CONFIG_OF_CONTROL macro. 1. The U_BOOT_DEVICES and mxc_plat array are complied out. To DT, platdata is alloced using calloc, so there is no need to use mxc_plat. The following situations are tested, and all work fine: 1. with DM, without DT 2. with DM and DT 3. without DM Since device tree has not been upstreamed, if want to test this patch. The followings need to be done. + pieces of code does not gpio_request when using gpio_direction_xxx and etc, need to request gpio. + move the gpio settings from board_early_init_f to board_init + define CONFIG_DM ,CONFIG_DM_GPIO and CONFIG_OF_CONTROL + Add device tree file and do related configuration in `make ARCH=arm menuconfig` These will be done in future patches by step. Signed-off-by: Peng Fan <Peng.Fan@freescale.com> Acked-by: Igor Grinberg <grinberg@compulab.co.il> Acked-by: Simon Glass <sjg@chromium.org>
* | dm:gpio:mxc add a bank_index entry in platdataPeng Fan2015-02-12-8/+9
| | | | | | | | | | | | | | | | | | | | | | Add a new entry in platdata structure and intialize bank_index in mxc_plat array. This new entry can avoid using `plat - mxc_plat` by using `plat->bank_index`. Signed-off-by: Peng Fan <Peng.Fan@freescale.com> Acked-by: Igor Grinberg <grinberg@compulab.co.il> Acked-by: Simon Glass <sjg@chromium.org>
* | dm: introduce dev_get_addr interfacePeng Fan2015-02-12-0/+12
| | | | | | | | | | | | | | | | | | Abstracting dev_get_addr can improve drivers that want to get device's address. Signed-off-by: Peng Fan <Peng.Fan@freescale.com> Acked-by: Igor Grinberg <grinberg@compulab.co.il> Acked-by: Simon Glass <sjg@chromium.org>
* | dm: sh: serial: Add support driver modelNobuhiro Iwamatsu2015-02-12-113/+238
| | | | | | | | | | | | | | | | This adds driver model support with this driver. This was tested by Koelsch board and Gose board. Signed-off-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com> Acked-by: Simon Glass <sjg@chromium.org>
* | dm: Add Kconfig options for driver model SPL supportSimon Glass2015-02-12-0/+44
| | | | | | | | | | | | | | The SPL support cannot be enabled yet, but we can add the Kconfig options in preparation for this. Signed-off-by: Simon Glass <sjg@chromium.org>
* | dm: Expand and complete Kconfig in drivers/Simon Glass2015-02-12-10/+65
| | | | | | | | | | | | | | | | Expand the help messages for each driver. Add missing Kconfig for I2C, SPI flash and thermal. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
* | dm: Add Kconfig for driver/demoSimon Glass2015-02-12-0/+28
| | | | | | | | | | | | | | Add a suitable Kconfig for this directory. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
* | dm: i2c: Make API accessible even without CONFIG_DMSimon Glass2015-02-12-16/+16
| | | | | | | | | | | | | | | | | | | | | | | | Make the driver model I2C API available always, even if driver model is not enabled. This allows for a 'soft' switch-over, where drivers can use the new structures in code which is compiled but not yet used. This makes migration easier in some cases. Fix up the existing drivers which define their own 'struct i2c_msg'. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Heiko Schocher <hs@denx.de>
* | dm: i2c: Add a dm_ prefix to driver model bus speed functionsSimon Glass2015-02-12-8/+3
| | | | | | | | | | | | | | | | As with i2c_read() and i2c_write(), add a dm_ prefix to the driver model versions of these functions to avoid conflicts. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Heiko Schocher <hs@denx.de>
* | powerpc: Add serial driver for driver modelSimon Glass2015-02-12-0/+41
| | | | | | | | | | | | | | This uses the ns16550 driver but sets up the clock at run-time. It does not seem to be available in the device tree. Signed-off-by: Simon Glass <sjg@chromium.org>
* | i2c: s3c24x0: reduce transmission status timeoutPrzemyslaw Marczak2015-02-12-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | If no device is connected to I2C bus, the i2c probe command can take a lot of time for probe each address. This commit reduces the busy timeout to 10ms for standard and high speed modes. This doesn't break the transmission an also allow for properly probe the devices. Signed-off-by: Przemyslaw Marczak <p.marczak@samsung.com> Changes v3: - new commit, after split the next one Tested-by: Simon Glass <sjg@chromium.org>
* | gpio: omap: Pass correct argument to _get_gpio_direction()Axel Lin2015-02-12-1/+1
| | | | | | | | | | | | | | Pass bank rather than bank->base to _get_gpio_direction(). Signed-off-by: Axel Lin <axel.lin@ingics.com> Acked-by: Simon Glass <sjg@chromium.org>
* | gpio: at91: Fix getting address of private dataAxel Lin2015-02-12-5/+5
|/ | | | | | | | Use dev_get_priv() rather than dev_get_platdata() to get correct address of private data. Signed-off-by: Axel Lin <axel.lin@ingics.com> Acked-by: Simon Glass <sjg@chromium.org>
* Merge branch 'master' of git://git.denx.de/u-boot-x86Tom Rini2015-02-10-83/+228
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| * x86: Add SPI support to quark/galileoBin Meng2015-02-06-1/+2
| | | | | | | | | | | | | | | | | | | | The Quark SoC contains a legacy SPI controller in the legacy bridge which is ICH7 compatible. Like Tunnel Creek and BayTrail, the BIOS control register offset in the ICH SPI driver is wrong for the Quark SoC too, unprotect_spi_flash() is added to enable the flash write. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Acked-by: Simon Glass <sjg@chromium.org>
| * x86: spi: Support ValleyView in ICH SPI driverSimon Glass2015-02-06-20/+47
| | | | | | | | | | | | | | | | The base address is found in a different way and the protection bit is also in a different place. Otherwise it is very similar. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
| * x86: mmc: Move common FSP functions into a common fileSimon Glass2015-02-06-0/+43
| | | | | | | | | | | | | | | | | | | | | | | | Since these board functions seem to be the same for all boards which use FSP, move them into a common file. We can adjust this later if future FSPs need more flexibility. This creates a generic PCI MMC device. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Tested-by: Bin Meng <bmeng.cn@gmail.com>
| * x86: bootstage: Add time measurement for vesa start-upSimon Glass2015-02-05-0/+2
| | | | | | | | | | | | | | | | Since we must run a PCI BIOS ROM, and this can take a calamitous amount of time, measure it using bootstage. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
| * x86: video: Allow video ROM execution to fall back to the other methodSimon Glass2015-02-05-10/+28
| | | | | | | | | | | | | | | | If the BIOS emulator is not available, allow use of native execution if available, and vice versa. This can be controlled by the caller. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
| * usb: pci: Add XHCI driver for PCISimon Glass2015-02-05-0/+61
| | | | | | | | | | | | | | | | Add a driver which locates the available XHCI controllers on the PCI bus and makes them available. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
| * usb: pci: Use pci_find_class() to find the deviceSimon Glass2015-02-05-52/+1
| | | | | | | | | | | | | | Use the new utility function instead of local code. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
| * x86: video: Enable video for Minnowboard MaxSimon Glass2015-02-05-0/+1
| | | | | | | | | | | | | | This board uses a new PCI ID. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
generated by cgit v1.1 at 2024-11-09 08:10:39 +0000