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* arm: mvebu: drivers/ddr: Add DDR3 driver with training code from Marvell bin_hdrStefan Roese2015-02-06-0/+15419
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch adds the DDR3 setup and training code taken from the Marvell U-Boot repository. This code used to be included as a binary (bin_hdr) into the AXP boot image. Not linked with the main U-Boot. With this code addition and the following serdes/PHY setup code, the Armada-XP support in mainline U-Boot is finally self-contained. So the complete image for booting can be built from mainline U-Boot. Without any additional external inclusion. Hopefully other MVEBU SoC's will follow here. Support for some SoC's has been removed in this version. This is: MV_MSYS: The code referred to by the MV_MSYS define is currently unused. And its not really planned to support this in mainline. So lets remove it to make the code clearer and increase the readability. MV88F68XX (A38x): The code referred to by the MV88F68XX define (A38x) is currently unused. And its partial and not sufficient for this device in this stage. So lets remove it to make the code clearer and increase the readability. MV88F66XX (ALP): The code referred to by the MV88F66XX define is currently unused. And its not really planned to support this in mainline. So lets remove it to make the code clearer and increase the readability. MV88F78X60_Z1: The code referred to by the MV88F78X60_Z1 define is currently unused. As the Z1 revision of the AXP is not supported in mainline anymore. So lets remove it to make the code clearer and increase the readability. Remove support for Z1 & A0 AXP revisions (steppings). The current stepping is B0 and this is the only one that is actively supported in this code version. Tested on AXP using a SPD DIMM setup on the Marvell DB-MV784MP-GP board and on a custom fixed DDR configuration board (maxbcm). Note: This code has undergone many hours of coding-style cleanup and refactoring. It still is not checkpatch clean though, I'm afraid. As the factoring of the code has so many levels of indentation that many lines are longer than 80 chars. This might be some task to tackly later on. Signed-off-by: Stefan Roese <sr@denx.de> Reviewed-by: Luka Perkov <luka.perkov@sartura.hr>
* Merge branch 'master' of git://git.denx.de/u-boot-ubiTom Rini2015-02-04-0/+8
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| * ubi: reset mtd_devs when ubi part failHeiko Schocher2015-01-28-0/+8
| | | | | | | | | | | | | | if "ubi part" fails, reset also mtd_devs to 0, as further "ubi part" would use wrong mtd_devs. Signed-off-by: Heiko Schocher <hs@denx.de>
* | Merge branch 'master' of git://git.denx.de/u-boot-tiTom Rini2015-02-02-0/+4
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| * | omap3: mmc: add 1.8v bias setting for MMC1Albert ARIBAUD \(3ADEV\)2015-01-29-0/+4
| |/ | | | | | | Signed-off-by: Albert ARIBAUD (3ADEV) <albert.aribaud@3adev.fr>
* | Merge branch 'master' of git://git.denx.de/u-boot-sunxiTom Rini2015-02-02-13/+17
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| * | sunxi: mmc: Add 'sunxi_' prefix to the static functionsSiarhei Siamashka2015-02-02-7/+7
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This results in a much more readable callgraph, because now they can't be confused with the function having exactly the same name in the generic mmc code. Signed-off-by: Siarhei Siamashka <siarhei.siamashka@gmail.com> Acked-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Hans de Goede <hdegoede@redhat.com>
| * | sunxi: video: Force h/vsync active high when using ext. vga dac on some boardsHans de Goede2015-02-02-3/+9
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | On both my A13-OLinuxIno and my A13-OLinuxIno-Micro, the vga output gives an unstable image when active low v or hsync is used. The problem seems to be specific to the OLinuxIno A13 (normal & micro) boards. I've just looked up the schematics and they use an opendrain driver for the vga sync lines, and with sync pulses it is the logical high->low edge of the pulse which counts for the timing, which with an active low sync is being driven by the pull-up, and that simply seems to not drive it hard enough to get a stable image. So force v and hsync active high on these boards. independent of what the modeline says. This fixes the unstable image. Signed-off-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Ian Campbell <ijc@hellion.org.uk>
| * | sunxi: rsb: Move rsb_set_device_mode() call to rsb_init()Hans de Goede2015-02-02-3/+1
| |/ | | | | | | | | | | | | | | It turns out that the device_mode_data is rsb specific, rather then slave specific, so integrate the rsb_set_device_mode() call into rsb_init(). Signed-off-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Ian Campbell <ijc@hellion.org.uk>
* | Merge branch 'master' of git://git.denx.de/u-boot-netTom Rini2015-01-31-2/+93
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| * | net/designware: add error message on DMA reset timeoutAlexey Brodkin2015-01-30-1/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | If for some reason DMA module fails to reset user oserves only this: --->--- # dhcp Trying dwmac.e0018000 FAIL --->--- This message makes not much sense. With proposed change error message will be more helpful: --->--- # dhcp Trying dwmac.e0018000 DMA reset timeout FAIL --->--- For example user may do power toggle to recover board functionality. Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com> Cc: Chin Liang See <clsee@altera.com> Cc: Dinh Nguyen <dinguyen@altera.com> Cc: Albert Aribaud <albert.u.boot@aribaud.net> Cc: Tom Rini <trini@ti.com> Cc: Wolfgang Denk <wd@denx.de> Cc: Pavel Machek <pavel@denx.de> Cc: Joe Hershberger <joe.hershberger@gmail.com> Cc: Ian Campbell <ijc@hellion.org.uk> Cc: Marek Vasut <marex@denx.de> Reviewed-by: Tom Rini <trini@ti.com> Acked-by: Pavel Machek <pavel@denx.de> Acked-by: Joe Hershberger <joe.hershberger@ni.com> Signed-off-by: Joe Hershberger <joe.hershberger@ni.com>
| * | net: phy: micrel: add support for KSZ8895 switch in SMI modePhilippe De Muyter2015-01-30-0/+58
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch adds a phy driver for the Micrel KSZ8895 switch. As the SoC MAC is directly connected to the switch MAC the link to the switch is always up. But the KSZ8895 switch can be hardwired in three configuration modes : - not configurable with eventually an eeprom-stored configuration - configurable by the mdio/mdc connection (SMI protocol) - configurable by a SPI connection. In not configurable mode, the switch starts automatically, but in the other modes, it must be started programmatically, by writing 1 in configuration register 1. We only support the not configurable and mdio/mdc (aka SMI) modes here. Signed-off-by: Philippe De Muyter <phdm@macqel.be> Cc: Christian Gmeiner <christian.gmeiner@gmail.com> Signed-off-by: Joe Hershberger <joe.hershberger@ni.com>
| * | Add MS7206SE ethernet supportYoshinori Sato2015-01-30-1/+30
| | | | | | | | | | | | | | | Signed-off-by: Yoshinori Sato <ysato@users.sourceforge.jp> Signed-off-by: Joe Hershberger <joe.hershberger@ni.com>
| * | net: tsec: Fix NULL access in case init_phy() failsClaudiu Manoil2015-01-30-0/+2
| |/ | | | | | | | | | | | | | | If the PHY is not recognized don't access phydev (NULL) and return 0 to signal failure. Signed-off-by: Claudiu Manoil <claudiu.manoil@freescale.com> Signed-off-by: Joe Hershberger <joe.hershberger@ni.com>
* | Merge branch 'master' of git://git.denx.de/u-boot-dmTom Rini2015-01-30-569/+2016
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| * | dm: cros_ec: Convert cros_ec_i2c over to driver modelSimon Glass2015-01-29-53/+29
| | | | | | | | | | | | | | | | | | | | | Move this driver to use driver model and update the snow configuration to match. Signed-off-by: Simon Glass <sjg@chromium.org>
| * | dm: i2c: Add two more I2C init functions to the compatibility layerSimon Glass2015-01-29-2/+12
| | | | | | | | | | | | | | | | | | | | | | | | These functions are useful in case the board calls them. Also fix a missing parameter caused by applying the wrong patch (actually I failed to send v2 and applied v1 by mistake). Signed-off-by: Simon Glass <sjg@chromium.org>
| * | dm: i2c: dts: Support an offset-len device tree propertySimon Glass2015-01-29-1/+2
| | | | | | | | | | | | | | | | | | | | | Since U-Boot can support different offset lengths (0-4 bytes), add a device tree property to specify this. This avoids hard-coding it in the driver. Signed-off-by: Simon Glass <sjg@chromium.org>
| * | dm: i2c: s3c24x0: adjust to dm-i2c apiPrzemyslaw Marczak2015-01-29-43/+194
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This commit adjusts the s3c24x0 driver to new i2c api based on driver-model. The driver supports standard and high-speed i2c as previous. Tested on Trats2, Odroid U3, Arndale, Odroid XU3 Signed-off-by: Przemyslaw Marczak <p.marczak@samsung.com> Tested-by: Simon Glass <sjg@chromium.org> Cc: Simon Glass <sjg@chromium.org> Cc: Heiko Schocher <hs@denx.de> Cc: Minkyu Kang <mk7.kang@samsung.com> Acked-by: Simon Glass <sjg@chromium.org>
| * | dm: i2c-uclass-compat: fix missed argumentPrzemyslaw Marczak2015-01-29-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | This patch fixes build error for CONFIG_DM_I2C_COMPAT. In i2c_get_chip_for_busnum() call, one of argument was missed, which was offset_len. Now it is set to 'alen' as previous. Signed-off-by: Przemyslaw Marczak <p.marczak@samsung.com> Acked-by: Simon Glass <sjg@chromium.org>
| * | DM: crypto/fsl - Add Freescale rsa DM driverRuchika Gupta2015-01-29-0/+129
| | | | | | | | | | | | | | | | | | | | | | | | | | | Driver added for RSA Modular Exponentiation using Freescale Hardware Accelerator CAAM. The driver uses UCLASS_MOD_EXP Signed-off-by: Ruchika Gupta <ruchika.gupta@freescale.com> CC: Simon Glass <sjg@chromium.org> Acked-by: Simon Glass <sjg@chromium.org>
| * | DM: crypto/rsa_mod_exp: Add rsa Modular Exponentiation DM driverRuchika Gupta2015-01-29-0/+83
| | | | | | | | | | | | | | | | | | | | | | | | | | | Add a new rsa uclass for performing modular exponentiation and implement the software driver basing on this uclass. Signed-off-by: Ruchika Gupta <ruchika.gupta@freescale.com> CC: Simon Glass <sjg@chromium.org> Acked-by: Simon Glass <sjg@chromium.org>
| * | dm: cros_ec_spi: Remove old pre-driver-model codeSimon Glass2015-01-29-49/+2
| | | | | | | | | | | | | | | | | | This is no-longer needed since all platforms use SPI for cros_ec. Signed-off-by: Simon Glass <sjg@chromium.org>
| * | dm: cros_ec: Don't require protocol 3 supportSimon Glass2015-01-29-4/+6
| | | | | | | | | | | | | | | | | | | | | | | | I2C is now deprecated on ARM platforms and there are no devices that use it with the v3 protocol. We can't require v3 support if we want to support I2C. Adjust the error handling to suit. Signed-off-by: Simon Glass <sjg@chromium.org>
| * | dm: core: Ignore disabled devices when bindingSimon Glass2015-01-29-0/+5
| | | | | | | | | | | | | | | | | | | | | We don't want to bind devices which should never be used. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
| * | dm: i2c: Move slave details to child platdataSimon Glass2015-01-29-87/+39
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | At present we go through various contortions to store the I2C's chip address in its private data. This only exists when the chip is active so must be set up when it is probed. Until the device is probed we don't actually record what address it will appear on. However, now that we can support per-child platform data, we can use that instead. This allows us to set up the address when the child is bound, and avoid the messy contortions. Unfortunately this is a fairly large change and it seems to be difficult to break it down further. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
| * | dm: spi: Move slave details to child platdataSimon Glass2015-01-29-63/+56
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | At present we go through various contortions to store the SPI slave's chip select in its private data. This only exists when the slave is active so must be set up when it is probed. Until the device is probed we don't actually know what chip select it will appear on. However, now that we can support per-child platform data, we can use that instead. This allows us to set up the chip select when the child is bound, and avoid the messy contortions. Unfortunately this is a fairly large change and it seems to be difficult to break it down further. Signed-off-by: Simon Glass <sjg@chromium.org>
| * | dm: spi: Set up the spi_slave device pointer in child_pre_probe()Simon Glass2015-01-29-0/+10
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | At present we use struct spi_slave as our device pointer in a lot of places to avoid changing the old SPI API. At some point this will go away. But for now, it is better if the SPI uclass sets up this pointer, rather than relying on passing it into the device when it is probed. We can use the new uclass child_pre_probe() method to do this. Signed-off-by: Simon Glass <sjg@chromium.org>
| * | dm: core: Allow uclass to set up a device's child before it is probedSimon Glass2015-01-29-0/+17
| | | | | | | | | | | | | | | | | | | | | | | | | | | Some buses need to set up their devices before they can be used. This setup may well be common to all buses in a particular uclass. Support a common pre-probe method for the uclass, called before any bus devices are probed. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
| * | dm: sandbox: sf: Tidy up the error handling in sandbox_sf_probe()Simon Glass2015-01-29-2/+5
| | | | | | | | | | | | | | | | | | Use a single exit point when we have an error and add debugging there. Signed-off-by: Simon Glass <sjg@chromium.org>
| * | dm: core: Allow the uclass to set up a device's child after bindingSimon Glass2015-01-29-5/+16
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | For buses, after a child is bound, allow the uclass to perform some processing. This can be used to figure out the address of the child (e.g. the chip select for SPI slaves) so that it is ready to be probed. This avoids bus drivers having to repeat the same process, which really should be done by the uclass, since it is common. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
| * | dm: spi: Move the per-child data size to the uclassSimon Glass2015-01-29-8/+1
| | | | | | | | | | | | | | | | | | | | | | | | This is common to all SPI drivers and specifies a structure used by the uclass. It makes more sense to define it in the uclass. Reviewed-by: Masahiro Yamada <yamada.m@jp.panasonic.com> Signed-off-by: Simon Glass <sjg@chromium.org>
| * | dm: core: Allow uclasses to specify private data for a device's childrenSimon Glass2015-01-29-0/+8
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | In many cases the per-child private data for a device's children is defined by the uclass rather than the individual driver. For example, a SPI bus needs to store information about each of its children, but all SPI drivers store the same information. It makes sense to allow the uclass to define this data. If the driver provides a size value for its per-child private data, then use it. Failng that, fall back to that provided by the uclass. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
| * | dm: core: Add a flag to control sequence numberingSimon Glass2015-01-29-15/+16
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | At present we try to use the 'reg' property and device tree aliases to give devices a sequence number. The 'reg' property is often actually a memory address, so the sequence numbers thus-obtained are not useful. It would be better if the devices were just sequentially numbered in that case. In fact neither I2C nor SPI use this feature, so drop it. Some devices need us to look up an alias to number them within the uclass. Add a flag to control this, so it is not done unless it is needed. Adjust the tests to test this new behaviour. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
| * | dm: core: Add a function to get a device's uclass IDSimon Glass2015-01-29-0/+5
| | | | | | | | | | | | | | | | | | | | | This is useful to check which uclass a device is in. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
| * | dm: core: Add a post_bind method for parentsSimon Glass2015-01-29-0/+12
| | | | | | | | | | | | | | | | | | | | | | | | Allow parent drivers to be called when a new child is bound to them. This allows a bus to set up information it needs for that child. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
| * | dm: core: Allow uclasses to specify platdata for a device's childrenSimon Glass2015-01-29-0/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | In many cases the child platform data for a device's children is defined by the uclass rather than the individual devices. For example, a SPI bus needs to know the chip select and speed for each of its children. It makes sense to allow this information to be defined the SPI uclass rather than each individual driver. If the device provides a size value for its child platdata, then use it. Failng that, fall back to that provided by the uclass. Reviewed-by: Masahiro Yamada <yamada.m@jp.panasonic.com> Signed-off-by: Simon Glass <sjg@chromium.org>
| * | dm: core: Allow parents to have platform data for their childrenSimon Glass2015-01-29-2/+32
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | For buses it is common for parents to need to know the address of the child on the bus, the bus speed to use for that child, and other information. This can be provided in platform data attached to each child. Add driver model support for this, including auto-allocation which can be requested using a new property to specify the size of the data. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
| * | dm: core: Allocate platform data when binding a deviceSimon Glass2015-01-29-13/+17
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | When using allocated platform data, allocate it when we bind the device. This makes it possible to fill in this information before the device is probed. This fits with the platform data model (when not using device tree), since platform data exists at bind-time. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
| * | dm: core: Tidy up error handling in device_bind()Simon Glass2015-01-29-8/+10
| | | | | | | | | | | | | | | | | | | | | | | | Make the error handling more standard to make it easier to build on top of it. Also correct a bug in the error path where there is no parent. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
| * | dm: core: Set device tree node for root deviceSimon Glass2015-01-29-0/+3
| | | | | | | | | | | | | | | | | | | | | The root device corresponds to the root device tree node, so set this up. Also add a few notes to the documentation. Signed-off-by: Simon Glass <sjg@chromium.org>
| * | dm: i2c: Provide an offset length parameter where neededSimon Glass2015-01-29-9/+11
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Rather than assuming that the chip offset length is 1, allow it to be provided. This allows chips that don't use the default offset length to be used (at present they are only supported by the command line 'i2c' command which sets the offset length explicitly). Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Heiko Schocher <hs@denx.de>
| * | dm: i2c: Add a compatbility layerSimon Glass2015-01-29-0/+99
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | For boards which use multiple I2C devices, or for SOCs which support multiple boards, we might want to convert these to driver model at different times. At present this is difficult because we need to either use CONFIG_DM_I2C for a board or not. Add a compatibility layer which implements the old API, thus allowing a board to move to driver model for I2C without requiring that everything it uses is moved in the same commit. Signed-off-by: Simon Glass <sjg@chromium.org>
| * | dm: i2c: Rename driver model I2C functions to permit compatibilitySimon Glass2015-01-29-8/+9
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add a dm_ prefix to driver model I2C functions so that we can keep the old ones around. This is a little unfortunate, but on reflection it is too difficult to change the API. We can undo this rename when most boards and drivers are converted to use driver model for I2C. Signed-off-by: Simon Glass <sjg@chromium.org>
| * | dm: spi: Remove use of fdtdec GPIO supportSimon Glass2015-01-29-34/+28
| | | | | | | | | | | | | | | | | | These functions are going away, so use the new uclass support instead. Signed-off-by: Simon Glass <sjg@chromium.org>
| * | dm: usb: Remove use of fdtdec GPIO supportSimon Glass2015-01-29-30/+28
| | | | | | | | | | | | | | | | | | These functions are going away, so use the new uclass support instead. Signed-off-by: Simon Glass <sjg@chromium.org>
| * | dm: mmc: Remove use of fdtdec GPIO supportSimon Glass2015-01-29-35/+21
| | | | | | | | | | | | | | | | | | These functions are going away, so use the new uclass support instead. Signed-off-by: Simon Glass <sjg@chromium.org>
| * | dm: tegra: nand: Remove use of fdtdec GPIO supportSimon Glass2015-01-29-5/+4
| | | | | | | | | | | | | | | | | | These functions are going away, so use the new uclass support instead. Signed-off-by: Simon Glass <sjg@chromium.org>
| * | dm: tegra: video: Remove use of fdtdec GPIO supportSimon Glass2015-01-29-34/+20
| | | | | | | | | | | | | | | | | | These functions are going away, so use the new uclass support instead. Signed-off-by: Simon Glass <sjg@chromium.org>
| * | dm: exynos: Add a GPIO translation functionSimon Glass2015-01-29-1/+12
| | | | | | | | | | | | | | | | | | | | | | | | This deals with the polarity bit. It also changes the GPIO devices so that the correct device tree node is linked to each one. This allows us to use the new uclass phandle functionality to implement a proper GPIO binding. Signed-off-by: Simon Glass <sjg@chromium.org>
generated by cgit v1.1 at 2024-11-07 06:52:29 +0000