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* dm: cros_ec_spi: Remove old pre-driver-model codeSimon Glass2015-01-29-49/+2
| | | | | | This is no-longer needed since all platforms use SPI for cros_ec. Signed-off-by: Simon Glass <sjg@chromium.org>
* dm: cros_ec: Don't require protocol 3 supportSimon Glass2015-01-29-4/+6
| | | | | | | | I2C is now deprecated on ARM platforms and there are no devices that use it with the v3 protocol. We can't require v3 support if we want to support I2C. Adjust the error handling to suit. Signed-off-by: Simon Glass <sjg@chromium.org>
* dm: core: Ignore disabled devices when bindingSimon Glass2015-01-29-0/+5
| | | | | | | We don't want to bind devices which should never be used. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
* dm: i2c: Move slave details to child platdataSimon Glass2015-01-29-87/+39
| | | | | | | | | | | | | | | | | At present we go through various contortions to store the I2C's chip address in its private data. This only exists when the chip is active so must be set up when it is probed. Until the device is probed we don't actually record what address it will appear on. However, now that we can support per-child platform data, we can use that instead. This allows us to set up the address when the child is bound, and avoid the messy contortions. Unfortunately this is a fairly large change and it seems to be difficult to break it down further. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
* dm: spi: Move slave details to child platdataSimon Glass2015-01-29-63/+56
| | | | | | | | | | | | | | | | At present we go through various contortions to store the SPI slave's chip select in its private data. This only exists when the slave is active so must be set up when it is probed. Until the device is probed we don't actually know what chip select it will appear on. However, now that we can support per-child platform data, we can use that instead. This allows us to set up the chip select when the child is bound, and avoid the messy contortions. Unfortunately this is a fairly large change and it seems to be difficult to break it down further. Signed-off-by: Simon Glass <sjg@chromium.org>
* dm: spi: Set up the spi_slave device pointer in child_pre_probe()Simon Glass2015-01-29-0/+10
| | | | | | | | | | | At present we use struct spi_slave as our device pointer in a lot of places to avoid changing the old SPI API. At some point this will go away. But for now, it is better if the SPI uclass sets up this pointer, rather than relying on passing it into the device when it is probed. We can use the new uclass child_pre_probe() method to do this. Signed-off-by: Simon Glass <sjg@chromium.org>
* dm: core: Allow uclass to set up a device's child before it is probedSimon Glass2015-01-29-0/+17
| | | | | | | | | Some buses need to set up their devices before they can be used. This setup may well be common to all buses in a particular uclass. Support a common pre-probe method for the uclass, called before any bus devices are probed. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
* dm: sandbox: sf: Tidy up the error handling in sandbox_sf_probe()Simon Glass2015-01-29-2/+5
| | | | | | Use a single exit point when we have an error and add debugging there. Signed-off-by: Simon Glass <sjg@chromium.org>
* dm: core: Allow the uclass to set up a device's child after bindingSimon Glass2015-01-29-5/+16
| | | | | | | | | | | | For buses, after a child is bound, allow the uclass to perform some processing. This can be used to figure out the address of the child (e.g. the chip select for SPI slaves) so that it is ready to be probed. This avoids bus drivers having to repeat the same process, which really should be done by the uclass, since it is common. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
* dm: spi: Move the per-child data size to the uclassSimon Glass2015-01-29-8/+1
| | | | | | | | This is common to all SPI drivers and specifies a structure used by the uclass. It makes more sense to define it in the uclass. Reviewed-by: Masahiro Yamada <yamada.m@jp.panasonic.com> Signed-off-by: Simon Glass <sjg@chromium.org>
* dm: core: Allow uclasses to specify private data for a device's childrenSimon Glass2015-01-29-0/+8
| | | | | | | | | | | | | | In many cases the per-child private data for a device's children is defined by the uclass rather than the individual driver. For example, a SPI bus needs to store information about each of its children, but all SPI drivers store the same information. It makes sense to allow the uclass to define this data. If the driver provides a size value for its per-child private data, then use it. Failng that, fall back to that provided by the uclass. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
* dm: core: Add a flag to control sequence numberingSimon Glass2015-01-29-15/+16
| | | | | | | | | | | | | | | | At present we try to use the 'reg' property and device tree aliases to give devices a sequence number. The 'reg' property is often actually a memory address, so the sequence numbers thus-obtained are not useful. It would be better if the devices were just sequentially numbered in that case. In fact neither I2C nor SPI use this feature, so drop it. Some devices need us to look up an alias to number them within the uclass. Add a flag to control this, so it is not done unless it is needed. Adjust the tests to test this new behaviour. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
* dm: core: Add a function to get a device's uclass IDSimon Glass2015-01-29-0/+5
| | | | | | | This is useful to check which uclass a device is in. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
* dm: core: Add a post_bind method for parentsSimon Glass2015-01-29-0/+12
| | | | | | | | Allow parent drivers to be called when a new child is bound to them. This allows a bus to set up information it needs for that child. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
* dm: core: Allow uclasses to specify platdata for a device's childrenSimon Glass2015-01-29-0/+4
| | | | | | | | | | | | | | In many cases the child platform data for a device's children is defined by the uclass rather than the individual devices. For example, a SPI bus needs to know the chip select and speed for each of its children. It makes sense to allow this information to be defined the SPI uclass rather than each individual driver. If the device provides a size value for its child platdata, then use it. Failng that, fall back to that provided by the uclass. Reviewed-by: Masahiro Yamada <yamada.m@jp.panasonic.com> Signed-off-by: Simon Glass <sjg@chromium.org>
* dm: core: Allow parents to have platform data for their childrenSimon Glass2015-01-29-2/+32
| | | | | | | | | | | | For buses it is common for parents to need to know the address of the child on the bus, the bus speed to use for that child, and other information. This can be provided in platform data attached to each child. Add driver model support for this, including auto-allocation which can be requested using a new property to specify the size of the data. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
* dm: core: Allocate platform data when binding a deviceSimon Glass2015-01-29-13/+17
| | | | | | | | | | | | When using allocated platform data, allocate it when we bind the device. This makes it possible to fill in this information before the device is probed. This fits with the platform data model (when not using device tree), since platform data exists at bind-time. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
* dm: core: Tidy up error handling in device_bind()Simon Glass2015-01-29-8/+10
| | | | | | | | Make the error handling more standard to make it easier to build on top of it. Also correct a bug in the error path where there is no parent. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
* dm: core: Set device tree node for root deviceSimon Glass2015-01-29-0/+3
| | | | | | | The root device corresponds to the root device tree node, so set this up. Also add a few notes to the documentation. Signed-off-by: Simon Glass <sjg@chromium.org>
* dm: i2c: Provide an offset length parameter where neededSimon Glass2015-01-29-9/+11
| | | | | | | | | | Rather than assuming that the chip offset length is 1, allow it to be provided. This allows chips that don't use the default offset length to be used (at present they are only supported by the command line 'i2c' command which sets the offset length explicitly). Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Heiko Schocher <hs@denx.de>
* dm: i2c: Add a compatbility layerSimon Glass2015-01-29-0/+99
| | | | | | | | | | | | | For boards which use multiple I2C devices, or for SOCs which support multiple boards, we might want to convert these to driver model at different times. At present this is difficult because we need to either use CONFIG_DM_I2C for a board or not. Add a compatibility layer which implements the old API, thus allowing a board to move to driver model for I2C without requiring that everything it uses is moved in the same commit. Signed-off-by: Simon Glass <sjg@chromium.org>
* dm: i2c: Rename driver model I2C functions to permit compatibilitySimon Glass2015-01-29-8/+9
| | | | | | | | | | | Add a dm_ prefix to driver model I2C functions so that we can keep the old ones around. This is a little unfortunate, but on reflection it is too difficult to change the API. We can undo this rename when most boards and drivers are converted to use driver model for I2C. Signed-off-by: Simon Glass <sjg@chromium.org>
* dm: spi: Remove use of fdtdec GPIO supportSimon Glass2015-01-29-34/+28
| | | | | | These functions are going away, so use the new uclass support instead. Signed-off-by: Simon Glass <sjg@chromium.org>
* dm: usb: Remove use of fdtdec GPIO supportSimon Glass2015-01-29-30/+28
| | | | | | These functions are going away, so use the new uclass support instead. Signed-off-by: Simon Glass <sjg@chromium.org>
* dm: mmc: Remove use of fdtdec GPIO supportSimon Glass2015-01-29-35/+21
| | | | | | These functions are going away, so use the new uclass support instead. Signed-off-by: Simon Glass <sjg@chromium.org>
* dm: tegra: nand: Remove use of fdtdec GPIO supportSimon Glass2015-01-29-5/+4
| | | | | | These functions are going away, so use the new uclass support instead. Signed-off-by: Simon Glass <sjg@chromium.org>
* dm: tegra: video: Remove use of fdtdec GPIO supportSimon Glass2015-01-29-34/+20
| | | | | | These functions are going away, so use the new uclass support instead. Signed-off-by: Simon Glass <sjg@chromium.org>
* dm: exynos: Add a GPIO translation functionSimon Glass2015-01-29-1/+12
| | | | | | | | This deals with the polarity bit. It also changes the GPIO devices so that the correct device tree node is linked to each one. This allows us to use the new uclass phandle functionality to implement a proper GPIO binding. Signed-off-by: Simon Glass <sjg@chromium.org>
* dm: tegra: Add a GPIO translation functionSimon Glass2015-01-29-0/+18
| | | | | | | This deals with the polarity bit and selecting the correct bank device given a GPIO number. Signed-off-by: Simon Glass <sjg@chromium.org>
* dm: cros_ec: Remove use of fdtdec GPIO supportSimon Glass2015-01-29-18/+6
| | | | | | These functions are going away, so use the new uclass support instead. Signed-off-by: Simon Glass <sjg@chromium.org>
* dm: demo: Add a simple GPIO demonstrationSimon Glass2015-01-29-0/+91
| | | | | | | | Add a new 'demo light' command which uses GPIOs to control imaginary lights. Each light is assigned a bit number in the overall value. This provides an example driver for using the new GPIO API. Signed-off-by: Simon Glass <sjg@chromium.org>
* dm: gpio: Add better functions to request GPIOsSimon Glass2015-01-29-2/+184
| | | | | | | | | | | | | | | | | | | | | | | At present U-Boot sort-of supports the standard way of reading GPIOs from device tree nodes, but the support is incomplete, a bit clunky and only works for GPIO bindings where #gpio-cells is 2. Add new functions to request GPIOs, taking full account of the device tree binding. These permit requesting a GPIO with a simple call like: gpio_request_by_name(dev, "cd-gpios", 0, &desc, GPIOD_IS_IN); This will request the GPIO, looking at the device's node which might be this, for example: cd-gpios = <&gpio TEGRA_GPIO(B, 3) GPIO_ACTIVE_LOW>; The GPIO will be set to input mode in this case and polarity will be honoured by the GPIO calls. It is also possible to request and free a list of GPIOs. Signed-off-by: Simon Glass <sjg@chromium.org>
* dm: gpio: Add a driver GPIO translation methodSimon Glass2015-01-29-0/+16
| | | | | | | | | Only the GPIO driver knows about the full GPIO device tree binding used by a device. Add a method to allow the driver to provide this information to the uclass, including the GPIO offset within the device and flags such as the polarity. Signed-off-by: Simon Glass <sjg@chromium.org>
* dm: gpio: Add a native driver model APISimon Glass2015-01-29-71/+147
| | | | | | | | | | | | | | | | | | | | | | | So far driver model's GPIO uclass just implements the existing GPIO API. This has some limitations: - it requires manual device tree munging to support GPIOs in device tree (fdtdec_get_gpio() and friends) - it does not understand polarity - it is somewhat slower since we must scan for the GPIO device each time - Global GPIO numbering can change if other GPIO drivers are probed - it requires extra steps to set the GPIO direction and value The new functions have a dm_ prefix where necessary to avoid name conflicts but we can remove that when it is no-longer needed. The new struct gpio_desc holds all required information about the GPIO. For now this is intended to be stored by the client requesting the GPIO, but in future it might be brought into the uclass in some way. With these changes the old GPIO API still works, and uses the driver model API underneath. Signed-off-by: Simon Glass <sjg@chromium.org>
* i2c: UniPhier: add driver for UniPhier FIFO-builtin i2c controllerMasahiro Yamada2015-01-29-0/+388
| | | | | | | | | | This commit adds on-chip I2C driver used on newer SoCs of Panasonic UniPhier platform. Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com> Reviewed-by: Simon Glass <sjg@chromium.org> Acked-by: Simon Glass <sjg@chromium.org> Acked-by: Heiko Schocher <hs@denx.de>
* i2c: UniPhier: add driver for UniPhier i2c controllerMasahiro Yamada2015-01-29-0/+248
| | | | | | | | | | This commit adds on-chip I2C driver used on some old Panasonic UniPhier SoCs. Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com> Reviewed-by: Simon Glass <sjg@chromium.org> Acked-by: Simon Glass <sjg@chromium.org> Acked-by: Heiko Schocher <hs@denx.de>
* i2c: add CONFIG_DM_I2C to KconfigMasahiro Yamada2015-01-29-0/+6
| | | | | | | Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com> Reviewed-by: Simon Glass <sjg@chromium.org> Acked-by: Simon Glass <sjg@chromium.org> Acked-by: Heiko Schocher <hs@denx.de>
* Merge branch 'master' of git://git.denx.de/u-boot-x86Tom Rini2015-01-26-139/+384
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| * x86: spi: Add device tree supportSimon Glass2015-01-24-0/+7
| | | | | | | | | | | | | | As a temporary measure before the ICH driver moves over to driver model, add device tree support to the driver. Signed-off-by: Simon Glass <sjg@chromium.org>
| * x86: rtc: mc146818: Add helpers to read/write CMOS RAMSimon Glass2015-01-24-48/+73
| | | | | | | | | | | | | | On x86 we use CMOS RAM to read and write some settings. Add basic support for this, including access to registers 128-255. Signed-off-by: Simon Glass <sjg@chromium.org>
| * pci: tegra: Fix port information parsingSjoerd Simons2015-01-23-3/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | commit a62e84d7b1824a202dd incorrectly changed the tegra pci code to the new fdtdec pci helpers. To get the device index of the root port, the "reg" property should be parsed from the dtb (as was previously the case). With this patch i can successfully network boot my jetson tk1 Signed-off-by: Sjoerd Simons <sjoerd.simons@collabora.co.uk> Tested-by: Thierry Reding <treding@nvidia.com> Acked-by: Thierry Reding <treding@nvidia.com>
| * x86: video: Add support for CONFIG_CONSOLE_SCROLL_LINESSimon Glass2015-01-23-9/+17
| | | | | | | | | | | | | | | | | | | | | | | | | | Some machines are very slow to scroll their displays. To cope with this, support the CONFIG_CONSOLE_SCROLL_LINES option. Setting this to 5 allows the display to operate at an acceptable speed by scrolling 5 lines at a time. This same option is available for LCDs so when these systems are unified this code can be unified also. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Anatolij Gustschin <agust@denx.de>
| * x86: Access the VGA ROM when neededSimon Glass2015-01-23-2/+33
| | | | | | | | | | | | | | Add code to the generic pci_rom file to access the VGA ROM in PCI space when needed. Signed-off-by: Simon Glass <sjg@chromium.org>
| * x86: ahci: Make sure interface is not busy after enabling the portBin Meng2015-01-23-1/+19
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Each time U-Boot boots on Intel Crown Bay board, the displayed hard drive information is wrong. It could be either wrong capacity or just a 'Capacity: not available' message. After enabling the debug switch, we can see the scsi inquiry command did not execute successfully. However, doing a 'scsi scan' in the U-Boot shell does not expose this issue. SCSI: Target spinup took 0 ms. SATA link 1 timeout. AHCI 0001.0100 32 slots 2 ports 3 Gbps 0x3 impl SATA mode flags: ncq stag pm led clo only pmp pio slum part ccc apst scanning bus for devices... ahci_device_data_io: 0 byte transferred. <--- scsi inquiry fails ahci_device_data_io: 512 byte transferred. ahci_device_data_io: 512 byte transferred. ahci_device_data_io: 512 byte transferred. Device 0: (0:0) Vendor: ATA Prod.: Rev: ?8 Type: Hard Disk Capacity: 912968.3 MB = 891.5 GB (1869759264 x 512) Found 1 device(s). So uninitialized contents on the stack were passed to dev_print() to display those wrong information. The symptom were observed on two hard drives (one is Seagate, the other one is Western Digital). The fix is to make sure the AHCI interface is not busy by checking the error and status information from task file register after enabling the port in ahci_port_start() before proceeding other operations like scsi_scan(). Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
| * x86: Drop the x86_fb driverSimon Glass2015-01-23-48/+0
| | | | | | | | | | | | | | | | Now that we have a full VESA driver we may as well use that. We need to support the VESA layer being set up by early start-up code or by running a VGA ROM. Signed-off-by: Simon Glass <sjg@chromium.org>
| * x86: Add a VESA video driverSimon Glass2015-01-23-0/+75
| | | | | | | | | | | | | | | | | | Add a driver intended to cope with any VESA-compatible x86 graphics adapter. It will not support ROMs which use OpenFirmware (Forth) since there is no support for that in U-Boot. This means that MAC OS cards will not work. Signed-off-by: Simon Glass <sjg@chromium.org>
| * x86: pci: Don't stop when we get a vendor/device mismatchSimon Glass2015-01-23-1/+1
| | | | | | | | | | | | | | These are quite common and we may as well press on and not be so picky. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
| * bios_emulator: Add some VESA interface debuggingSimon Glass2015-01-23-20/+141
| | | | | | | | | | | | Allow the supported modes to be listed when in debug mode. Signed-off-by: Simon Glass <sjg@chromium.org>
| * bios_emulator: Don't display error when emulator terminatesSimon Glass2015-01-23-1/+1
| | | | | | | | | | | | As it turns out this is a normal condition, so suppress the error. Signed-off-by: Simon Glass <sjg@chromium.org>
| * x86: Support ROMs on other archsSimon Glass2015-01-23-0/+6
| | | | | | | | | | | | | | | | We shouldn't assume that the VGA ROM can always be loaded at c0000. This is only true on x86 machines. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
generated by cgit v1.1 at 2024-11-19 17:15:02 +0000