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* dm: Give the demo uclass a nameSimon Glass2014-07-23-0/+1
| | | | | | Uclasses should be named, so add a name for the demo uclass. Signed-off-by: Simon Glass <sjg@chromium.org>
* dm: Add dm_scan_other() to locate board-specific devicesSimon Glass2014-07-23-0/+8
| | | | | | | | Some boards will have devices which are not in the device tree and do not have platform data. They may be programnatically created, for example. Add a hook which boards can use to bind those devices early in boot. Signed-off-by: Simon Glass <sjg@chromium.org>
* dm: Improve errors and warnings in lists_bind_fdt()Simon Glass2014-07-23-3/+13
| | | | | | | Add a debug message for when a device tree node has no driver. Also reword the warning when a device fails to bind, which was misleading. Signed-off-by: Simon Glass <sjg@chromium.org>
* dm: Add child_pre_probe() and child_post_remove() methodsSimon Glass2014-07-23-1/+15
| | | | | | | | | | | Some devices (particularly bus devices) must track their children, knowing when a new child is added so that it can be set up for communication on the bus. Add a child_pre_probe() method to provide this feature, and a corresponding child_post_remove() method. Signed-off-by: Simon Glass <sjg@chromium.org>
* dm: Introduce per-child data for devicesSimon Glass2014-07-23-0/+26
| | | | | | | | | | | | | Some device types can have child devices and want to store information about them. For example a USB flash stick attached to a USB host controller would likely use this space. The controller can hold information about the USB state of each of its children. The data is stored attached to the child device in the 'parent_priv' member. It can be auto-allocated by dm when the child is probed. To do this, add a per_child_auto_alloc_size value to the parent driver. Signed-off-by: Simon Glass <sjg@chromium.org>
* dm: Add functions to access a device's childrenSimon Glass2014-07-23-0/+93
| | | | | | | | | | | | | | | | | Devices can have childen that can be addressed by a simple index, the sequence number or a device tree offset. Add functions to access a child in each of these ways. The index is typically used as a fallback when the sequence number is not available. For example we may use a serial UART with sequence number 0 as the console, but if no UART has sequence number 0, then we can fall back to just using the first UART (index 0). The device tree offset function is useful for buses, where they want to locate one of their children. The device tree can be scanned to find the offset of each child, and that offset can then find the device. Signed-off-by: Simon Glass <sjg@chromium.org>
* dm: Provide a function to scan child FDT nodesSimon Glass2014-07-23-15/+18
| | | | | | | | | | | | | | At present only root nodes in the device tree are scanned for devices. But some devices can have children. For example a SPI bus may have several children for each of its chip selects. Add a function which scans subnodes and binds devices for each one. This can be used for the root node scan also, so change it. A device can call this function in its bind() or probe() methods to bind its children. Signed-off-by: Simon Glass <sjg@chromium.org>
* dm: Avoid accessing uclasses before they are readySimon Glass2014-07-23-0/+2
| | | | | | Don't allow access to uclasses before they have been initialised. Signed-off-by: Simon Glass <sjg@chromium.org>
* dm: Allow a device to be found by its FDT offsetSimon Glass2014-07-23-0/+35
| | | | | | | | Each device that was bound from a device tree has an node that caused it to be bound. Add functions that find and return a device based on a device tree offset. Signed-off-by: Simon Glass <sjg@chromium.org>
* dm: Introduce device sequence numberingSimon Glass2014-07-23-0/+106
| | | | | | | | | | | | | | | | | | | | | | | | | In U-Boot it is pretty common to number devices from 0 and access them on the command line using this numbering. While it may come to pass that we will move away from this numbering, the possibility seems remote at present. Given that devices within a uclass will have an implied numbering, it makes sense to build this into driver model as a core feature. The cost is fairly small in terms of code and data space. With each uclass having numbered devices we can ask for SPI port 0 or serial port 1 and receive a single device. Devices typically request a sequence number using aliases in the device tree. These are resolved when the device is probed, to deal with conflicts. Sequence numbers need not be sequential and holes are permitted. At present there is no support for sequence numbers using static platform data. It could easily be added to 'struct driver_info' if needed, but it seems better to add features as we find a use for them, and the use of -1 to mean 'no sequence' makes the default value somewhat painful. Signed-off-by: Simon Glass <sjg@chromium.org>
* dm: Move uclass error checking/probing into a functionSimon Glass2014-07-23-6/+22
| | | | | | Several functions will use this same pattern, so bring it into a function. Signed-off-by: Simon Glass <sjg@chromium.org>
* Add a flag indicating when the serial console is readySimon Glass2014-07-23-0/+1
| | | | | | | | | | For sandbox we have a fallback console which is used very early in U-Boot, before serial drivers are available. Rather than try to guess when to switch to the real console, add a flag so we can be sure. This makes sure that sandbox can always output a panic() message, for example, and avoids silent failure (which is very annoying in sandbox). Signed-off-by: Simon Glass <sjg@chromium.org>
* dm: Support driver model prior to relocationSimon Glass2014-07-23-0/+25
| | | | | | | Initialise devices marked 'pre-reloc' and make them available prior to relocation. Note that this requires pre-reloc malloc() to be available. Signed-off-by: Simon Glass <sjg@chromium.org>
* dm: Allow drivers to be marked 'before relocation'Simon Glass2014-07-23-9/+14
| | | | | | | | | | | | | | | | | | | | | | | | | | Driver model currently only operates after relocation is complete. In this state U-Boot typically has a small amount of memory available. In adding support for driver model prior to relocation we must try to use as little memory as possible. In addition, on some machines the memory has not be inited and/or the CPU is not running at full speed or the data cache is off. These can reduce execution performance, so the less initialisation that is done before relocation the better. An immediately-obvious improvement is to only initialise drivers which are actually going to be used before relocation. On many boards the only such driver is a serial UART, so this provides a very large potential benefit. Allow drivers to mark themselves as 'pre-reloc' which means that they will be initialised prior to relocation. This can be done either with a driver flag or with a 'dm,pre-reloc' device tree property. To support this, the various dm scanning function now take a 'pre_reloc_only' parameter which indicates that only drivers marked pre-reloc should be bound. Signed-off-by: Simon Glass <sjg@chromium.org>
* dm: Provide a way to shut down driver modelSimon Glass2014-07-23-0/+8
| | | | | | | Add a new method which removes and unbinds all drivers. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Marek Vasut <marex@denx.de>
* dm: Make sure that the root device is probedSimon Glass2014-07-23-0/+3
| | | | | | | | | The root device should be probed just like any other device. The effect of this is to mark the device as activated, so that it can be removed (along with its children) if required. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Marek Vasut <marex@denx.de>
* stdio: Pass device pointer to stdio methodsSimon Glass2014-07-23-31/+73
| | | | | | | | | | | | | | | | | | | | | | | | | | At present stdio device functions do not get any clue as to which stdio device is being acted on. Some implementations go to great lengths to work around this, such as defining a whole separate set of functions for each possible device. For driver model we need to associate a stdio_dev with a device. It doesn't seem possible to continue with this work-around approach. Instead, add a stdio_dev pointer to each of the stdio member functions. Note: The serial drivers have the same problem, but it is not strictly necessary to fix that to get driver model running. Also, if we convert serial over to driver model the problem will go away. Code size increases by 244 bytes for Thumb2 and 428 for PowerPC. 22: stdio: Pass device pointer to stdio methods arm: (for 2/2 boards) all +244.0 bss -4.0 text +248.0 powerpc: (for 1/1 boards) all +428.0 text +428.0 Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Marek Vasut <marex@denx.de> Reviewed-by: Marek Vasut <marex@denx.de>
* stdio: Remove redundant code around stdio_register() callsSimon Glass2014-07-23-4/+0
| | | | | | | | | | | | | There is no point in setting a structure's memory to NULL when it has already been zeroed with memset(). Also, there is no need to create a stub function for stdio to call - if the function is NULL it will not be called. This is a clean-up, with no change in functionality. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Marek Vasut <marex@denx.de>
* dm: gpio: Don't use the driver model uclass for SPLSimon Glass2014-07-23-0/+2
| | | | | | | Driver model does not support SPL yet, so we should not use the GPIO uclass for SPL. Signed-off-by: Simon Glass <sjg@chromium.org>
* AHCI: Increase link timeout to 200msIan Campbell2014-07-22-1/+1
| | | | | | | | | | | | | In 73545f75b66d "ahci: wait longer for link" I increased the timeout to 40ms based on the observed behaviour of a WD disk on a Cubietruck. Since then Karsten Merker and myself have both observed timeouts with HGST disks (Karsten on Cubietruck, me on Cubieboard2). Increasing the timeout to ~175ms fixes this, so go to 200ms for a bit of headroom. Signed-off-by: Ian Campbell <ijc@hellion.org.uk> Cc: Karsten Merker <merker@debian.org> Acked-by: Hans de Goede <hdegoede@redhat.com>
* serial: ns16550: use a const variable instead of macroMasahiro Yamada2014-07-22-3/+3
| | | | | | | | Just for type checking. Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com> Cc: Marek Vasut <marex@denx.de> Acked-by: Marek Vasut <marex@denx.de>
* serial: ns16550: use DIV_ROUND_CLOSEST macro to compute the divisorMasahiro Yamada2014-07-22-7/+3
| | | | | | | | | The function still returns the same value. The comment block is no longer necessary because our intention is clear enough by using DIV_ROUND_CLOSEST() macro. Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
* serial: ns16550: drop CONFIG_OMAP1610 from the special caseMasahiro Yamada2014-07-22-6/+0
| | | | | | | | | | | | | | | | | | | If CONFIG_OMAP1610 is defined, the code returning the fixed value (26) is enabled. But this case is covered by the following code. (CONFIG_SYS_NS16550_CLK + (gd->baudrate * (MODE_X_DIV / 2))) / (MODE_X_DIV * gd->baudrate) = (48000000 + (115200 * (16 / 2))) / (16 * 115200) = 48921600 / 1843200 = 26 The "#ifdef CONFIG_OMAP1610" was added by commit 6f21347d more than ten years ago. In those days, the divide-and-round was not used. I guess that is why this weird code was added here. Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com> Cc: Tom Rini <trini@ti.com> Cc: Rishi Bhattacharya <rishi@ti.com>
* driver/usb: include upper/lower_32_bits() from linux/compat.hLijun Pan2014-07-22-4/+2
| | | | | | | upper_32_bits() and lower_32_bits() have been ported into linux/compat.h. Start use them now in drivers/usb/host/xhci.h. Signed-off-by: Lijun Pan <Lijun.Pan@freescale.com>
* Merge branch 'master' of git://git.denx.de/u-boot-i2cTom Rini2014-07-21-2/+77
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| * fsl_i2c: add support for 3rd and 4th I2CShengzhou Liu2014-07-16-2/+20
| | | | | | | | | | | | Add support for 3rd and 4th I2C. Signed-off-by: Shengzhou Liu <Shengzhou.Liu@freescale.com>
| * i2c, omap24xx: add i2c deblock sequenzHeiko Schocher2014-07-16-0/+57
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | If a bus busy is detected when intializing the driver, toggle 9 times the scl pin. Therefore enable the test mode of the controller, in which the scl, sda pins can be controlled manually. Tested on the siemens boards pxm2, rut and dxr2. Signed-off-by: Heiko Schocher <hs@denx.de> Cc: Tom Rini <trini@ti.com> Cc: Hannes Petermaier <oe5hpm@oevsv.at> Cc: Lubomir Popov <lpopov@mm-sol.com> Cc: Steve Sakoman <steve@sakoman.com> Cc: Sandeep Paulraj <s-paulraj@ti.com> Cc: Vincent Stehlé <v-stehle@ti.com> Cc: Samuel Egli <samuel.egli@siemens.com>
* | mmc: prevent some warnings with make W=1Jeroen Hofstee2014-07-18-4/+4
| | | | | | | | | | | | | | | | Add missing prototypes for global functions and make local functions static. cc: panto@antoniou-consulting.com Signed-off-by: Jeroen Hofstee <jeroen@myspectrum.nl>
* | dirvers: mmc: use __weakJeroen Hofstee2014-07-18-11/+9
| | | | | | | | | | use weak instead of alias to prevent some clang warnings. Signed-off-by: Jeroen Hofstee <jeroen@myspectrum.nl>
* | dm: add missing includesJeroen Hofstee2014-07-18-0/+2
| | | | | | | | | | | | | | | | | | | | lists.c / root.c do not include their own header and they could potentially implement a different function. Therefore actually include the headers. cc: sjg@chromium.org Signed-off-by: Jeroen Hofstee <jeroen@myspectrum.nl> Acked-by: Simon Glass <sjg@chromium.org>
* | mtd: cfi_flash: fix clang warningJeroen Hofstee2014-07-18-1/+1
|/ | | | | | | | | | | | clang warns this check is silly; it is since s is a local variable. u-boot/drivers/mtd/cfi_flash.c:2363:13: warning: comparison of array 's' not equal to a null pointer is always true else if ((s != NULL) && (strcmp(s, "yes") == 0)) { cc: Stefan Roese <sr@denx.de> Signed-off-by: Jeroen Hofstee <jeroen@myspectrum.nl>
* usb: phy: omap_usb_phy: implement usb_phy_power() for AM437xFelipe Balbi2014-07-09-1/+16
| | | | | | | | Newer AM437x silicon requires us to explicitly power up the USB2 PHY. By implementing usb_phy_power() we can achieve that. Signed-off-by: Felipe Balbi <balbi@ti.com>
* usb: host: xhci: make sure to power up PHYFelipe Balbi2014-07-09-0/+1
| | | | | | | some boards won't work if the PHY isn't explicitly powered up. Signed-off-by: Felipe Balbi <balbi@ti.com>
* board: gdsys: Make gdsys osd hardware detection more robustDirk Eibach2014-07-07-1/+0
| | | | Signed-off-by: Dirk Eibach <dirk.eibach@gdsys.cc>
* i2c: IHS I2C master driverDirk Eibach2014-07-07-0/+205
| | | | | | | | IHS I2C master support was merely a hack in the osd driver. Now it is a proper u-boot I2C framework driver, supporting the v2.00 master features. Signed-off-by: Dirk Eibach <dirk.eibach@gdsys.cc>
* blackfin: Fix warning about undefined functionVasili Galka2014-07-07-0/+1
| | | | | | | get_sclk() was not defined in bfin_wdt.c, include the corresponding header. Cc: Sonic Zhang <sonic.adi@gmail.com> Signed-off-by: Vasili Galka <vvv444@gmail.com>
* mpc8xx: remove v37 board supportMasahiro Yamada2014-07-07-7/+1
| | | | | | This board is old enough and has no maintainer. Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
* mpc8xx: remove rbc823 board supportMasahiro Yamada2014-07-07-66/+1
| | | | | | This board is old enough and has no maintainer. Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
* mpc8xx: remove RPXlite_dw, quantum board supportMasahiro Yamada2014-07-07-89/+0
| | | | | | These boards are old enough and have no maintainers. Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
* tpm: don't use unneeded double bracketsJeroen Hofstee2014-07-07-1/+1
| | | | | | | | clang is tempted to inteprete such a condition as a assignment as well. Since it isn't don't use double brackets. cc: Tom Wai-Hong Tam <waihong@chromium.org> Signed-off-by: Jeroen Hofstee <jeroen@myspectrum.nl>
* build: define CPU only when arch/${ARCH}/cpu/${CPU} existsMasahiro Yamada2014-07-07-1/+1
| | | | | | | | | | | | | | | | | | | The directory arch/${ARCH}/cpu/${CPU} does not exist in avr32, blackfin, microblaze, nios2, openrisc, sandbox, x86. These architectures have only one CPU type. Defining CPU should not be required for such architectures. This commit allows cpu field (= the 3rd field of boards.cfg) to be kept blank. Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com> Cc: Andreas Bießmann <andreas.devel@googlemail.com> Cc: Simon Glass <sjg@chromium.org> Cc: Sonic Zhang <sonic.zhang@analog.com> Cc: Michal Simek <michal.simek@xilinx.com> Cc: Thomas Chou <thomas@wytron.com.tw> Cc: Stefan Kristiansson <stefan.kristiansson@saunalahti.fi>
* Merge branch 'master' of git://git.denx.de/u-boot-i2cTom Rini2014-07-07-17/+27
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| * i2c: tegra: dump alen in debug statementsStephen Warren2014-07-03-4/+4
| | | | | | | | | | | | | | | | | | Since tegra_i2c_{read,write}'s debug() call dumps the chip address, dump the address length (alen) too, so the address value can be correctly interpreted. Signed-off-by: Stephen Warren <swarren@nvidia.com> Reviewed-by: Yen Lin <yelin@nvidia.com>
| * i2c: tegra: write clean data to TX FIFOStephen Warren2014-07-03-5/+7
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The Tegra I2C controller's TX FIFO contains 32-bit words. If the final FIFO entry of a transaction contains fewer than 4 bytes, the driver currently fills the unused FIFO bytes with uninitialized data. This can be confusing when reading back the FIFO content for debugging purposes. Solve this by explicitly initializing the variable containing FIFO data before filling it (partially) with data. With this change, send_recv_packets()'s loop's if (is_write) code mirrors the else (i.e. read) branch. Signed-off-by: Stephen Warren <swarren@nvidia.com> Reviewed-by: Yen Lin <yelin@nvidia.com>
| * i2c: tegra: use repeated start for readsStephen Warren2014-07-03-8/+16
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | I2C read transactions are typically implemented as follows: START(write) address REPEATED_START(read) data... STOP However, Tegra's I2C driver currently implements reads as follows: START(write) address STOP START(read) data... STOP This sequence confuses at least the AS3722 PMIC on the Jetson TK1 board, leading to corrupted read data in some cases. Fix the driver to chain the transactions together using repeated starts to solve this. Signed-off-by: Stephen Warren <swarren@nvidia.com> Reviewed-by: Yen Lin <yelin@nvidia.com>
* | watchdog/denali: Adding DesignWare watchdog driver supportChin Liang See2014-07-05-0/+75
| | | | | | | | | | | | | | | | | | | | | | | | To add the DesignWare watchdog driver support. It required information such as register base address and clock info from configuration header file within include/configs folder. Signed-off-by: Chin Liang See <clsee@altera.com> Cc: Anatolij Gustschin <agust@denx.de> Cc: Albert Aribaud <albert.u.boot@aribaud.net> Cc: Heiko Schocher <hs@denx.de> Cc: Tom Rini <trini@ti.com>
* | arm: ep9315: Return back Cirrus Logic EDB9315A board supportSergey Kostanbaev2014-07-04-0/+314
| | | | | | | | | | | | | | This patch returns back support for old ep93xx processors family Signed-off-by: Sergey Kostanbaev <sergey.kostanbaev@gmail.com> Cc: albert.u.boot@aribaud.net
* | gpio: spear_gpio: Fix gpio_set_value() implementationAxel Lin2014-07-04-1/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | In current gpio_set_value() implementation, it always sets the gpio control bit no matter the value argument is 0 or 1. Thus the GPIOs never set to low. This patch fixes this bug. The address bus is used as a mask on read/write operations, so that independent software drivers can set their GPIO bits without affecting any other pins in a single write operation. Thus we don't need a read-modify-write to update the register. Signed-off-by: Axel Lin <axel.lin@ingics.com> Acked-by: Stefan Roese <sr@denx.de> Reviewed-by: Vipin Kumar <vipin.kumar@st.com> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com>
* | armv8/fsl-lsch3: Add support to load and start MC FirmwareJ. German Rivera2014-07-03-0/+275
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Adding support to load and start the Layerscape Management Complex (MC) firmware. First, the MC GCR register is set to 0 to reset all cores. MC firmware and DPL images are copied from their location in NOR flash to DDR. MC registers are updated with the location of these images. Deasserting the reset bit of MC GCR register releases core 0 to run. Core 1 will be released by MC firmware. Stop bits are not touched for this step. U-boot waits for MC until it boots up. In case of a failure, device tree is updated accordingly. The MC firmware image uses FIT format. Signed-off-by: J. German Rivera <German.Rivera@freescale.com> Signed-off-by: York Sun <yorksun@freescale.com> Signed-off-by: Lijun Pan <Lijun.Pan@freescale.com> Signed-off-by: Shruti Kanetkar <Shruti@Freescale.com>
* | ARMv8/FSL_LSCH3: Add FSL_LSCH3 SoCYork Sun2014-07-03-0/+5
|/ | | | | | | | | | | | | | Freescale LayerScape with Chassis Generation 3 is a set of SoCs with ARMv8 cores and 3rd generation of Chassis. We use different MMU setup to support memory map and cache attribute for these SoCs. MMU and cache are enabled very early to bootst performance, especially for early development on emulators. After u-boot relocates to DDR, a new MMU table with QBMan cache access is created in DDR. SMMU pagesize is set in SMMU_sACR register. Both DDR3 and DDR4 are supported. Signed-off-by: York Sun <yorksun@freescale.com> Signed-off-by: Varun Sethi <Varun.Sethi@freescale.com> Signed-off-by: Arnab Basu <arnab.basu@freescale.com>
generated by cgit v1.1 at 2025-01-01 01:48:59 +0000