summaryrefslogtreecommitdiff
path: root/drivers
Commit message (Collapse)AuthorAgeLines
* Cleanup, update CHANGELOGWolfgang Denk2007-04-18-3/+4
| | | | Sigend-off-by: Wolfgang Denk <wd@denx.de>
* Merge with /home/wd/git/u-boot/custodian/u-boot-74xx-7xxWolfgang Denk2007-04-18-3/+1500
|\
| * Some code cleanup.Wolfgang Denk2007-03-04-26/+11
| |
| * Merge branch 'master' into hpc2roy zang2007-02-28-13/+257
| |\ | | | | | | | | | | | | | | | | | | | | | Conflicts: drivers/Makefile Fix the merge conflict in file drivers/Makefile Signed-off-by: Roy Zang <tie-fei.zang@freescale.com>
| * \ Merge branch 'master' into hpc2roy zang2007-01-22-29/+14
| |\ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Conflicts: drivers/cfi_flash.c The patch by Heiko Schocher <hs@pollux.denx.de> on Jan, 19, 2007 fixes cfi_driver bug for mpc7448hpc2 board. The default cfi_driver can support mpc7448hpc2 board.
| * \ \ Merge branch 'master' into hpc2roy zang2007-01-04-22/+32
| |\ \ \
| * \ \ \ Fix the confilcts when merging 'master' into hpc2.roy zang2006-12-01-49/+4016
| |\ \ \ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The conflicts due to a new mpc7448 p3m7448 board is in the main tree. Merge branch 'master' into hpc2 Conflicts: MAKEALL cpu/74xx_7xx/cpu.c cpu/74xx_7xx/cpu_init.c cpu/74xx_7xx/speed.c
| * | | | | Clean up the code according to codestyle:roy zang2006-12-01-469/+460
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | (1) remove some C++ comments. (2) remove trailing white space. (3) remove trailing empty line. (4) Indentation by table. (5) remove {} in one line condition. (6) add space before '(' in function call. Remove some weird printf () output. Add necessary comments. Modified Makefile to support building in a separate directory.
| * | | | | Solve the copyright conflicts when merging 'master' into hpc2.roy zang2006-11-29-64/+163
| |\ \ \ \ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Merge branch 'master' into hpc2 Conflicts: drivers/cfi_flash.c
| * | | | | | This patch comes from Yuli's posted patch on 8/8/2006roy zang2006-11-02-6/+26
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | titled "CFI Driver Little-Endian write Issue". http://sourceforge.net/mailarchive/message.php?msg_id=36311999 If that patch applied, please discard this one. Until now , I do not see his patch is applied. So please apply this one. Signed-off-by: Yuli Barcohen <yuli@arabellasw.com> Signed-off-by: Roy Zang <tie-fei.zang@freescale.com>
| * | | | | | Tsi108 on chip i2c support.roy zang2006-11-02-0/+300
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The i2c Interface provides a master-only, serial interface that can be used for initializing Tsi108/Tsi109 registers from an EEPROM after a device reset. Signed-off-by: Alexandre Bounine <alexandreb@tundra.com> Signed-off-by: Roy Zang <tie-fei.zang@freescale.com>
| * | | | | | Tsi108 on chip pci controller support.roy zang2006-11-02-0/+178
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | If there is no pci card, the tsi108/109 pci configure read will cause a machine check exception to the processor. PCI error should also be cleared after the read. Signed-off-by: Alexandre Bounine <alexandreb@tundra.com> Signed-off-by: Roy Zang <tie-fei.zang@freescale.com>
| * | | | | | Tundra tsi108 on chip Ethernet controller support.roy zang2006-11-02-0/+1043
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The following is a brief description of the Ethernet controller: The Tsi108/9 Ethernet Controller connects Switch Fabric to two independent Gigabit Ethernet ports,E0 and E1. It uses a single Management interface to manage the two physical connection devices (PHYs). Each Ethernet port has its own statistics monitor that tracks and reports key interface statistics. Each port supports a 256-entry hash table for address filtering. In addition, each port is bridged to the Switch Fabric through a 2-Kbyte transmit FIFO and a 4-Kbyte Receive FIFO. Each Ethernet port also has a pair of internal Ethernet DMA channels to support the transmit and receive data flows. The Ethernet DMA channels use descriptors set up in memory, the memory map of the device, and access via the Switch Fabric. The Ethernet Controller?s DMA arbiter handles arbitration for the Switch Fabric. The Controller also has a register businterface for register accesses and status monitor control. The PMD (Physical Media Device) interface operates in MII, GMII, or TBI modes. The MII mode is used for connecting with 10 or 100 Mbit/s PMDs. The GMII and TBI modes are used to connect with Gigabit PMDs. Internal data flows to and from the Ethernet Controller through the Switch Fabric. Each Ethernet port uses its transmit and receive DMA channels to manage data flows through buffer descriptors that are predefined by the system (the descriptors can exist anywhere in the system memory map). These descriptors are data structures that point to buffers filled with data ready to transmit over Ethernet, or they point to empty buffers ready to receive data from Ethernet. Signed-off-by: Alexandre Bounine <alexandreb@tundra.com> Signed-off-by: Roy Zang <tie-fei.zang@freescale.com>
| * | | | | | General code modification for mpc7448hpc2 board support.roy zang2006-11-02-3/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | 1. Add 7447A and 7448 processor support. 2. Add the following flags. CFG_CONFIG_BUS_CLK : If the 74xx bus frequency can be configured dynamically (such as by switch on board), this flag should be set. CFG_EXCEPTION_AFTER_RELOCATE: If an exception occurs after the u-boot relocates to RAM, this flag should be set. CFG_SERIAL_HANG_IN_EXCEPTION: If the print out function will cause the system hang in exception, this flag should be set. There is a design issue for tsi108/109 pci configure read. When pci scan the slots, if there is no pci card, the tsi108/9 will cause a machine check exception for mpc7448 processor. Signed-off-by: Alexandre Bounine <alexandreb@tundra.com> Signed-off-by: Roy Zang <tie-fei.zang@freescale.com>
* | | | | | | Atmel MACB ethernet driverHaavard Skinnemoen2007-04-14-1/+845
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Driver for the Atmel MACB on-chip ethernet controller. This driver has been tested on the ATSTK1000 board with a AT32AP7000 CPU. It should probably work on AT91SAM926x as well with some minor modifications. Hardware documentation can be found in the AT32AP7000 data sheet, which can be downloaded from http://www.atmel.com/dyn/products/datasheets.asp?family_id=682 Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com>
* | | | | | | AVR32: Resource management rewriteHaavard Skinnemoen2007-04-14-22/+34
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Rewrite the resource management code (i.e. I/O memory, clock gating, gpio) so it doesn't depend on any global state. This is necessary because this code is heavily used before relocation to RAM, so we can't write to any global variables. As an added bonus, this makes u-boot's memory footprint a bit smaller, although some functionality has been left out; all clocks are enabled all the time, and there's no checking for gpio line conflicts. Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com>
* | | | | | | mpc83xx: Fix empty i2c reads/writes in fsl_i2c.cJoakim Tjernlund2007-03-02-13/+14
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Fix empty i2c reads/writes, i2c_write(0x50, 0x00, 0, NULL, 0) which is used to se if an slave will ACK after receiving its address. Correct i2c probing to use this method as the old method could upset a slave as it wrote a data byte to it. Add a small delay in i2c_init() to let the controller shutdown any ongoing I2C activity. Signed-off-by: Joakim Tjernlund <Joakim.Tjernlund@transmode.se>
* | | | | | | mpc83xx: Fix alternating tx error / tx buffer not ready bug in QE UECEmilian Medve2007-03-02-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The problem is not gcc4 but the code itself. The BD_STATUS() macro can't be used for busy-waiting since it strips the 'volatile' property from the bd variable. gcc3 was working by pure luck. This is a follow on patch to "Fix the UEC driver bug of QE"
* | | | | | | mpc83xx: U-Boot support for Wind River SBC8349Paul Gortmaker2007-03-02-0/+89
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | I've redone the SBC8349 support to match git-current, which incorporates all the MPC834x updates from Freescale since the 1.1.6 release, including the DDR changes. I've kept all the SBC8349 files as parallel as possible to the MPC8349EMDS ones for ease of maintenance and to allow for easy inspection of what was changed to support this board. Hence the SBC8349 U-Boot has FDT support and everything else that the MPC8349EMDS has. Fortunately the Freescale updates added support for boards using CS0, but I had to change spd_sdram.c to allow for board specific settings for the sdram_clk_cntl (it is/was hard coded to zero, and that remains the default if the board doesn't specify a value.) Hopefully this should be mergeable as-is and require no whitespace cleanups or similar, but if something doesn't measure up then let me know and I'll fix it. Thanks, Paul.
* | | | | | | mpc83xx: Add support for the MPC832XEMDS boardDave Liu2007-03-02-3/+10
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch supports DUART, ETH3/4 and PCI etc. Signed-off-by: Dave Liu <daveliu@freescale.com>
* | | | | | | mpc83xx: Fix the UEC driver bug of QEDave Liu2007-03-02-8/+6
| |_|_|_|_|/ |/| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The patch prevents the GCC tool chain from striping useful code for optimization. It will make UEC ethernet driver workable, Otherwise the UEC will fail in tx when you are using gcc4.x. but the driver can work when using gcc3.4.3. CHANGELOG *Prevent the GCC from striping code for optimization, Otherwise the UEC will tx failed when you are using gcc4.x. Signed-off-by: Dave Liu <daveliu@freescale.com>
* | | | | | Minor code cleanup.Wolfgang Denk2007-02-27-4/+4
| | | | | |
* | | | | | [PATCH] Change systemace driver to select 8 & 16bit modeStefan Roese2007-02-22-5/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | As suggested by Grant Likely this patch enables the Xilinx SystemACE driver to select 8 or 16bit mode upon startup. Signed-off-by: Stefan Roese <sr@denx.de>
* | | | | | [PATCH v3] Add sync to ensure flash_write_cmd is fully finishedHaiying Wang2007-02-21-12/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Some CPUs like PPC, BLACKFIN need sync() to ensure cfi flash write command is fully finished. The sync() is defined in each CPU's io.h file. For those CPUs which do not need sync for now, a dummy sync() is defined in their io.h as well. Signed-off-by: Haiying Wang <Haiying.Wang@freescale.com>
* | | | | | [PATCH] Fix problem in systemace driver (ace_writew instead of ace_write)Stefan Roese2007-02-21-4/+4
| | | | | | | | | | | | | | | | | | | | | | | | Signed-off-by: Stefan Roese <sr@denx.de>
* | | | | | [PATCH] Update SystemACE driver for 16bit accessStefan Roese2007-02-20-3/+11
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch removes some problems when the Xilinx SystemACE driver is used with 16bit access on an big endian platform (like the AMCC Katmai). Signed-off-by: Stefan Roese <sr@denx.de>
* | | | | | [PATCH 9_9] Use "void *" not "unsigned long *" for block dev read_write ↵Grant Likely2007-02-20-4/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | buffer pointers Block device read/write is anonymous data; there is no need to use a typed pointer. void * is fine. Also add a hook for block_read functions Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
* | | | | | [PATCH 7_9] Replace ace_readw_ace_writeb functions with macrosGrant Likely2007-02-20-26/+10
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Register read/write does not need to be wrapped in a full function. The patch replaces them with macros. Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
* | | | | | [PATCH 6_9] Move common_cmd_ace.c to drivers_systemace.cGrant Likely2007-02-20-1/+265
| |_|_|_|/ |/| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The code in this file is not a command; it is a device driver. Put it in the correct place. There are zero functional changes in this patch, it only moves the file. Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
* | | | | [PATCH] CFI: define CFG_WRITE_SWAPPED_DATA for the CFI-Flash driverHeiko Schocher2007-01-19-16/+10
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | if you must swap the bytes between reading/writing. (Needed for the SC3 board) Signed-off-by: Heiko Schocher <hs@denx.de>
* | | | | [PATCH] Fix: Compilerwarnings for SC3 board.Heiko Schocher2007-01-18-3/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The EBC Configuration Register is now by CFG_EBC_CFG definable Added JFFS2 support for the SC3 board. Signed-off-by: Heiko Schocher <hs@denx.de>
* | | | | Merge with /home/hs/SC3/u-bootWolfgang Denk2007-01-15-2/+10
|\ \ \ \ \ | | | | | | | | | | | | | | | | | | Some code cleanup.
| * | | | | Added support for the SOLIDCARD III board from EurodesignHeiko Schocher2007-01-11-2/+10
| | |_|_|/ | |/| | | | | | | | | | | | | Signed-off-by: Heiko Schocher <hs@denx.de>
* | | | | [PATCH] nand: Fix problem with oobsize calculationStefan Roese2007-01-05-1/+1
|/ / / / | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Here the description from Brian Brelsford <Brian_Brelsford@dell.com>: The Hynix part returns a 0x1d in the 4th ID byte. The Samsung part returns a 0x15. In the code fragment below bits [1:0] determine the page size, it is ANDed via "(extid & 0x3)" then shifted out. The next field is also ANDed with 0x3. However this is a one bit field as defined in the Hynix and Samsung parts in the 4th ID byte that determins the oobsize, not a two bit field. It works on Samsung as bits[3:2] are 01. However for the Hynix there is a 11 in these two bits, so the oob size gets messed up. I checked the correct linux code and the suggested fix from Brian is also available in the linux nand mtd driver. Signed-off-by: Stefan Roese <sr@denx.de>
* | | | Fix bug in adaption of Stefano Babic's CFI driver patch.Wolfgang Denk2006-12-27-15/+21
| | | |
* | | | Merge with /home/wd/git/u-boot/masterWolfgang Denk2006-12-24-1/+2
|\ \ \ \
| * | | | Fix cfi failure with Spansion Flash (Spansion Flash Devices have a different ↵Stefano Babic2006-12-24-1/+2
| | |_|/ | |/| | | | | | | | | | offset to go into CFI mode)
* | | | Merge with /home/hs/TQ/u-boot-devWolfgang Denk2006-12-24-7/+10
|\ \ \ \ | |/ / / |/| | |
| * | | Added support for the TQM8272 board from TQHeiko Schocher2006-12-21-7/+12
| |/ / | | | | | | | | | Signed-off-by: Heiko Schocher <hs@denx.de>
* | | Code cleanup.Wolfgang Denk2006-11-30-574/+580
| | |
* | | Merge with http://opensource.freescale.com/pub/scm/u-boot-83xx.gitWolfgang Denk2006-11-30-47/+4008
|\ \ \
| * | | Make fsl-i2c not conflict with SOFT I2CJoakim Tjernlund2006-11-29-7/+10
| | | | | | | | | | | | | | | | Signed-off-by: Timur Tabi <timur@freescale.com>
| * | | Fix I2C master address initialization.Joakim Tjernlund2006-11-29-1/+1
| | | | | | | | | | | | | | | | Signed-off-by: Timur Tabi <timur@freescale.com>
| * | | Merge http://www.denx.de/git/u-bootKim Phillips2006-11-28-61/+163
| |\ \ \ | | | |/ | | |/|
| * | | Eliminate gcc 4 'used uninitialized' warnings in drivers/qe/uccf.cKim Phillips2006-11-28-3/+3
| | | | | | | | | | | | | | | | | | | | give initial values for reg_num, shift, p_cmxucr in ucc_set_clk_src since they are passed by reference to ucc_get_cmxucr_reg and assigned.
| * | | mpc83xx: Update 83xx to use fsl_i2c.cTimur Tabi2006-11-03-32/+81
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Update the 83xx tree to use I2C support in drivers/fsl_i2c.c. Delete cpu/mpc83xx/i2c.c, include/asm-ppc/i2c.h, and all references to those files. Added multiple I2C bus support to fsl_i2c.c. Signed-off-by: Timur Tabi <timur@freescale.com>
| * | | mpc83xx: Replace CFG_IMMRBAR with CFG_IMMRTimur Tabi2006-11-03-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Replace all instances of CFG_IMMRBAR with CFG_IMMR, so that the 83xx tree matches the other 8xxx trees. Signed-off-by: Timur Tabi <timur@freescale.com>
| * | | mpc83xx: add QE ethernet supportDave Liu2006-11-03-0/+3910
| | | | | | | | | | | | | | | | this patch adds support for the QUICC Engine based UCC gigabit ethernet device.
| * | | mpc83xx: Add support for the MPC8349E-mITXTimur Tabi2006-11-03-3/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | PREREQUISITE PATCHES: * This patch can only be applied after the following patches have been applied: 1) DNX#2006090742000024 "Add support for multiple I2C buses" 2) DNX#2006090742000033 "Multi-bus I2C implementation of MPC834x" 3) DNX#2006091242000041 "Additional MPC8349 support for multibus i2c" 4) DNX#2006091242000078 "Add support for variable flash memory sizes on 83xx systems" 5) DNX#2006091242000069 "Add support for Errata DDR6 on MPC 834x systems" CHANGELOG: * Add support for the Freescale MPC8349E-mITX reference design platform. The second TSEC (Vitesse 7385 switch) is not supported at this time. Signed-off-by: Timur Tabi <timur@freescale.com>
| * | | NAND Flash verify across block boundariesNick Spence2006-11-03-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch addresses a problem when CONFIG_MTD_NAND_VERIFY_WRITE is defined and the write crosses a block boundary. The pointer to the verification buffer (bufstart) is not being updated to reflect the starting of the new block so the verification of the second block fails. CHANGELOG: * Fix NAND FLASH page verification across block boundaries
generated by cgit v1.1 at 2024-11-05 23:19:42 +0000