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* mtd/cfi_flash: fix write problems for Numonyx P33/30 32 MBit flashsHolger Brunck2012-08-13-22/+43
| | | | | | | | | | | | | | | | | | commit 54652991 Work around bug in Numonyx P33/P30 256-Mbit 65nm flash chips fixes a problem for Numonyx P33/P30 flashes for 256-Mbit, but this leads to problems for smaller versions of this chip e.g. the 32Mbit version with deviceid 0x16 on mgcoge. So move the code for this work around to an own function and check previously manufacturer id and device id to not break other flashes which don't need this work around. Signed-off-by: Holger Brunck <holger.brunck@keymile.com> Signed-off-by: Heiko Schocher <hs@denx.de> cc: Stefan Roese <sr@denx.de> cc: Philippe De Muyter <phdm@macqel.be> cc: Gerlando Falauto <gerlando.falauto@keymile.com> Signed-off-by: Stefan Roese <sr@denx.de>
* cfi_flash: add support for Spansion flash PPB sector protectionAnatolij Gustschin2012-08-13-0/+52
| | | | | | | | | | Erasing flash sectors protected with persistent protection bit (PPB) mechanism on Spansion flash chips doesn't work. Add sector protection status checking and sector lock and unlock commands to fix this. Signed-off-by: Anatolij Gustschin <agust@denx.de> Cc: Stefan Roese <sr@denx.de> Signed-off-by: Stefan Roese <sr@denx.de>
* Add support for DS1388.Kenth Eriksson2012-08-10-0/+27
| | | | | | | | | | Support for DS1388 is added by extending the DS1337 driver. DS1388 is similar to DS1337. The time registers are offset by 1 (due to support for hundreds of seconds), and there is no century bit. The configuration and trickle charge registers are also different. Tested on hardware with Freescale P2010 and DS1388. Signed-off-by: Kenth Eriksson <kenth.eriksson@transmode.com>
* sh: Add support pin function control using GPIONobuhiro Iwamatsu2012-08-08-0/+630
| | | | | | | | Renesas SH and R-Mobile set up device using PFC. This provide the framework. Most codes were brought from linux kernel. Signed-off-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com> Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
* serial: sh: Add support Renesas R8A7740Hideyuki Sano2012-08-08-7/+14
| | | | | | | The serial device of R8A7740 has the same structure as SH7372 of SH, etc. Signed-off-by: Hideyuki Sano <hideyuki.sano.dn@renesas.com> Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
* serial: sh: Add support Renesas SH73A0Nobuhiro Iwamatsu2012-08-08-7/+14
| | | | | | | The serial device of SH73A0 has the same structure as SH7372 of SH, etc. Signed-off-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com> Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
* spi: Fix merge conflicts - MakefileMichal Simek2012-08-07-1/+0
| | | | | | | | | | | | | | | The patch "spi: tegra2: rename tegra2_spi.* to tegra_spi.*" (sha1: edffa63d3d6e76991998789f9fcbaa483731ca65) renamed tegra2_spi.c to tegra_spi.c and the patch "Merge branch 'master' of git://git.denx.de/u-boot-microblaze" (sha1: d978780b2e676c005460cd561f4f15b5220bdf49) has wrongly resolved confict. This patch fix it. Signed-off-by: Michal Simek <monstr@monstr.eu>
* Merge branch 'master' of git://git.denx.de/u-boot-i2cWolfgang Denk2012-07-31-291/+442
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | * 'master' of git://git.denx.de/u-boot-i2c: km/common: remove printfs for i2c deblocking code CONFIG: SMDK5250: I2C: Enable I2C I2C: Add support for Multi channel I2C: Modify the I2C driver for EXYNOS5 I2C: Move struct s3c24x0_i2c to a common place. EXYNOS: PINMUX: Add pinmux support for I2C EXYNOS5: define EXYNOS5_I2C_SPACING EXYNOS: Add I2C base address. EXYNOS: CLK: Add i2c clock mx6qsabrelite: add i2c multi-bus support imx-common: add i2c.c for bus recovery support i.mx53: add definition for I2C3_BASE_ADDR i.mx: iomux-v3.c: move to imx-common directory i.mx: iomux-v3.h: move to imx-common include directory iomux-v3: remove include of mx6x_pins.h mxc_i2c: finish adding CONFIG_I2C_MULTI_BUS support mxc_i2c: add bus recovery support mxc_i2c: prep work for multiple busses support mxc_i2c: add i2c_regs argument to i2c_imx_stop mxc_i2c: add retries mxc_i2c: check for arbitration lost mxc_i2c: change slave addr if conflicts with destination. mxc_i2c: don't disable controller after every transaction mxc_i2c: place i2c_reset code inline mxc_i2c: place imx_start code inline mxc_i2c: remove redundant read mxc_i2c: combine i2c_imx_bus_busy and i2c_imx_trx_complete into wait_for_sr_state mxc_i2c.c: code i2c_probe as a 0 length i2c_write mxc_i2c: call i2c_imx_stop on error in i2c_read/i2c_write mxc_i2c: create i2c_init_transfer mxc_i2c: clear i2sr before waiting for bit mxc_i2c: create tx_byte function mxc_i2c: remove ifdef of CONFIG_HARD_I2C mxc_i2c: fix i2c_imx_stop i2c: deblock i2c bus also if accessed before realocation Signed-off-by: Wolfgang Denk <wd@denx.de>
| * I2C: Add support for Multi channelRajeshwari Shinde2012-07-31-0/+27
| | | | | | | | | | | | | | | | This adds multiple i2c channel support for I2C. Signed-off-by: Alim Akhtar <alim.akhtar@samsung.com> Signed-off-by: Rajeshwari Shinde <rajeshwari.s@samsung.com> Acked-by: Simon Glass <sjg@chromium.org>
| * I2C: Modify the I2C driver for EXYNOS5Rajeshwari Shinde2012-07-31-77/+117
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch modifies the S3C I2C driver to suppport EXYNOS5. The cahnges made to driver are as follows: - I2C base address is passed as a parameter to many functions to avoid multiple #ifdef - Channel initialisation is moved to a commom funation as it is required by i2c_init. - Hardcoding for I2CCON_ACKGEN removed. - Replaced printf with debug. - Checkpatch issues resolved. - Pinmux setting will be done in board/samsung/smdk5250/smdk5250.c to avoid repeated setting of gpio lines, as it have multi bus support. Signed-off-by: Alim Akhtar <alim.akhtar@samsung.com> Signed-off-by: Doug Anderson <dianders@chromium.org> Signed-off-by: Rajeshwari Shinde <rajeshwari.s@samsung.com> Acked-by: Simon Glass <sjg@chromium.org>
| * I2C: Move struct s3c24x0_i2c to a common place.Rajeshwari Shinde2012-07-31-0/+33
| | | | | | | | | | | | | | | | | | | | struct s3c24x0_i2c is being moved to common local header file so that the same can be used by s3c series and exynos series SoCs. Signed-off-by: Alim Akhtar <alim.akhtar@samsung.com> Signed-off-by: Doug Anderson <dianders@chromium.org> Signed-off-by: Rajeshwari Shinde <rajeshwari.s@samsung.com> Acked-by: Simon Glass <sjg@chromium.org>
| * i.mx: iomux-v3.h: move to imx-common include directoryTroy Kisky2012-07-31-1/+1
| | | | | | | | Signed-off-by: Troy Kisky <troy.kisky@boundarydevices.com>
| * mxc_i2c: finish adding CONFIG_I2C_MULTI_BUS supportTroy Kisky2012-07-31-0/+17
| | | | | | | | Signed-off-by: Troy Kisky <troy.kisky@boundarydevices.com>
| * mxc_i2c: add bus recovery supportTroy Kisky2012-07-31-0/+26
| | | | | | | | | | | | | | | | | | Add support for calling a function that will toggle the SCL line to return the bus to idle condition. The actual toggling function is added in a later patch. Signed-off-by: Troy Kisky <troy.kisky@boundarydevices.com>
| * mxc_i2c: prep work for multiple busses supportTroy Kisky2012-07-31-21/+104
| | | | | | | | Signed-off-by: Troy Kisky <troy.kisky@boundarydevices.com>
| * mxc_i2c: add i2c_regs argument to i2c_imx_stopTroy Kisky2012-07-31-12/+7
| | | | | | | | | | | | | | This is prep work for CONFIG_I2C_MULTI_BUS. Signed-off-by: Troy Kisky <troy.kisky@boundarydevices.com> Acked-by: Marek Vasut <marex@denx.de>
| * mxc_i2c: add retriesTroy Kisky2012-07-31-9/+27
| | | | | | | | | | | | | | Retry unexpected hardware errors. This will not retry a received NAK. Signed-off-by: Troy Kisky <troy.kisky@boundarydevices.com>
| * mxc_i2c: check for arbitration lostTroy Kisky2012-07-31-0/+7
| | | | | | | | | | | | | | No need to continue waiting if arbitration lost. Signed-off-by: Troy Kisky <troy.kisky@boundarydevices.com> Acked-by: Marek Vasut <marex@denx.de>
| * mxc_i2c: change slave addr if conflicts with destination.Troy Kisky2012-07-31-0/+2
| | | | | | | | | | | | | | The i2c controller cannot be both master and slave in the same transaction. Signed-off-by: Troy Kisky <troy.kisky@boundarydevices.com>
| * mxc_i2c: don't disable controller after every transactionTroy Kisky2012-07-31-15/+13
| | | | | | | | | | | | | | This helps in a multiple bus master environment which is why I also added a wait for bus idle. Signed-off-by: Troy Kisky <troy.kisky@boundarydevices.com>
| * mxc_i2c: place i2c_reset code inlineTroy Kisky2012-07-31-12/+3
| | | | | | | | | | | | | | | | imx_reset is only referenced once so move to that location. Signed-off-by: Troy Kisky <troy.kisky@boundarydevices.com> Acked-by: Marek Vasut <marex@denx.de>
| * mxc_i2c: place imx_start code inlineTroy Kisky2012-07-31-33/+20
| | | | | | | | | | | | | | | | imx_start is only referenced once so move to that location. Signed-off-by: Troy Kisky <troy.kisky@boundarydevices.com> Acked-by: Marek Vasut <marex@denx.de>
| * mxc_i2c: remove redundant readTroy Kisky2012-07-31-1/+0
| | | | | | | | | | | | | | | | wait_for_sr_state returns i2sr on success so no need to read again. Signed-off-by: Troy Kisky <troy.kisky@boundarydevices.com> Acked-by: Marek Vasut <marex@denx.de>
| * mxc_i2c: combine i2c_imx_bus_busy and i2c_imx_trx_complete into ↵Troy Kisky2012-07-31-51/+29
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | wait_for_sr_state Not using udelay gives a more accurate timeout. The current implementation of udelay in imx-common does not seem to wait at all for a udelay(1). Signed-off-by: Troy Kisky <troy.kisky@boundarydevices.com> Acked-by: Marek Vasut <marex@denx.de> ---- V2: Added WATCHDOG_RESET as suggested by Marek Vasut add error message when stop fails mxc_i2c: code i2c_probe as a 0 length i2c_write Signed-off-by: Troy Kisky <troy.kisky@boundarydevices.com> Acked-by: Marek Vasut <marex@denx.de> Acked-by: Stefano Babic <sbabic@denx.de>
| * mxc_i2c.c: code i2c_probe as a 0 length i2c_writeTroy Kisky2012-07-31-17/+8
| | | | | | | | | | | | Signed-off-by: Troy Kisky <troy.kisky@boundarydevices.com> Acked-by: Marek Vasut <marex@denx.de> Acked-by: Stefano Babic <sbabic@denx.de>
| * mxc_i2c: call i2c_imx_stop on error in i2c_read/i2c_writeTroy Kisky2012-07-31-3/+7
| | | | | | | | Signed-off-by: Troy Kisky <troy.kisky@boundarydevices.com>
| * mxc_i2c: create i2c_init_transferTroy Kisky2012-07-31-26/+18
| | | | | | | | | | | | | | | | | | Initial code of i2c_read and i2c_write is identical, move to subroutine. Signed-off-by: Troy Kisky <troy.kisky@boundarydevices.com> Acked-by: Marek Vasut <marex@denx.de> Acked-by: Stefano Babic <sbabic@denx.de>
| * mxc_i2c: clear i2sr before waiting for bitTroy Kisky2012-07-31-4/+5
| | | | | | | | | | | | | | | | | | | | | | Let's clear the sr register before waiting for bit to be set, instead of clearing it after hardware sets it. No real operational difference here, but allows combining of i2c_imx_trx_complete and i2c_imx_bus_busy in later patches. Signed-off-by: Troy Kisky <troy.kisky@boundarydevices.com> Acked-by: Marek Vasut <marex@denx.de>
| * mxc_i2c: create tx_byte functionTroy Kisky2012-07-31-58/+24
| | | | | | | | | | | | | | | | Use tx_byte function instead of having 3 copies of the code. Signed-off-by: Troy Kisky <troy.kisky@boundarydevices.com> Acked-by: Marek Vasut <marex@denx.de>
| * mxc_i2c: remove ifdef of CONFIG_HARD_I2CTroy Kisky2012-07-31-5/+1
| | | | | | | | | | | | | | | | This is always selected when CONFIG_I2C_MXC is selected, so it adds no value. Signed-off-by: Troy Kisky <troy.kisky@boundarydevices.com> Acked-by: Marek Vasut <marex@denx.de>
| * mxc_i2c: fix i2c_imx_stopTroy Kisky2012-07-31-1/+1
| | | | | | | | | | | | | | | | | | | | Instead of clearing 2 bits, all the other bits were set because '|=' was used instead of '&='. Signed-off-by: Troy Kisky <troy.kisky@boundarydevices.com> Acked-by: Marek Vasut <marex@denx.de> Acked-by: Stefano Babic <sbabic@denx.de>
* | Merge branch 'master' of git://git.denx.de/u-boot-microblazeWolfgang Denk2012-07-31-0/+351
|\ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | * 'master' of git://git.denx.de/u-boot-microblaze: microblaze: Wire up SPI driver spi: microblaze: Adds driver for Xilinx SPI controller microblaze: intc: Clear interrupt code microblaze: Call serial multi initialization microblaze: Move __udelay implementation microblaze: Remove extern from board.c microblaze: Wire up dts configuration fdt: Add board specific dts inclusion microblaze: Move individual board linker scripts to common script in cpu tree. microblaze: Add gpio.h microblaze: Add missing undefs for UBI and UBIFS microblaze: Expand and correct configuration comments microblaze: Enable ubi support microblaze: Avoid compile error on systems without cfi flash microblaze: Remove wrong define CONFIG_SYS_FLASH_PROTECTION Conflicts: drivers/spi/Makefile Signed-off-by: Wolfgang Denk <wd@denx.de>
| * | spi: microblaze: Adds driver for Xilinx SPI controllerStephan Linz2012-07-31-0/+350
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This is an improved version of the driver patch original submitted by Graeme Smecher <graeme.smecher@mail.mcgill.ca> The changes are: - remove hard coded Xilinx BSP defines (XPAR_SPI_*) and use CONFIG_SYS_SPI_BASE from config.h instead - add extensive register struct definitions - remove offset calculation for register access and use the new register struct instead - move default SPI controller configuration from spi_setup_slave() to spi_claim_bus() - add spi_set_speed() - insert SPI controller deactivation in spi_release_bus() - protect while loops in spi_xfer() with counter / timeouts - support SPI mode flags: LSB_FIRST, CPHA, CPOL, LOOP Come from: http://patchwork.ozlabs.org/patch/71797/ Signed-off-by: Stephan Linz <linz@li-pro.net> Tested-by: Michal Simek <monstr@monstr.eu>
* | | sf: stmicro: add geometrical info for N25Q256 from MicronJérôme Carretero2012-04-08-0/+6
| | | | | | | | | | | | | | | | | | | | | | | | Note: because 4-byte addressing is not supported yet, at the moment only the first 16MiB of the device are available. Signed-off-by: Jérôme Carretero <cJ@zougloub.eu> Signed-off-by: Mike Frysinger <vapier@gentoo.org>
* | | sf: unify status register writing (and thus block unlocking)Mike Frysinger2012-03-04-62/+32
| | | | | | | | | | | | | | | | | | | | | | | | The only two drivers to write the status register do it in the same way, so unify the implementations. This also makes the block unlock logic the same. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
* | | sf: sst: inline duplicate write enable helper funcsMike Frysinger2012-03-04-22/+4
| | | | | | | | | | | | | | | | | | | | | The local sst enable/disable write funcs don't really add anything over the common API, so just inline the common calls directly. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
* | | sf: eon: drop duplicate idMike Frysinger2012-03-04-5/+0
| | | | | | | | | | | | | | | | | | Looks like Shaohui Xie's patch got merged twice. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
* | | sf: unify erase commandsMike Frysinger2012-03-04-71/+18
| | | | | | | | | | | | | | | | | | | | | | | | Analysis of the flash drivers shows that they all use 0x20 if the erase size is 4KiB, or 0xd8 if it's larger. So with this info in hand, we can unify all the erase functionality in one place. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
* | | sf: inline data constantsMike Frysinger2012-03-04-105/+12
| |/ |/| | | | | | | | | | | | | | | I imagine much of these constants are due to copy & pasting previous drivers rather than an actual reflection of the hardware layout. At any rate, inline the info that we don't care about externally as it shrinks things nicely. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
* | Merge branch 'next' of git://git.denx.de/u-bootWolfgang Denk2012-07-30-261/+378
|\ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | * 'next' of git://git.denx.de/u-boot: MPC8xx: Fixup warning in arch/powerpc/cpu/mpc8xx/cpu.c doc: cleanup - move board READMEs into respective board directories net: sh_eth: add support for SH7757's GETHER net: sh_eth: modify the definitions of regsiter net: sh_eth: add SH_ETH_TYPE_ condition net: sh_eth: clean up for the SH7757's code net: fec_mxc: Fix MDC for xMII net: fec_mxc: Fix setting of RCR for xMII net: nfs: make NFS_TIMEOUT configurable net: Inline the new eth_setenv_enetaddr_by_index function net: allow setting env enetaddr from net device setting net/designware: Consecutive writes to the same register to be avoided CACHE: net: asix: Fix asix driver to work with data cache on net: phy: micrel: make ksz9021 phy accessible net: abort network initialization if the PHY driver fails phylib: phy_startup() should return an error code on failure net: tftp: fix type of block arg to store_block Signed-off-by: Wolfgang Denk <wd@denx.de>
| * | net: sh_eth: add support for SH7757's GETHERYoshihiro Shimoda2012-07-23-0/+9
| | | | | | | | | | | | | | | | | | | | | | | | | | | SH7757 has 2 ETHERs and 2 GETHERs. This patch supports the SH7757's GETHER. If CONFIG_SH_ETHER_USE_GETHER is defined using SH7757, the driver handles the GETHER. Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com> Acked-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>
| * | net: sh_eth: modify the definitions of regsiterYoshihiro Shimoda2012-07-23-181/+258
| | | | | | | | | | | | | | | | | | | | | | | | | | | The previous code had many similar definitions in each CPU. This patch borrows from the sh_eth driver of Linux kernel. Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com> Acked-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>
| * | net: sh_eth: add SH_ETH_TYPE_ conditionYoshihiro Shimoda2012-07-23-33/+32
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | At the moment, the driver supports the following CPUs: - GETHER (Gigabit Ethernet) : SH7763, SH7734 - ETHER (Fast Ethernet) : SH7724, SH7757 And the driver had the following "#if": #if defined(CONFIG_CPU_SH7763) || defined(CONFIG_CPU_SH7734) #if !defined(CONFIG_CPU_SH7757) && !defined(CONFIG_CPU_SH7724) - Those are for GETHER #if defined(CONFIG_CPU_SH7724) || defined(CONFIG_CPU_SH7757) - This is for ETHER So, for clean up the code, this patch adds SH_ETH_TYPE_GETHER and SH_ETH_TYPE_ETHER. And then, the patch modifies the above "#if". Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com> Acked-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>
| * | net: sh_eth: clean up for the SH7757's codeYoshihiro Shimoda2012-07-23-20/+3
| | | | | | | | | | | | | | | | | | | | | | | | The SH7757's ETHER can work using the SH7724's setting. So, the patch modifies it. Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com> Acked-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>
| * | net: fec_mxc: Fix MDC for xMIIbenoit.thebaudeau@advans2012-07-19-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | The MDC signal is available on all xMII (i.e. 'not 7-wire') interfaces, so mii_speed has to be set for all these interfaces, and not only for MII. Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com> Cc: Joe Hershberger <joe.hershberger@gmail.com> Cc: Stefano Babic <sbabic@denx.de>
| * | net: fec_mxc: Fix setting of RCR for xMIIbenoit.thebaudeau@advans2012-07-19-5/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | At least on i.MX25, the RMII mode did not work, which is fixed by this patch. The MII_MODE bit of the FEC RCR register means xMII, i.e. 'not 7-wire', so set it accordingly. According to the xMII and 7-wire (aka GPSI) standards, full duplex should be available on xMII, but not on 7-wire, so set FCE accordingly. The FEC may support full duplex for 7-wire too, but the reference manual does not say that, so avoid an invalid assumption. Actually, the choice between half and full duplex also depends on the endpoint/switch/repeater configuration, so a config option could be added for that, but there has been no need for it so far. Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com> Cc: Joe Hershberger <joe.hershberger@gmail.com> Cc: Stefano Babic <sbabic@denx.de>
| * | Merge branch 'next' of git://git.denx.de/u-boot-net into nextWolfgang Denk2012-07-12-24/+75
| |\ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | * 'next' of git://git.denx.de/u-boot-net: net: Inline the new eth_setenv_enetaddr_by_index function net: allow setting env enetaddr from net device setting net/designware: Consecutive writes to the same register to be avoided CACHE: net: asix: Fix asix driver to work with data cache on net: phy: micrel: make ksz9021 phy accessible net: abort network initialization if the PHY driver fails phylib: phy_startup() should return an error code on failure net: tftp: fix type of block arg to store_block Signed-off-by: Wolfgang Denk <wd@denx.de>
| | * | net/designware: Consecutive writes to the same register to be avoidedDinh Nguyen2012-07-11-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This commit is an add-on to f6c4191f. There are a few registers where consecutive writes to the same location should be avoided or have a delay. According to Synopsys, here is a list of the registers and bit(s) where consecutive writes should be avoided or a delay is required: DMA Registers: Register 0 Bit 7 Register 6 All bits except for 24, 16-13, 2-1. GMAC Registers: Registers 0-3 All bits Registers 6-7 All bits Register 10 All bits Register 11 All bits except for 5-6. Registers 16-47 All bits Register 48 All bits except for 18-16, 14. Register 448 Bit 4. Register 459 Bits 0-3. Signed-off-by: Dinh Nguyen <dinguyen@altera.com> Reviewed-by: Matthew Gerlach <mgerlach@altera.com> Acked-by: Amit Virdi <amit.virdi@st.com>
| | * | CACHE: net: asix: Fix asix driver to work with data cache onMarek Vasut2012-07-11-13/+17
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The asix driver did not align buffers, therefore it didn't work with data cache enabled. Fix this. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Joe Hershberger <joe.hershberger@gmail.com> Acked-by: Joe Hershberger <joe.hershberger@gmail.com>
| | * | net: phy: micrel: make ksz9021 phy accessibleTroy Kisky2012-07-11-2/+13
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Micrel accidentally used the same part number for the KS8721 and KSZ9021. So, both cannot be in the same build of u-boot. Add a config option to handle this. Signed-off-by: Troy Kisky <troy.kisky@boundarydevices.com> Acked-by: Vladimir Zapolskiy <vz@mleia.com>
generated by cgit v1.1 at 2024-11-09 22:44:44 +0000