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* dm: ns16550: Correct the probe logic for platform dataSimon Glass2014-10-23-2/+3
| | | | | | | | | | | | The probe logic sets up the pointer to the platform data in the device tree decode method. It should be done in the probe() method, and anyway the device tree decode method can't be used when CONFIG_OF_CONTROL is not enabled. Fix these two problems. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@ti.com>
* dm: ns16550: Use an address instead of a pointer for the uart baseSimon Glass2014-10-23-3/+3
| | | | | | | | | | | It is inconvenient to have to use casts when specifying platform data. Also it is not strictly correct, since we should use map_sysmem() to convert an address to a pointer. Adjust the platform data to use an address. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@ti.com>
* dm: serial: ns16550: Correct logic for checking for characterSimon Glass2014-10-23-1/+1
| | | | | | | | | There is a bug in the logic which checks for an available character. This can cause invalid characters to be received - this was noticed on beaglebone. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@ti.com>
* dm: serial: Reset the watchdog while waiting in getc()Simon Glass2014-10-23-0/+5
| | | | | | | | | | | | | We have moved the busy-wait loop out of drivers and into the uclass. This means that we must reset the watchdog when busy-waiting. Note: some drivers may still have a busy-wait even with driver model, as a transition mechanism. Driver model will tolerate this, and is can be cleaned up when all users of the driver use driver model. An example is ns16550. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@ti.com>
* dm: gpio: Support numbered GPIOsSimon Glass2014-10-23-12/+25
| | | | | | | | | | | | At present banks must be named and it is not possible to refer to GPIOs by number in driver model. Some boards use numbering - e.g. OMAP. It is fairly easy to support by detecting the absense of a bank name (which starts with a letter). Add support for numbered GPIOs in addition to the existing bank support. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@ti.com>
* Merge branch 'master' of git://git.denx.de/u-boot-tegraTom Rini2014-10-23-1/+4
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| * tegra: gpio: fix null label regressionMarcel Ziswiler2014-10-22-0/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Fix Tegra GPIO driver to not crash resp. misbehave upon requesting GPIOs with an empty aka NULL label. As the driver uses exclusively the label to check for reservation status actually supplying one is mandatory! This fixes a regression introduced by commit: 2fccd2d96badcdf6165658a99771a4c475586279 tegra: Convert tegra GPIO driver to use driver model Signed-off-by: Marcel Ziswiler <marcel@ziswiler.com> Acked-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com>
| * mmc: Tegra: Fix timeout issue seen on certain eMMC partsMarcel Ziswiler2014-10-22-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | During rigorous testing of our latest update infrastructure I came across quite consistent timeouts on certain eMMC parts (e.g. Hynix H26M21001ECR) when writing big (e.g. in excess of 400 MB) file system images: MMC write: dev # 0, block # 40960, count 944128 ... mmc_send_cmd_bounced: MMC Timeout Interrupt status 0x00000001 Interrupt status enable 0xdfff003b Interrupt signal enable 0xdfff0002 Present status 0x01870106 mmc write failed Comparing the various data sheets I came across the following timeout specification: Secure Erase/TRIM Timeout=300ms*2*10=6000ms Unfortunately empirical testing still failed albeit much more rarely. Increasing the timeout to 8000ms made it finally disappear entirely. This patch allows us writing various eMMC parts without seeing any further issues. Signed-off-by: Marcel Ziswiler <marcel@ziswiler.com> Signed-off-by: Tom Warren <twarren@nvidia.com>
* | i2c: mvtwsi: Add support for Marvell Armada XPStefan Roese2014-10-23-1/+1
| | | | | | | | | | | | | | | | To support the Armada XP SoC, we just need to include the correct header. Signed-off-by: Stefan Roese <sr@denx.de> Acked-by: Heiko Schocher <hs@denx.de> Tested-by: Luka Perkov <luka@openwrt.org>
* | net: mvneta.c: Add support for the ethernet controller of the Marvell Armada ↵Stefan Roese2014-10-23-0/+1654
| | | | | | | | | | | | | | | | | | | | | | | | | | | | XP SoC This patch adds support for the NETA ethernet controller which is integrated in the Marvell Armada XP SoC's. This port is based on the Linux driver which has been stripped of the in U-Boot unused portions. Tested on the Marvell MV78460 eval board db-78460-bp. Signed-off-by: Stefan Roese <sr@denx.de> Cc: Joe Hershberger <joe.hershberger@gmail.com> Tested-by: Luka Perkov <luka@openwrt.org>
* | spi: kirkwood_spi.c: Change KW_SPI_BASE to MVEBU_SPI_BASEStefan Roese2014-10-23-1/+2
| | | | | | | | | | | | | | | | | | | | This makes is possible to use this SPI driver from other MVEBU SoC's as well. As the upcoming Armada XP support will do. Signed-off-by: Stefan Roese <sr@denx.de> Reviewed-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com> Tested-by: Luka Perkov <luka@openwrt.org> Acked-by: Prafulla Wadaskar <prafulla@marvell.com>
* | spi: kirkwood_spi.c: Compile MPP (pin-mux) only for kirkwood SoC'sStefan Roese2014-10-23-0/+10
| | | | | | | | | | | | | | | | | | | | Compile the pin multiplexing only on Kirkwood platforms. As the Armada XP doesn't need it. Signed-off-by: Stefan Roese <sr@denx.de> Reviewed-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com> Tested-by: Luka Perkov <luka@openwrt.org> Acked-by: Prafulla Wadaskar <prafulla@marvell.com>
* | arm: marvell: Move arch-kirkwood/spi.h to arch-mvebu/spi.hStefan Roese2014-10-23-1/+1
| | | | | | | | | | | | | | | | | | | | | | This move makes it possible to use this kirkwood SPI driver from other MVEBU platforms as well. This will be used by the upcoming Armada XP support. Signed-off-by: Stefan Roese <sr@denx.de> Reviewed-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com> Tested-by: Luka Perkov <luka@openwrt.org> Acked-by: Prafulla Wadaskar <prafulla@marvell.com>
* | arm: marvell: Move arch/kirkwood.h to arch/soc.hStefan Roese2014-10-23-9/+9
| | | | | | | | | | | | | | | | | | This move makes is possible to use this header not only from kirkwood platforms but from all Marvell mvebu platforms. Signed-off-by: Stefan Roese <sr@denx.de> Tested-by: Luka Perkov <luka@openwrt.org> Acked-by: Prafulla Wadaskar <prafulla@marvell.com>
* | Merge git://git.denx.de/u-boot-x86Tom Rini2014-10-23-2/+2
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| * | x86: cros_ec: Update LPC driver for new cros_ec headerSimon Glass2014-10-22-2/+2
| | | | | | | | | | | | | | | | | | There was a minor rename of one of the defines, so update the driver. Signed-off-by: Simon Glass <sjg@chromium.org>
* | | dm: serial: Support driver model in pl01x driverSimon Glass2014-10-22-0/+73
| | | | | | | | | | | | | | | | | | | | | | | | Add driver model support in this driver, using platform data provided by the board. Signed-off-by: Simon Glass <sjg@chromium.org> Tested-by: Stephen Warren <swarren@wwwdotorg.org>
* | | dm: serial: Tidy up the pl01x driverSimon Glass2014-10-22-140/+165
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Adjust the driver so that leaf functions take a pointer to the serial port register base. Put all the global configuration in the init function, and use the same settings from then on. This makes it much easier to move to driver model without duplicating the code, since with driver model we use platform data rather than global settings. The driver is compiled with either the CONFIG_PL010_SERIAL or CONFIG_PL011_SERIAL option and this determines the uart type. With driver model this needs to come in from platform data, so create a new CONFIG_PL01X_SERIAL config which brings in the driver, and adjust the driver to support both peripheral variants. Signed-off-by: Simon Glass <sjg@chromium.org> Tested-by: Stephen Warren <swarren@wwwdotorg.org>
* | | dm: rpi: Convert GPIO driver to driver modelSimon Glass2014-10-22-23/+157
| | | | | | | | | | | | | | | | | | | | | | | | | | | Convert the BCM2835 GPIO driver to use driver model, and switch over Raspberry Pi to use this, since it is the only board. Signed-off-by: Simon Glass <sjg@chromium.org> Tested-by: Stephen Warren <swarren@wwwdotorg.org> Acked-by: Stephen Warren <swarren@wwwdotorg.org>
* | | dm: core: Add support for simple-busSimon Glass2014-10-22-0/+34
| | | | | | | | | | | | | | | | | | | | | Add a driver for the simple-bus nodes, which allows devices within these nodes to be bound. Signed-off-by: Simon Glass <sjg@chromium.org>
* | | dm: imx: serial: Support driver model in the MXC serial driverSimon Glass2014-10-22-25/+145
| | | | | | | | | | | | | | | | | | | | | Add driver model support with this driver. Boards which use this driver should define platform data in their board files. Signed-off-by: Simon Glass <sjg@chromium.org>
* | | dm: imx: gpio: Support driver model in MXC gpio driverSimon Glass2014-10-22-1/+303
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add driver model support with this driver. In this case the platform data is in the driver. It would be better to put this into an SOC-specific file, but this is best attempted when more boards are moved over to use driver model. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Igor Grinberg <grinberg@compulab.co.il>
* | | dm: serial: Put common code into separate functionsSimon Glass2014-10-22-15/+17
| | | | | | | | | | | | | | | | | | | | | Avoid duplicating the code which deals with getc() and putc(). It is fairly simple, but may expand later. Signed-off-by: Simon Glass <sjg@chromium.org>
* | | dm: exynos: cros_ec: Move cros_ec_spi to driver modelSimon Glass2014-10-22-9/+78
| | | | | | | | | | | | | | | | | | | | | | | | Adjust this driver to use driver model and move smdk5420 boards over to use it. Acked-by: Jagannadha Sutradharudu Teki <jagannadh.teki@gmail.com> Signed-off-by: Simon Glass <sjg@chromium.org>
* | | dm: sandbox: cros_ec: Move sandbox cros_ec to driver moduleSimon Glass2014-10-22-5/+85
| | | | | | | | | | | | | | | | | | | | | | | | Adjust the sandbox cros_ec emulation driver to work with driver model, and switch over to driver model for sandbox cros_ec. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Jagannadha Sutradharudu Teki <jagannadh.teki@gmail.com>
* | | dm: cros_ec: Add support for driver modelSimon Glass2014-10-22-14/+117
| | | | | | | | | | | | | | | | | | | | | | | | Add support for driver model if enabled. This involves minimal changes to the code, mostly just plumbing around the edges. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Jagannadha Sutradharudu Teki <jagannadh.teki@gmail.com>
* | | dm: tegra: spi: Convert to driver modelSimon Glass2014-10-22-534/+392
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This converts the Tegra SPI drivers to use driver model. This is tested on: - Tegra20 - trimslice - Tegra30 - beaver - Tegra124 - dalmore (not tested on Tegra124) Reviewed-by: Jagannadha Sutradharudu Teki <jagannadh.teki@gmail.com> Signed-off-by: Simon Glass <sjg@chromium.org>
* | | dm: sf: sandbox: Convert SPI flash driver to driver modelSimon Glass2014-10-22-47/+291
| | | | | | | | | | | | | | | | | | | | | Convert sandbox's spi flash emulation driver to use driver model. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Jagannadha Sutradharudu Teki <jagannadh.teki@gmail.com>
* | | dm: Convert spi_flash_probe() and 'sf probe' to use driver modelSimon Glass2014-10-22-2/+64
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | We want the SPI flash probing feature to operate as a standard driver. Add a driver for the basic probing feature used by most boards. This will be activated by device_probe() as with any other driver. The 'sf probe' command currently keeps track of the SPI slave that it last used. This doesn't work with driver model, since some other driver or system may have probed the device and have access to it too. On the other hand, if we try to probe a device twice the second probe is a nop with driver model. Fix this by searching for the matching device, removing it, and then probing it again. This should work as expected regardless of other device activity. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Jagannadha Sutradharudu Teki <jagannadh.teki@gmail.com>
* | | dm: sf: Add a uclass for SPI flashSimon Glass2014-10-22-1/+69
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add a driver model uclass for SPI flash which supports the common operations (read, write, erase). Since we must keep support for the non-dm interface, some modification of the spi_flash header is required. CONFIG_DM_SPI_FLASH is used to enable driver model for SPI flash. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Jagannadha Sutradharudu Teki <jagannadh.teki@gmail.com>
* | | spi: Use error return value in sf_opsSimon Glass2014-10-22-33/+57
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Adjust spi_flash_probe_slave() to return an error value instead of a pointer so we get the correct error return. Have the caller allocate memory for spi_flash to simplify error handling, and also so that driver model can use its existing allocated memory. Add a spi.h include in the sf_params file. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Jagannadha Sutradharudu Teki <jagannadh.teki@gmail.com>
* | | sf: Tidy up public and private header filesSimon Glass2014-10-22-7/+62
| | | | | | | | | | | | | | | | | | | | | | | | Since spi_flash.h is supposed to be the public API for SPI flash, move private things to sf_internal.h. Also tidy up a few comment nits. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Jagannadha Sutradharudu Teki <jagannadh.teki@gmail.com>
* | | dm: exynos: Convert SPI to driver modelSimon Glass2014-10-22-333/+180
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Move the exynos SPI driver over to driver model. This removes quite a bit of boilerplate from the driver, although it adds some for driver model. A few device tree additions are needed to make the SPI flash available. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Jagannadha Sutradharudu Teki <jagannadh.teki@gmail.com>
* | | dm: spi: Add soft_spi implementationSimon Glass2014-10-22-0/+253
| | | | | | | | | | | | | | | | | | | | | | | | Add a new implementation of soft_spi that uses device tree to specify the GPIOs. This will replace soft_spi_legacy for boards which use driver model. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Jagannadha Sutradharudu Teki <jagannadh.teki@gmail.com>
* | | dm: spi: Remove SPI_INIT featureSimon Glass2014-10-22-5/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This feature provides for init of a single SPI port for the soft SPI feature. It is not really compatible with driver model since it assumes a single SPI port. Also, inserting SPI init into the driver by means of a #define is not very nice. This feature is not used by any active boards, so let's remove it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Jagannadha Sutradharudu Teki <jagannadh.teki@gmail.com>
* | | dm: spi: Rename soft_spi.c to soft_spi_legacy.cSimon Glass2014-10-22-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | Reserve the 'normal' name for use by driver model, and rename the old driver so that it is clear that it is for 'legacy' drivers only. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Jagannadha Sutradharudu Teki <jagannadh.teki@gmail.com>
* | | dm: sandbox: spi: Move to driver modelSimon Glass2014-10-22-126/+74
| | | | | | | | | | | | | | | | | | | | | | | | Adjust the sandbox SPI driver to support driver model and move sandbox over to driver model for SPI. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Jagannadha Sutradharudu Teki <jagannadh.teki@gmail.com>
* | | dm: Add spi.h header to a few filesSimon Glass2014-10-22-0/+2
| | | | | | | | | | | | | | | | | | | | | | | | Some files are using SPI functions but not explitly including the SPI header file. Fix this, since driver model needs it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Jagannadha Sutradharudu Teki <jagannadh.teki@gmail.com>
* | | dm: sandbox: Add a SPI emulation uclassSimon Glass2014-10-22-0/+16
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | U-Boot includes a SPI emulation driver already but it is not explicit, and is hidden in the SPI flash code. Conceptually with sandbox's SPI implementation we have a layer which creates SPI bus transitions and a layer which interprets them, currently only for SPI flash. The latter is actually an emulation, and it should be possible to add more than one emulation - not just SPI flash. Add a SPI emulation uclass so that other emulations can be plugged in to support different types of emulated devices on difference buses/chip selects. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Jagannadha Sutradharudu Teki <jagannadh.teki@gmail.com>
* | | dm: spi: Add a uclass for SPISimon Glass2014-10-22-0/+394
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add a uclass which provides access to SPI buses and includes operations required by SPI. For a time driver model will need to co-exist with the legacy SPI interface so some parts of the header file are changed depending on which is in use. The exports are adjusted also since some functions are not available with driver model. Boards must define CONFIG_DM_SPI to use driver model for SPI. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Jagannadha Sutradharudu Teki <jagannadh.teki@gmail.com> (Discussed some follow-up comments which will address in future add-ons)
* | | dm: core: Allow parents to pass data to children during probeSimon Glass2014-10-22-1/+8
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Buses sometimes want to pass data to their children when they are probed. For example, a SPI bus may want to tell the slave device about the chip select it is connected to. Add a new function to permit the parent data to be supplied to the child. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Jagannadha Sutradharudu Teki <jagannadh.teki@gmail.com>
* | | dm: core: Add functions for iterating through device childrenSimon Glass2014-10-22-0/+27
| | | | | | | | | | | | | | | | | | | | | | | | Buses need to iterate through their children in some situations. Add a few functions to make this easy. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Jagannadha Sutradharudu Teki <jagannadh.teki@gmail.com>
* | | dm: exynos: Move serial to driver modelSimon Glass2014-10-22-183/+72
| | | | | | | | | | | | | | | | | | | | | Change the Exynos serial driver to work with driver model and switch over all relevant boards to use it. Signed-off-by: Simon Glass <sjg@chromium.org>
* | | dm: exynos: gpio: Convert to driver modelSimon Glass2014-10-22-136/+288
| | | | | | | | | | | | | | | | | | | | | Convert the exynos GPIO driver to driver model. This implements the generic GPIO interface but not the extra Exynos-specific functions. Signed-off-by: Simon Glass <sjg@chromium.org>
* | | dm: exynos: Make sure that GPIOs are requestedSimon Glass2014-10-22-1/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | With driver model GPIOs must be requested before use. Make sure this is done correctly. (Note that the soft SPI part of universal is omitted, since this driver is about to be replaced with a driver-model-aware version) Signed-off-by: Simon Glass <sjg@chromium.org>
* | | dm: exynos: Tidy up GPIO definesSimon Glass2014-10-22-10/+11
| | | | | | | | | | | | | | | | | | | | | | | | | | | The defines at the top of the GPIO driver use single-character names for parameters which are not very descriptive. Improve these to use descriptive parameter names. Signed-off-by: Simon Glass <sjg@chromium.org>
* | | dm: exynos: Tidy up GPIO headersSimon Glass2014-10-22-2/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | The wrong header is being included, thus requiring the code to re-declare the generic GPIO interface in each GPIO header. Fix this. Signed-off-by: Simon Glass <sjg@chromium.org>
* | | dm: simplify the loop in lists_driver_lookup_name()Masahiro Yamada2014-10-22-8/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | if (strncmp(name, entry->name, len)) continue; /* Full match */ if (len == strlen(entry->name)) return entry; is equivalent to: if (!strcmp(name, entry->name)) return entry; The latter is simpler. Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com> Acked-by: Simon Glass <sjg@chromium.org> Acked-by: Igor Grinberg <grinberg@compulab.co.il>
* | | dm: do not check the existence of uclass operationMasahiro Yamada2014-10-22-4/+0
|/ / | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The function uclass_add() checks uc_drv->ops as follows: if (uc_drv->ops) { dm_warn("No ops for uclass id %d\n", id); return -EINVAL; } It seems odd because it warns "No ops" when uc_drv->ops has non-NULL pointer. (Looks opposite.) Anyway, most of UCLASS_DRIVER entries have no .ops member. This check makes no sense. Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com> Acked-by: Simon Glass <sjg@chromium.org>
* | Merge branch 'master' of git://git.denx.de/u-boot-fsl-qoriqTom Rini2014-10-20-0/+2051
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