| Commit message (Collapse) | Author | Age | Lines |
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
| |
Let's use the i.MX common miscellaneous reset API
to reset the LCDIF block so that we may eliminate
a random hang issue at the arch_preboot_os() stage
when we disable the LCDIF. This patch also waits
for a VSYNC interrupt to guarantee the reset is
done at the VSYNC edge, which somehow makes the
LCDIF consume the display FIFO(?) and helps the
LCDIF work normally at the kernel stage.
Tested-by: Jason Liu <r64343@freescale.com>
Tested-by: Sandor Yu <R01008@freescale.com>
Tested-by: Ye.Li <B37916@freescale.com>
Tested-by: Guo Sally <b38912@freescale.com>
Signed-off-by: Liu Ying <Ying.Liu@freescale.com>
(cherry picked from commit 45fa2ad38b846596e61ce8fc477713dede8a43e7)
|
|
|
|
|
|
|
|
| |
The mxc gis driver should not disable mxsfb, instead,
mxsfb could be disabled in machine layer.
Signed-off-by: Liu Ying <Ying.Liu@freescale.com>
(cherry picked from commit d74815051120adcad041f4480db49402db4f9823)
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
| |
Vadc need long time to auto standards detection,
the default standard is NTSC, if vadc connect to PAL
camera and no enough time to detect the video mode,
driver will get wrong standard.
Confirmation from chip design architecture that auto detect function
is not required by rear-view camera application.
Setting register vdec_stddbg standard_filte bits to 0
makes the standard detection faster, the issue duplicate
decrease to 1%.
Signed-off-by: Sandor Yu <R01008@freescale.com>
|
|
|
|
|
|
|
|
| |
Add gis module, current gis is support vadc input.
Add power down function to lcdif driver.
Signed-off-by: Sandor Yu <R01008@freescale.com>
Signed-off-by: Ye.Li <B37916@freescale.com>
|
|
|
|
|
|
|
|
| |
Add pxp module.
Support csc between YUV444 and RGB888 and scaling.
Signed-off-by: Sandor Yu <R01008@freescale.com>
Signed-off-by: Ye.Li <B37916@freescale.com>
|
|
|
|
|
|
|
| |
Add csi module.
Signed-off-by: Sandor Yu <R01008@freescale.com>
Signed-off-by: Ye.Li <B37916@freescale.com>
|
|
|
|
|
|
|
|
| |
Add vadc module.
Both PAL and NTSC mode can work.
Signed-off-by: Sandor Yu <R01008@freescale.com>
Signed-off-by: Ye.Li <B37916@freescale.com>
|
|
|
|
|
|
|
|
|
|
|
|
| |
Add a new interface "mxs_lcd_panel_setup" to setup fb parameters and
specifies the LCDIF controller for multiple controllers of iMX6SX.
Pass fb parameters via "videomode" env remains work if the new interface
is not called before video initialization.
Modify LCDIF clock interface "mxs_set_lcdclk" to support multiple
LCDIF controllers on iMX6SX.
Signed-off-by: Ye.Li <B37916@freescale.com>
|
|
|
|
|
|
|
| |
Add BSP codes to mx6sxsabresd to support android uboot features:
fastboot, booti and recovery
Signed-off-by: Ye.Li <B37916@freescale.com>
|
|
|
|
|
|
|
|
|
|
|
|
| |
For GPIO group which shared by multiple masters, it may set in RDC
to shared and semaphore required. Before access the GPIO register,
the GPIO driver must get the RDC semaphore, and release the semaphore
after the GPIO register access.
When CONFIG_MXC_RDC is set, the features related to RDC semaphores
is enabled in mxc_gpio driver.
Signed-off-by: Ye.Li <B37916@freescale.com>
|
|
|
|
|
|
|
|
|
|
|
|
|
|
| |
1. iMX6SX enet rx have 64 bytes alignment limitation for DMA transfer.
For i.MX6SX platform, need to add below define in config file:
#define CONFIG_FEC_DMA_MINALIGN 64
2. Change to check READY bit in BD, not check the TDAR. On iMX6SX, FEC will
clear the TDAR prior than the READY bit of last BD. Since fec driver only
prepare two BD for transmit, this cause the BD send failed at the third
packet.
Signed-off-by: Fugang Duan <B38611@freescale.com>
Signed-off-by: Ye.Li <B37916@freescale.com>
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
| |
Enable the Quadspi read/write/erase functions.
Add two configurations "CONFIG_QSPI_BASE" and "CONFIG_QSPI_MEMMAP_BASE"
for QSPI registers base and AHB memory base.
Use "bus" and "cs" parameters to denote 4 flash chip connected on one QuadSPI:
SFA1: bus 0, cs 0
SFA2: bus 0, cs 1
SFB1: bus 1, cs 0
SFB2: bus 1, cs 1
Currently in uboot, the SPI flash framework does not have way to notify the
flash size to the driver. It brings a problem for QSPI driver to set the memory
map space of each chip. In this patch, we fix the mem map space of each chip
to 64MB(total is 256MB). So for each flash device, driver support 64MB at most.
In addition, because u-boot SPI flash framework only supports 24bits address mode,
and uses EAR register to switch bank for flash larger than 16MB. The QuadSPI does
not support this way when reading data from AHB address. Thus, only lower 16MB
is supported.
Signed-off-by: Huang Shijie <b32955@freescale.com>
Signed-off-by: Allen Xu <b45815@freescale.com>
Signed-off-by: Ye.Li <B37916@freescale.com>
|
|
|
|
|
|
|
|
| |
The reset value of "uSDHCx_INT_STATUS_EN" register is changed to 0
on iMX6SX. So the fsl_esdhc driver must update to set the register,
otherwise no state can be detected.
Signed-off-by: Ye.Li <B37916@freescale.com>
|
|
|
|
|
|
|
|
|
|
|
| |
To be compatible with more USB otg lines which has micro port B to
connect imx6 OTG port when imx6 working at host mode, remove the
checking for the OTG ID with the init type. Only use the init type
for the power and controller initialization.
Use same EHCI register base address for various imx6 platform.
Signed-off-by: Ye.Li <B37916@freescale.com>
|
|
|
|
|
|
|
|
|
|
|
|
| |
Current code use the hardcoded ECC strength which is not aligned with
the kernel.
This patch use the same ECC strength as used in the kernel.
We do not support the NAND whose OOB size is larger then 512bytes.
Signed-off-by: Huang Shijie <b32955@freescale.com>
Signed-off-by: Ye.Li <B37916@freescale.com>
|
|
|
|
|
|
|
|
|
|
|
| |
Instead of waiting for DC triple buffer to be cleared, this patch changes
to wait for a relevant DP sync flow end irq when disabling sync BG flows.
In this way, we align the implement to the FSL internal IPUv3 driver.
After applying this patch, the uboot hang up issue at the arch_preboot_os
stage on the MX6DL platforms is not observed any more.
Signed-off-by: Liu Ying <Ying.Liu@freescale.com>
Signed-off-by: Nitin Garg <nitin.garg@freescale.com>
|
|
|
|
|
|
|
|
|
|
|
|
| |
-Change HDMI video mode to VGA.
-Add pixel clock fraction part setting in IPU driver,
fix video mode timing issue.
-Add overflow state clear workaround,
fix kernel hang in HDMI driver issue.
-Correct IPU clock to 264MHz.
Signed-off-by: Sandor Yu <R01008@freescale.com>
Signed-off-by: Nitin Garg <nitin.garg@freescale.com>
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
| |
When configure the USDHC driver to PIO mode by defining
"CONFIG_SYS_FSL_ESDHC_USE_PIO", the SD/MMC read and write will fail.
Two bugs in the driver to cause the issue:
1. The read buffer was invalidated after reading from DATAPORT register,
which should be only applied to DMA mode. The valid data in cache was
overwritten by physical memory.
2. The watermarks are not set in PIO mode, will cause according state not
be set.
Signed-off-by: Ye.Li <B37916@freescale.com>
(cherry picked from commit e2ced39867a3001390bd23069e56b513ed268bb0)
Signed-off-by: Nitin Garg <nitin.garg@freescale.com>
|
|
|
|
|
|
|
|
|
|
|
|
|
| |
When booting in eMMC fast boot, the uboot v2013.04 always hangs.
The root cause is that MMC host does not exit from boot mode after
bootrom loading image. So the first command 'CMD0' sent
in uboot will pull down the CMD line to low and cause errors.
This patch cleans the MMC boot register in "mmc_init" to put the
MMC host back to normal mode.
Signed-off-by: Ye Li <b37916@freescale.com>
Signed-off-by: Nitin Garg <nitin.garg@freescale.com>
|
|
|
|
|
|
|
|
|
|
|
|
| |
Implement simple functionalities for MAX7310 GPIO input and output.
Because MAX7310 is a off-chip device and need to co-exist with
on-chip GPIO, new APIs are added specifically for expander device.
CONFIG_MAX7310_IOEXP is used to enable the MAX7310 driver. The I2C
related configurations also need to set together.
Signed-off-by: Ye.Li <B37916@freescale.com>
Signed-off-by: Nitin Garg <nitin.garg@freescale.com>
|
|
|
|
|
|
|
|
|
| |
Set Power polarity in CTRL register to active-high to control
the off-chip power switch.
Update USB base address to support imx6sl.
Signed-off-by: Nitin Garg <nitin.garg@freescale.com>
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
| |
Support android features:
fastboot, booti command and recovery for sabresd SD, sabresd eMMC,
sabreauto SD, sabreauto NAND.
For all booting media (SD, eMMC, NAND), inherits the partitions layout
from v2009.08. Fastboot will detect the booting media to replace
hardcoding fastboot device. SATA is not supported.
FDT is supported to use the "unused" fields in bootimg header which
requires the FDT to be combined into the boot.img.
For non-FDT boot.img, the "unused" fields should left to NULL and is
compatible to boot.
Signed-off-by: Ye.Li <B37916@freescale.com>
Signed-off-by: Nitin Garg <nitin.garg@freescale.com>
|
|
|
|
|
|
|
| |
i.MX6sl evk has keyboards on the board, so add mxc_keyb driver to
support key press checking.
Signed-off-by: Nitin Garg <nitin.garg@freescale.com>
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
| |
Add EPDC splash screen feature for MX6SL EVK, and MX6DL SABRESD board.
- Currently, splash screen consists of a simple black border
around a white screen. Done this way to save in memory footprint.
- EPDC splash screen is disabled by default in the config file for MX6DL_SABRESD
and MX6SL_EVK. If left enabled, the U-Boot image will not boot correctly
(hang), since some additional content on the boot device (waveform file) is
required for EPDC splash to work correctly.
Please refer to Linux Reference Manual for how to flash WAVEFORM file.
Signed-off-by: Robby Cai <R63905@freescale.com>
Signed-off-by: Nitin Garg <nitin.garg@freescale.com>
|
|
|
|
|
|
|
|
|
|
|
|
|
|
| |
fastboot
Android fastboot leans on the USB gadget driver to communicate with host. Porting
the imx_udc driver from v2009.08 with two changes: adding resource/memory release
APIs and replacing the uncached memory with cache flush&invalidate operations.
Pins and Clocks initialization are added to support boards:
mx6qdlsabresd, mx6qdlsabreauto, mx6slevk
Signed-off-by: Ye.Li <B37916@freescale.com>
Signed-off-by: Nitin Garg <nitin.garg@freescale.com>
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
| |
This is regression of commit 2035d77d i2c: sh_i2c: Update to new CONFIG_SYS_I2C framework
Before commit 2035d77d, i2c probe command works properly on kzm9g board.
KZM-A9-GT# i2c probe
Valid chip addresses: 0C 12 1D 32 39 3D 40 60
After commit 2035d77d, i2c probe command does not work.
KZM-A9-GT# i2c probe
Valid chip addresses: 00 01 02 03 04 05 06 07 08 09 0A 0B 0C 0D 0E 0F 10 11 12 13 14 15 16 17 18 19 1A 1B 1C 1D 1E 1F 20 21 22 23 24 25 26 27 28 29 2A 2B 2C 2D 2E 2F 30 31 32 33 34 35 36 37 38 39 3A 3B 3C 3D 3E 3F 40 41 42 43 44 45 46 47 48 49 4A 4B 4C 4D 4E 4F 50 51 52 53 54 55 56 57 58 59 5A 5B 5C 5D 5E 5F 60 61 62 63 64 65 66 67 68 69 6A 6B 6C 6D 6E 6F 70 71 72 73 74 75 76 77 78 79 7A 7B 7C 7D 7E 7F
sh_i2c_probe() calls sh_i2c_read(), but read length is 0. So acutally it does not read device at all. This patch prepares dummy buffer and read data into it.
Signed-off-by: Tetsuyuki Kobayashi <koba@kmckk.co.jp>
Acked-by: Heiko Schocher <hs@denx.de>
Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
|\
| |
| |
| |
| |
| |
| |
| | |
Conflicts:
arch/arm/cpu/arm926ejs/mxs/Makefile
include/configs/trats.h
include/configs/trats2.h
include/mmc.h
|
| |
| |
| |
| |
| |
| |
| |
| |
| |
| |
| |
| |
| |
| |
| |
| |
| |
| |
| | |
Commit 2faf5fb82ed6 introduced a regression that causes a data
abort when running scsi init followed by scsi reset.
There are 2 problems with the original commit
1) ALLOC_CACHE_ALIGN_BUFFER() allocates memory on the stack but is
assigned to ataid[port] and used by other functions.
2) The function ata_scsiop_inquiry() tries to free memory which was
never allocated on the heap.
Fix these problems by using tmpid as a temporary cache aligned buffer.
Allocate memory separately for ataid[port] and re-use it if required.
Fixes: 2faf5fb82ed6 (ahci: Fix cache align error messages)
Reported-by: Eli Nidam <elini@marvell.com>
Signed-off-by: Roger Quadros <rogerq@ti.com>
|
| |
| |
| |
| |
| |
| |
| |
| |
| |
| |
| |
| |
| |
| | |
1. The Data timeout counter value in eSDHC_SYSCTL register is
not working as it should be, so add quirks to enable this
workaround to fix it to the max value 0xE.
2. Add CONFIG_SYS_FSL_ERRATUM_ESDHC111 to enable its workaround.
* Update of patch for change mmc interface by
Pantelis Antoniou <panto@antoniou-consulting.com>
Signed-off-by: Haijun Zhang <Haijun.Zhang@freescale.com>
Acked-by: Pantelis Antoniou <panto@antoniou-consulting.com>
|
| |
| |
| |
| |
| |
| |
| |
| | |
The controller reset is performed now if command error occurs.
This commit adds the reset for the case of data related errors too.
Signed-off-by: Andrew Gabbasov <andrew_gabbasov@mentor.com>
Acked-by: Pantelis Antoniou <panto@antoniou-consulting.com>
|
| |
| |
| |
| |
| |
| |
| |
| |
| |
| |
| |
| |
| |
| |
| | |
Calculation of the timeout value should be based on actual clock value,
written to controller registers. Since mmc->tran_speed is either the
maximum allowed speed, or the preliminary value, that is be not yet
set to registers, the actual timeout, taken by the controller, based
on its clock settings, may be much longer than expected, based on
mmc->tran_speed value. In particular it happens at early initialization
stage, when typical value of mmc->tran_speed is 20MHz or 26MHz, while
actual clock setting, configured in the controller, is 400kHz.
It's more correct to use mmc->clock value for timeout calculation instead.
Signed-off-by: Andrew Gabbasov <andrew_gabbasov@mentor.com>
Acked-by: Pantelis Antoniou <panto@antoniou-consulting.com>
|
| |
| |
| |
| |
| |
| |
| |
| |
| |
| |
| |
| | |
Some eMMC chips may need the RST_n_FUNCTION bit set to a non-zero value
in order for warm reset of the system to work. Details on this being
required will be part of the eMMC datasheet. Also add using this
command to the dra7xx README.
* Whitespace fix by panto
Signed-off-by: Tom Rini <trini@ti.com>
Acked-by: Pantelis Antoniou <panto@antoniou-consulting.com>
|
| |
| |
| |
| |
| |
| | |
Signed-off-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>
Reported-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Acked-by: Pantelis Antoniou <panto@antoniou-consulting.com>
|
| |
| |
| |
| |
| |
| |
| |
| |
| |
| | |
BY commit "mmc: Split mmc struct, rework mmc initialization (v2)",
sh_mmcif has compile error. This fixes compile error.
Signed-off-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>
CC: Pantelis Antoniou <panto@antoniou-consulting.com>
Reported-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Acked-by: Pantelis Antoniou <panto@antoniou-consulting.com>
|
| |
| |
| |
| |
| | |
Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Cc: Heiko Schocher <hs@denx.de>
|
| |
| |
| |
| |
| |
| |
| |
| | |
In the recent mmc cleanup, the mmc_host_is_spi macro was broken and
bfin_sdh.c had mmc->bus_width turned into mmc_bus_width(mmc), both of
which were incorrect.
Signed-off-by: Tom Rini <trini@ti.com>
|
| |
| |
| |
| |
| |
| |
| |
| |
| |
| |
| |
| |
| |
| |
| |
| |
| |
| |
| |
| | |
This patch adds implementation of rand library based on hardware random
number generator of security subsystem in Exynos SOC.
This library includes:
- srand() - used for seed hardware block
- rand() - returns random number
- rand_r() - the same as above with given seed
which depends on CONFIG_EXYNOS_ACE_SHA and CONFIG_LIB_HW_RAND.
Signed-off-by: Przemyslaw Marczak <p.marczak@samsung.com>
cc: Akshay Saraswat <akshay.s@samsung.com>
cc: ARUN MANKUZHI <arun.m@samsung.com>
cc: Minkyu Kang <mk7.kang@samsung.com>
Cc: Michael Walle <michael@walle.cc>
Cc: Tom Rini <trini@ti.com>
Cc: Masahiro Yamada <yamada.m@jp.panasonic.com>
|
| |
| |
| |
| |
| |
| |
| |
| |
| |
| |
| |
| |
| |
| |
| |
| | |
It's important to have ability to flush/invalidate each DMA buffer descriptor
individually to prevent incoherency of adjacent BDs.
Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
Cc: Vineet Gupta <vgupta@synopsys.com>
Cc: Joe Hershberger <joe.hershberger@ni.com>
Cc: Vipin Kumar <vipin.kumar@st.com>
Cc: Stefan Roese <sr@denx.de>
Cc: Shiraz Hashim <shiraz.hashim@st.com>
Cc: Albert ARIBAUD <albert.u.boot@aribaud.net>
Cc: Amit Virdi <amit.virdi@st.com>
Cc: Sonic Zhang <sonic.zhang@analog.com>
|
| |\ |
|
| | |
| | |
| | |
| | |
| | |
| | |
| | |
| | |
| | |
| | |
| | |
| | |
| | | |
For some time we have been using the run_command() with properly crafted
string. Such approach turned to be unreliable and error prone.
Switch to "native" mmc subsystem API would allow better type checking and
shall improve speed.
Also, it seems that this API is changing less often than u-boot commands.
The approach similar to env operations on the eMMC has been reused.
Signed-off-by: Lukasz Majewski <l.majewski@samsung.com>
|
| | |
| | |
| | |
| | |
| | |
| | |
| | |
| | |
| | |
| | |
| | |
| | |
| | |
| | |
| | |
| | |
| | |
| | |
| | |
| | |
| | |
| | |
| | |
| | |
| | |
| | |
| | |
| | |
| | |
| | |
| | | |
The way that struct mmc was implemented was a bit of a mess;
configuration and internal state all jumbled up in a single structure.
On top of that the way initialization is done with mmc_register leads
to a lot of duplicated code in drivers.
Typically the initialization got something like this in every driver.
struct mmc *mmc = malloc(sizeof(struct mmc));
memset(mmc, 0, sizeof(struct mmc);
/* fill in fields of mmc struct */
/* store private data pointer */
mmc_register(mmc);
By using the new mmc_create call one just passes an mmc config struct
and an optional private data pointer like this:
struct mmc = mmc_create(&cfg, priv);
All in tree drivers have been updated to the new form, and expect
mmc_register to go away before long.
Changes since v1:
* Use calloc instead of manually calling memset.
* Mark mmc_register as deprecated.
Signed-off-by: Pantelis Antoniou <panto@antoniou-consulting.com>
|
| | |
| | |
| | |
| | |
| | |
| | |
| | | |
Using an array is pointless; even more pointless (and scary) is using
sprintf to fill it without a format string.
Signed-off-by: Pantelis Antoniou <panto@antoniou-consulting.com>
|
| | |
| | |
| | |
| | |
| | |
| | |
| | |
| | |
| | |
| | |
| | |
| | |
| | |
| | |
| | |
| | |
| | | |
Remove the in-structure ops and put them in mmc_ops with
a constant pointer to it.
This makes the mmc structure smaller as well as conserving
code space (in theory).
All in-tree drivers are converted as well; this is done in a
single patch in order to not break git bisect.
Changes since V1:
Fix compilation b0rked issue on omap platforms where OMAP_GPIO was
not set.
Signed-off-by: Pantelis Antoniou <panto@antoniou-consulting.com>
|
| | |
| | |
| | |
| | |
| | |
| | |
| | |
| | |
| | |
| | |
| | |
| | |
| | | |
For some time we have been using the run_command() with properly crafted
string. Such approach turned to be unreliable and error prone.
Switch to "native" mmc subsystem API would allow better type checking and
shall improve speed.
Also, it seems that this API is changing less often than u-boot commands.
The approach similar to env operations on the eMMC has been reused.
Signed-off-by: Lukasz Majewski <l.majewski@samsung.com>
|
| | |
| | |
| | |
| | |
| | |
| | |
| | |
| | |
| | |
| | |
| | |
| | |
| | |
| | |
| | |
| | |
| | |
| | |
| | |
| | |
| | |
| | |
| | |
| | |
| | |
| | |
| | |
| | |
| | |
| | |
| | |
| | |
| | | |
on nand flash using ubi, after the download of the new image into
the flash, the "rest" of the nand sectors get erased while flushing
the medium. With current u-boot version dfu-util may show:
Starting download: [##################################################] finished!
state(7) = dfuMANIFEST, status(0) = No error condition is present
unable to read DFU status
as get_status is not answered while erasing sectors, if erasing
needs some time.
So do the following changes to prevent this:
- introduce dfuManifest state
According to dfu specification
( http://www.usb.org/developers/devclass_docs/usbdfu10.pdf ) section 7:
"the device enters the dfuMANIFEST-SYNC state and awaits the solicitation
of the status report by the host. Upon receipt of the anticipated
DFU_GETSTATUS, the device enters the dfuMANIFEST state, where it
completes its reprogramming operations."
- when stepping into dfuManifest state, sending a PollTimeout
DFU_MANIFEST_POLL_TIMEOUT in ms, to the host, so the host
(dfu-util) waits the PollTimeout before sending a get_status again.
Signed-off-by: Heiko Schocher <hs@denx.de>
Cc: Lukasz Majewski <l.majewski@samsung.com>
Cc: Kyungmin Park <kyungmin.park@samsung.com>
Cc: Marek Vasut <marex@denx.de>
Cc: Pantelis Antoniou <panto@antoniou-consulting.com>
|
| |/
| |
| |
| |
| |
| |
| |
| |
| |
| |
| | |
move the flushing code into an extra function dfu_flush(),
so it can be used from other code.
Signed-off-by: Heiko Schocher <hs@denx.de>
Cc: Lukasz Majewski <l.majewski@samsung.com>
Cc: Kyungmin Park <kyungmin.park@samsung.com>
Cc: Marek Vasut <marex@denx.de>
Cc: Pantelis Antoniou <panto@antoniou-consulting.com>
|
|\ \
| | |
| | |
| | |
| | |
| | |
| | |
| | | |
Conflicts:
arch/arm/cpu/arm926ejs/mxs/mxsimage.mx23.cfg
arch/arm/cpu/arm926ejs/mxs/mxsimage.mx28.cfg
Signed-off-by: Stefano Babic <sbabic@denx.de>
|
| |\ \
| | |/
| | |
| | |
| | |
| | |
| | |
| | | |
Trivial merge conflict, needed to manually remove
local_info as per commit 41364f0f.
Conflicts:
board/samsung/common/board.c
|
| | |
| | |
| | |
| | |
| | |
| | | |
This function is needed when CONFIG_OF_SPI is defined.
Signed-off-by: Simon Glass <sjg@chromium.org>
|
| | |
| | |
| | |
| | |
| | |
| | |
| | |
| | |
| | |
| | |
| | | |
It is useful for Cltl-C to be handled by U-Boot as it is on other boards.
But it is also useful to be able to terminate U-Boot with Ctrl-C.
Add an option to enable signals while in raw mode, and make this the
default. Add an option to leave the terminal cooked, which is useful for
redirecting output.
Signed-off-by: Simon Glass <sjg@chromium.org>
|