| Commit message (Collapse) | Author | Age | Lines |
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1. the new fastboot is an add-on feature, the original fastboot is reserved
2. the new fastboot is a subset of original fastboot, only support "download"
and "flash" command
3. type "fastboot" in uboot to launch the original fastboot utility,
type "fastboot q" in uboot to launch the new fastboot utility
Signed-off-by: LiGang <b41990@freescale.com>
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We have get the right infomation when we call the set_geometry().
So we replace the hardcode with the proper gpmi_info's values.
Signed-off-by: Huang Shijie <b32955@freescale.com>
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In the mx23/mx28, the DATA0_SIZE/DATAN_SIZE of the BCH's
HW_BCH_FLASH1LAYOUT0/HW_BCH_FLASH0LAYOUT1 should be the real
bytes length of the data chunk 0 and data chunk 1.
But in the mx6q/mx50, the DATA0_SIZE/DATAN_SIZE of the BCH's
HW_BCH_FLASH1LAYOUT0/HW_BCH_FLASH0LAYOUT1 should be multiple of 4 bytes.
this patch fixes the wrong macros.
Signed-off-by: Huang Shijie <b32955@freescale.com>
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This patch checks self-clear sw_ipu_rst bit in
SCR register of SRC controller to be cleared
after setting it to reset IPUv3. This makes
sure that IPUv3 finishes sofware resetting.
Signed-off-by: Liu Ying <Ying.Liu@freescale.com>
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If tell the real correcting infomation to the upper layer of
MTD, the torture thread of UBIFS will do the torture test in
a very often frequency. This will eat up all the reservation blocks
of the UBIFS.
So tell the real correcting infomation only when the failure occured,
or the corrected times nearly reached the ECC threshold.
Signed-off-by: Huang Shijie <b32955@freescale.com>
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Set 0x500 to the busy_timeout in HW_GPMI_TIMING1.
If we do not set this busy_timeout, the gpmi may become unstable.
Signed-off-by: Huang Shijie <b32955@freescale.com>
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Rewrite the code for calculate the ecc strength.
Use the same code as in the gpmi driver.
Signed-off-by: Huang Shijie <b32955@freescale.com>
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Use the latest gpmi_reset_block(), and remove the old gpmi_nfc_reset_block().
Signed-off-by: Huang Shijie <b32955@freescale.com>
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Abandon our nand chip database, use the community's database.
Signed-off-by: Huang Shijie <b32955@freescale.com>
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update nand_get_flash_type() to the latest code.
Also add the support of ONFI nand.
Signed-off-by: Huang Shijie <b32955@freescale.com>
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in fastboot mode, if usb cable re-connectted, the fastboot feature will
fail. This issue is caused by logic control oversight.
Signed-off-by: LiGang <b41990@freescale.com>
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Fix the build warning in uboot build.
Fix bug of incorrect dereference to periph2 clock pre divider.
Fix incorrect type of maxpackage size assign, even it's
not used at all in fastboot.
Signed-off-by: Xinyu Chen <xinyu.chen@freescale.com>
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- add android build config for mx6sl_arm2 board.
- add gpio support for mx6sl
- add boot image support
- add android recovery support
- add fastboot support, but fastboot cannot transfer file.
Signed-off-by Zhang Jiejing <jiejing.zhang@freescale.com>
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Add generic gpio interface in uboot.
Seems more and more gpio operation invoke in uboot,
without RAW register operation, we should
use generic gpio interface.
you should define the CONFIG_MXC_GPIO
use generic gpio interface:
gpio_request,
gpio_direction_output,
gpio_direction_input,
gpio_set_value,
gpio_get_value, etc.
Test on MX6Q, MX6DL.
Other MX6X should also define this config.
Signed-off-by: Zhang Jiejing <jiejing.zhang@freescale.com>
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1. add check asrc register to enter recovery mode,
rather then check the file.
2. fix the boot.img can not fastboot flash function.
3. consolidate and cleanup fastboot code.
4. clean up many build warnning message.
Signed-off-by: Zhang Jiejing <jiejing.zhang@freescale.com>
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fix mx6dl usb init issue, due to leak of reset phy,
it was only called on MX6Q.
Signed-off-by: Shi Make <make.shi@freescale.com>
Signed-off-by: Zhang Jiejing <jiejing.zhang@freescale.com>
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Add EPDC splash screen support for U-Boot
Signed-off-by: Danny Nold <dannynold@freescale.com>
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add fastboot function back in MX6Q_SABERSD board.
the MX6DL_SABERSD have usb init related issue which will
keep RESET, but left as later developement.
Signed-off-by: Zhang Jiejing <jiejing.zhang@freescale.com>
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IMX processors has a slightly different interface
to access GPIOs and do not make use of the provided GPIO
framework. The patch substitutes mxc_ specific
functions and make use of the API in asm/gpio.h
Signed-off-by: Stefano Babic <sbabic@denx.de>
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This fixes write access to PMIC registers, the bug was
introduced partly in commit 64aac65099 and in commit c9fe76dd91.
It was tested on an i.mx31 with a mc13783.
Signed-off-by: Helmut Raiger <helmut.raiger@hale.at>
Acked-by: Stefano Babic <sbabic@denx.de>
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Signed-off-by: Stefano Babic <sbabic@denx.de>
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Instead of using directly the i2c_set_bus() function,
the I2C_SET_BUS macro must be used to avoid build
errors for targets without multibus I2C.
Signed-off-by: Stefano Babic <sbabic@denx.de>
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I2C or SPI PMIC devices can be accessed.
Separate files: pmic_i2c.c and pmic_spi.c are responsible
for handling transmission over I2C or SPI bus.
New flags:
CONFIG_PMIC - enable PMIC general device.
CONFIG_PMIC_I2C/SPI - specify the interface to be used.
Signed-off-by: Lukasz Majewski <l.majewski@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
Cc: Stefano Babic <sbabic@denx.de>
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The patch add supports for the Freescale's Power
Management Controller (known as Atlas) used together with i.MX31/51
processors. It was tested with a MC13783 (MX31) and
MC13892 (MX51).
Signed-off-by: Stefano Babic <sbabic@denx.de>
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- Enable below macro define for all chip. Firstly, the marcos
will be used in later version for later i.MX. Secondly, fix
the build error in the former i.MX series chip before i.MX6.
#define PHY_MIPSCR_LINK_UP (0x1 << 10)
#define PHY_MIPSCR_SPEED_MASK (0x3 << 14)
#define PHY_MIPSCR_1000M (0x2 << 14)
#define PHY_MIPSCR_100M (0x1 << 14)
#define PHY_MIPSCR_FULL_DUPLEX (0x1 << 13)
Signed-off-by: Fugang Duan <B38611@freescale.com>
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As per JEDEC document JESD84-A441 (page 105) response for CMD7
(MMC_CMD_SELECT_CARD) response should be R1 instead of R1b. In uboot we
never take MMC to disconnected state and on powerup its always ideal
state which later goes to stand-by state.
from document footnote:
R1 while selecting from Stand-By State to Transfer State; R1b while
selecting from Disconnected State to Programming State.
Signed-off-by: Ajay Bhargav <ajay.bhargav@einfochips.com>
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- Add phy id macro definitions.
- Add mxc_get_phy_ouid helper function.
- Use phy ouid to check the phy type.
Signed-off-by: Fugang Duan <B38611@freescale.com>
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The serial of patches adds the initial support for mx6dl
sabra sd board:
- DDR3 400MHz@64bit, 1G, 256M*4
- SD/MMC basic operations
- Add PIN/IOMUX support for mmx6dl sabresd.
- Ethernet is ok for 100/1000Mbps.
- OTP fuse
Signed-off-by: Fugang Duan <B38611@freescale.com>
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- remove the excrescent code in enet_board_init function.
- KSZ9021 phy auto-negotiation in mx6solo sabreauto RevA
is used to establish link with the remote hub or switch.
In general, the negotiation time is about 3-5 senconds
But connecting to Gbps hub, the time
is range from 8s to 15s. So, changing the MAX link waiting time
to 20s.
According to repetitious tests, solo ARD ethernet is ok in 100Mbps
environment. It is not stable in 1000Mbps mode.
Signed-off-by: Fugang Duan <B38611@freescale.com>
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Enable anatop command "regul" for mx6solo/DL
Signed-off-by: Lily Zhang <r58066@freescale.com>
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Remove build warnings for mx6q.
Signed-off-by: Terry Lv <r65388@freescale.com>
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dd read and change voltage support for mx6.
For help, pls type "help regul"
Detail command info:
regul list - List all regulators' name
regul show all - Display all regulators' voltage
regul show core - Show core voltage in mV
regul show periph - Show peripheral voltage in mV
regul show <regulator name> - Show regulator's voltage in mV
regul set core <voltage value> - Set core voltage in mV
regul set periph <voltage value> - Set periph voltage in mV
regul set <regulator name> <voltage value> - Set regulator's voltage in
mV
Example:
MX6Q ARM2 U-Boot > regul list
Name Voltage
vddpu
vddcore
vddsoc
vdd2p5
vdd1p1
vdd3p0
MX6Q ARM2 U-Boot > regul show all
Name Voltage
vddpu 1100000
vddcore 1100000
vddsoc 1200000
vdd2p5 2400000
vdd1p1 1100000
vdd3p0 3000000
MX6Q ARM2 U-Boot > regul show periph
Name Voltage
periph: 1100000
MX6Q ARM2 U-Boot > regul show core
Name Voltage
core: 1100000
MX6Q ARM2 U-Boot > regul set core 1100000
Set voltage succeed!
Name Voltage
core: 1100000
Signed-off-by: Terry Lv <r65388@freescale.com>
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This patch add i.mx6dl support for fec driver
i.mx6dl and i.mx6dq shares the same ENET IP.
Signed-off-by: Jason Liu <r64343@freescale.com>
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Add suport for i.MX 6Quad SABRE Smart Device.
Signed-off-by: Nancy Chen <Nancy.Chen@freescale.com>
Signed-off-by: Tony Lin <tony.lin@freescale.com>
Signed-off-by: Frank Li <Frank.Li@freescale.com>
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The system PMIC registers may not be accessible in u-boot via SPI if
function pmic_reg() is called in the latter part of boot up process in u-boot.
It is because the imx_spi_slave structure is allocated from malloc() in
the spi_setup_slave() function. However, this structure is not completely
initialized, which may result in using a dirty control register value
at CSPI during transfer.
memset() the imx_spi_slave structure after malloc() can resolve this problem
Please refer to CT39243849.
Signed-off-by: Robby Cai <R63905@freescale.com>
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Add fec support for sabreauto board
Need hardware rework:
1. Add R450 10.0k
2. Remove R1105 1k
3. short Pin 1,2 of u516, will impact CAN1
Signed-off-by: Hake Huang <b20222@freescale.com>
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Fix fastboot can't used on mmc1 device on android.
caused by the mmc part number use strtoul but it need the partition number < 0 .
So this caused such error.
Fixed by change strtoul to strtol.
Signed-off-by: Zhang Jiejing <jiejing.zhang@freescale.com>
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- "bootp" command sometime cannot work well in i.MX53 platform.
- Cause:
Phy detect cable link need some time, so need wait the complete
of cable detect.
Signed-off-by: Fugang Duan <B38611@freescale.com>
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add support for otg in MX6Q uboot to enable fastboot function.
Signed-off-by: Zhang Jiejing <jiejing.zhang@freescale.com>
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- Descript:
Ethernet can't work in uboot and kernel DHCP throught press
'reset' key when send sleep command 'echo mem > /sys/power/state'
- Cause:
FEC driver will power down phy when system sleep. If just reset the
board, FEC driver cannot run resume function. So, need power on phy
in uboot and linux driver.
Signed-off-by: Fugang Duan <B38611@freescale.com>
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Remove u-boot build warnings for mx6q.
Signed-off-by: Terry Lv <r65388@freescale.com>
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Add support to read and program fuses in the MX6 Sabre-lite
Signed-off-by: Mahesh Mahadevan <r9aadq@freescale.com>
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1. add force option to blow operation
2. add blown value check
3. add simple validation for zeros returned by 'simple_strtoul' call
Signed-off-by: Ryan QIAN <b32804@freescale.com>
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Sabreauto is an inaccurate name for the Armadillo2 board that
this code is actually meant for. So, replaced "sabreauto" in folder names,
file names, configs, and code with "arm2". Created a new machine id for
ARM2 board.
Signed-off-by: Anish Trivedi <anish@freescale.com>
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Modified MMC library for UHS-I command sequence
Added support to USDHC driver for UHS-I
Signed-off-by: Anish Trivedi <anish@freescale.com>
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Includes support for uSDHC read, write, FEC, SPI-NOR etc.
Signed-off-by: Mahesh Mahadevan <r9aadq@freescale.com>
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Incorrect usb string package size assign.
Signed-off-by: Xinyu Chen <xinyu.chen@freescale.com>
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Need to send RCA when sending CMD13.
Cannot use print_size function when displaying card capacity
because it expects a 32 bit integer as input, while mmc->capacity
is a 64 bit integer. There is loss of information leading to incorrect
capacities being displayed for "mmcinfo" cmd. Changed it to simply
print the entire 64 bit integer, which is the number of bytes.
Signed-off-by: Tony Lin <tony.lin@freescale.com>
Signed-off-by: Anish Trivedi <anish@freescale.com>
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Removed delay of 10 ms before each command. There should not be
a need to have this delay after the ENGR00156405 patch that polls
until card is not busy anymore before proceeding to next cmd.
Added poll on reset bits of controller after the bits are set to
wait until they clear before proceeding further.
Signed-off-by: Tony Lin <tony.lin@freescale.com>
Signed-off-by: Anish Trivedi <anish@freescale.com>
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The errata, not applicable to USDHC, causes ESDHC to shut off clock to
the card when auto-clock gating is enabled for commands with busy
signalling and no data phase. The card might require the clock to exit
the busy state, so the workaround is to disable the auto-clock gate
bits in SYSCTL register for such commands. The workaround also entails
polling on DAT0 bit in the PRSSTAT register to learn when busy state is
complete. Auto-clock gating is re-enabled at the end of busy state.
Signed-off-by: Anish Trivedi <anish@freescale.com>
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