| Commit message (Collapse) | Author | Age | Lines |
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Update NAND scan scheme to support new nand type. With this
patch uboot can support new NAND flash on mx25/mx35 board
while compatible with old NAND on old boards.
Signed-off-by: Jason Liu <r64343@freescale.com>
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In current u-boot design,
get_timer_masked is not correct and udelay is not accurate
when the time is less than 1000us.
Thus we need to use ipg clock source for accurate timer.
Signed-off-by: Terry Lv <r65388@freescale.com>
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Some mmc card can't read and write from right offset.
Driver see these card as high capacity and use sector mode for them.
This will lead to read and write corrupt.
Signed-off-by: Terry Lv <r65388@freescale.com>
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Reset CPLD registers to fix reboot/reset failure issue.
Signed-off-by: Sammy He <r62914@freescale.com>
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Fix smc911x receive packet length not set correctly issue. This
caused MX25 tftp timeout sometimes.
Signed-off-by: Sammy He <r62914@freescale.com>
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1. Add imx cspi support for cpld access.
2. Add smc911x ethernet support from cpld.
Signed-off-by: Sammy He <r62914@freescale.com>
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bd->bi_enetaddr was removed in one of the previous patchs, some changes must
be done to avoid building error.
Signed-off-by: Lionel Xu <r63889@freescale.com>
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This patch will fix three issues:
1. Add boot device detection.
2. Use right nand command in anroid for recovery mode.
3. Recovery mode code clean.
Signed-off-by: Terry Lv <r65388@freescale.com>
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Misc changes for v2009.08 upgrade.
Signed-off-by: Terry Lv <r65388@freescale.com>
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PATA support in u-boot.
Signed-off-by: Terry Lv <r65388@freescale.com>
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Boot from MMC card failed at detecting NAND. The fix will
1. Set RBB_MODE to 1 and using atomic status command
2. Set FW correctly by adding CONFIG_NAND_FW_8 config
3. Correct the BLS register value
Signed-off-by:Jason Liu <r64343@freescale.com>
(cherry picked from commit 7142651386271c340a6ae061a6e2893695675724)
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Signed-off-by: Terry Lv <r65388@freescale.com>
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U-BOOT upgrade from V2009.01 to V2009.08
Initial version for i.MX51 BBG board.
Support:
FEC, SPI, spi Nor Flash
Boot from spi nor flash and mmc/sd
Signed-off-by:Fred Fan <r01011@freescale.com>
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I2C support for mx51 3ds board.
Signed-off-by: Terry Lv <r65388@freescale.com>
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Change nand Makefile to use CONFIG_MXC_NAND.
Signed-off-by: Terry Lv <r65388@freescale.com>
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Recovery mode support for Android on mx51.
Signed-off-by: Terry Lv <r65388@freescale.com>
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Enable cp command for MMC.
Signed-off-by: Terry Lv <r65388@freescale.com>
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Porting MX233 UBOOT from 1.3.3 to V2009.01. Clear old cfg macro, such as
CFG_HZ. Change MAC address getting source from initial configuration to
On-Chip OTP.
Signed-off-by: Lionel Xu <r63889@freescale.com>
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Support Atmel AT45DB321D SPI NOR flash.
Signed-off-by: Terry Lv <r65388@freescale.com>
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Add MMC configs to mx35 3stack config file.
Signed-off-by: Terry Lv <r65388@freescale.com>
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Disable NAND driver interleave mode support
Signed-off-by:Jason Liu <r64343@freescale.com>
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Add support for programming ubifs image on nand flash
Signed-off-by:Jason Liu <r64343@freescale.com>
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Add FEC support for BBG2.
Signed-off-by: Terry Lv <r65388@freescale.com>
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BBG2, enable SPI NOR and MMC in one image.
Signed-off-by: Terry Lv <r65388@freescale.com>
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1. Add build option to uboot for different media type
2. fix the spi-nor link error
Signed-off-by:Jason Liu <r64343@freescale.com>
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spi nor boot support for BBG2.
Signed-off-by: Terry Lv <r65388@freescale.com>
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BBG2: MMC boot support.
Signed-off-by: Terry Lv <r65388@freescale.com>
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Add nand driver for MX51 uboot
Signed-off-by:Jason Liu <r64343@freescale.com>
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This patch add support on U-Boot to i.MX25 processor.
Signed-off-by: Alan Carvalho de Assis <alan.assis@freescale.com>
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Support i.MX51 TO2.0 3stack board. And enable LAN9217 support.
NAND is not supported in this patch.
Signed-off-by: Fred Fan <r01011@freescale.com>
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Modify and Verfiy MX31 & MX35 3stack according to the changes in V2009.01
Signed-off-by: Fred Fan <r01011@freescale.com>
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uboot can not boot kernel.
There are no more messages excepts uncompression message.
The root cause is wrong romfile version offset.
Signed-off-by: Fred Fan <r01011@freescale.com>
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1. Change NAND driver Makefile to bulild individual nand driver on i.MX31
and i.MX35.
2. Remove CONFIG_NAND_BOOT to common boot code which supports boot from nand
and nor.
Signed-off-by: Fred Fan <r01011@freescale.com>
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Add nand driver for mx35
Signed-off-by:Jason Liu <r64343@freescale.com>
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Support boot from NAND Flash
Add driver for i.MX31 NFC
Upgate U-Boot to support NAND boot
Signed-off-by: Xinyu Chen <xinyu.chen@freescale.com>
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Support boot from NOR flash
Support Multiple ethernet:LAN9217 and FEC
Support upgrade u-boot
Signed-off-by: Fred Fan <r01011@freescale.com>
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Fix ECC Correction bug where the byte offset location were double
flipped causing correction routine to toggle the wrong byte location
in the ECC segment. The ndfc_calculate_ecc routine change the order
of getting the ECC code.
/* The NDFC uses Smart Media (SMC) bytes order */
ecc_code[0] = p[2];
ecc_code[1] = p[1];
ecc_code[2] = p[3];
But in the Correction algorithm when calculating the byte offset
location, the s1 is used as the upper part of the address. Which
again reverse the order making the final byte offset address
location incorrect.
byteoffs = (s1 << 0) & 0x80;
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byteoffs |= (s0 >> 4) & 0x08;
The order is change to read it in straight and let the correction
function to revert it to SMC order.
Signed-off-by: Feng Kan <fkan@amcc.com>
Acked-by: Victor Gallardo <vgallardo@amcc.com>
Acked-by: Prodyut Hazarika <phazarika@amcc.com>
Signed-off-by: Stefan Roese <sr@denx.de>
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Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
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Previously, waiting for auto-negotiation would only occur if a valid
link had been detected. Problems arose when attempting to use a
tsec immediately after bootup but before link was achieved, eg:
=> dhcp
Auto-neg error, defaulting to 10BT/HD
eTSEC1: No link.
Auto-neg error, defaulting to 10BT/HD
eTSEC2: No link.
=>
With this patch applied the same operation as above resulted in:
=> dhcp
Waiting for PHY auto negotiation to complete. done
Enet starting in 1000BT/FD
Speed: 1000, full duplex
Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
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U-boot might use non-8-byte-aligned addresses for sending data, which
the kwgbe_send doesn't accept (bootp does this for me). This patch
copies the data to be sent to a malloced temporary buffer if it is
non-aligned.
Signed-off-by: Simon Kagstrom <simon.kagstrom@netinsight.net>
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
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This patch makes the device wait for up to 5 seconds for the link to
come up, similar to what many of the other network drivers do. This
avoids confusing situations where, e.g., a tftp fails when initiated
early after U-boot has started (before the link has come up).
Signed-off-by: Simon Kagstrom <simon.kagstrom@netinsight.net>
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
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Signed-off-by: Simon Kagstrom <simon.kagstrom@netinsight.net>
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
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The Intel E1000 driver was making assumptions about the relationship between
some virtual, physical, and PCI addresses.
Also fix some bad usage of the DEBUGOUT macro
Signed-off-by: Timur Tabi <timur@freescale.com>
Acked-by: Kumar Gala <galak@kernel.crashing.org>
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
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Signed-off-by: giulio.benetti@micronovasrl.com
Acked-by: Wolfgang Denk <wd@denx.de>
Signed-off-by: Scott Wood <scottwood@freescale.com>
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Fix bug introduced by 9c048b523413ae5f3ff34e00cf57569c3368ab51.
The cfi_flash.c driver cast the flash buffer size to a uchar in
flash_write_cfibuffer(). On some flash parts, (tested on Numonyx
part PC32F512M29EWH), the buffer size is 1KB. Remove the cast to
uchar to enable buffer sizes to be larger.
Signed-off-by: John Schmoller <jschmoller@xes-inc.com>
Signed-off-by: Stefan Roese <sr@denx.de>
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Signed-off-by: Heiko Schocher <hs@denx.de>
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Fixed a misunderstanding in the original implementation, 'devnum' that
was used in the cpu/ppc4xx/4xx_enet.c implementation was NOT the
PHY's SMI address, rather it was the number of the MAC interface on
the CPU. The equivalent of this for uec_phy will be the UEC number
stored in mii_info->dev->name. Usage example is updated for uec.
Signed-off-by: Richard Retanubun <RichardRetanubun@RuggedCom.com>
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
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It is set to 0x1F by default and can be overwritten on the board
header file by defining CONFIG_UTBIPAR_INIT_TBIPA. This allows
the CPU to simply "reserve" one SMI address instead of using
a different one for each UEC.
Signed-off-by: Richard Retanubun <RichardRetanubun@RuggedCom.com>
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
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eth_setenv_enetaddr is avaible by upper layer
using this saves 204 bytes on total image size
used Local OUI instead of Marvell OUI for
random MAC address generation logic
Signed-off-by: Prafulla Wadaskar <prafulla@marvell.com>
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
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