summaryrefslogtreecommitdiff
path: root/drivers
Commit message (Collapse)AuthorAgeLines
* nand, davinci: add special UBL ecc positionHeiko Schocher2013-11-01-0/+12
| | | | | | | | | | | | enable the RBL/UBL ECC layout through CONFIG_NAND_6BYTES_OOB_FREE_10BYTES_ECC define see for more info: http://processors.wiki.ti.com/index.php/DM365_Nand_ECC_layout Signed-off-by: Heiko Schocher <hs@denx.de> Cc: Tom Rini <trini@ti.com> Cc: Scott Wood <scottwood@freescale.com>
* TI:am33xx: Add bootcount support to ti_am335x_common.hTom Rini2013-11-01-0/+1
| | | | | | | Enable the bootcount driver for am335x in general. We leave adding a bootlimit and altbootcmd to the environment to the board ports. Signed-off-by: Tom Rini <trini@ti.com>
* bootcount_davinci: Switch to scratch register #2Tom Rini2013-11-01-4/+6
| | | | | | | | The RTC IP block here provides 3 scratch registers. Currently when using DeepSleep on am335x the scratch0/1 registers are used so moving ourself to scratch2 makes cooperation easier. Signed-off-by: Tom Rini <trini@ti.com>
* am33xx, davinci: Create and use <asm/davinci_rtc.h>Tom Rini2013-11-01-3/+2
| | | | | | | Create a common header file for the RTC IP block that is shared between davinci and am33xx. Signed-off-by: Tom Rini <trini@ti.com>
* drivers/rtc/davinci.c: Reference DAVINCI_RTC_BASE more directlyTom Rini2013-11-01-3/+3
| | | | | | We shouldn't rely on a define to hide this cast for us. Signed-off-by: Tom Rini <trini@ti.com>
* microblaze: Fix watchdog initializationMichal Simek2013-10-16-4/+2
| | | | | | | | | | | The patch: "blackfin: Move blackfin watchdog driver out of the blackfin arch folder." (sha1: e9a389a18477c1c57a0b30e9ea8f4d38c6e26e63) changed hw_watchdog_init() prototype which didn't match with Microblaze one. This patch fixes the driver and Microblaze initialization. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
* spi: mxc_spi: Fix double incrementing read pointer for unaligned buffersTimo Herbrecher2013-10-16-1/+1
| | | | | | | | If dout buffer is not 32 bit-aligned or data to transmit is not multiple of 32 bit the read data pointer is already incremented on single byte reads. Signed-off-by: Timo Herbrecher <t.herbrecher@gateware.de> Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
* sf: probe: Add missing Atmel at25df321 flashBo Shen2013-10-16-0/+1
| | | | | | | | | As the spi flash transfer to multiple parts, it is forgot to add Atmel AT25DF321 spi flash support, which broken several Atmel EK boards which this chip. So, add it Signed-off-by: Bo Shen <voice.shen@atmel.com> Reviewed-by: Jagannadha Sutradharudu Teki <jagannadh.teki@gmail.com>
* spi: Add GPL-2.0+ SPDX-License-Identifier for missing filesJagannadha Sutradharudu Teki2013-10-16-5/+5
| | | | | | | Added GPL-2.0+ SPDX-License-Identifier for missed spi source files. Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
* sf: Add GPL-2.0+ SPDX-License-Identifier for missing onesJagannadha Sutradharudu Teki2013-10-16-4/+4
| | | | | | | | Added GPL-2.0+ SPDX-License-Identifier for missed sf source files. Signed-off-by: Jagannadha Sutradharudu Teki <jagannadh.teki@gmail.com> Signed-off-by: Bo Shen <voice.shen@atmel.com>
* sf: Minor cleanups.Jagannadha Sutradharudu Teki2013-10-16-6/+7
| | | | | | | | | - Add comments. - Renamed few macros. - Add tabs. Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com> Signed-off-by: Bo Shen <voice.shen@atmel.com>
* sf_ops: Unify bank_sel calculation codeJagannadha Sutradharudu Teki2013-10-16-16/+20
| | | | | | | Unified the bank_sel calculation code for erase and write ops. Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
* Coding Style cleanup: drop some excessive empty linesWolfgang Denk2013-10-14-5/+0
| | | | Signed-off-by: Wolfgang Denk <wd@denx.de>
* Coding Style cleanup: remove trailing empty linesWolfgang Denk2013-10-14-3/+0
| | | | Signed-off-by: Wolfgang Denk <wd@denx.de>
* Coding Style cleanup: replace leading SPACEs by TABsWolfgang Denk2013-10-14-31/+31
| | | | | | Signed-off-by: Wolfgang Denk <wd@denx.de> [trini: Drop changes for PEP 4 following python tools] Signed-off-by: Tom Rini <trini@ti.com>
* Coding Style cleanup: remove trailing white spaceWolfgang Denk2013-10-14-34/+34
| | | | Signed-off-by: Wolfgang Denk <wd@denx.de>
* Merge branch 'master' of git://git.denx.de/u-boot-armTom Rini2013-10-14-0/+411
|\
| * Merge branch 'u-boot-samsung/master' into 'u-boot-arm/master'Albert ARIBAUD2013-10-11-0/+411
| |\
| | * power:battery: add battery support for Trats2 boardPiotr Wilczek2013-09-25-0/+66
| | | | | | | | | | | | | | | | | | Signed-off-by: Piotr Wilczek <p.wilczek@samsung.com> Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
| | * drivers:power:max77693: add support for new multi function pmic max77693Piotr Wilczek2013-09-25-0/+345
| | | | | | | | | | | | | | | | | | | | | | | | | | | This patch add support for new multi function pmic max77693. The driver is split into three modules: pmic, muic and fuelgage. Signed-off-by: Piotr Wilczek <p.wilczek@samsung.com> Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
* | | Merge branch 'master' of git://git.denx.de/u-boot-nand-flashTom Rini2013-10-14-12/+35
|\ \ \
| * | | mtd: driver _read() returns max_bitflips; mtd_read() returns -EUCLEANPaul Burton2013-10-09-12/+35
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Linux modified the MTD driver interface in commit edbc4540 (with the same name as this commit). The effect is that calls to mtd_read will not return -EUCLEAN if the number of ECC-corrected bit errors is below a certain threshold, which defaults to the strength of the ECC. This allows -EUCLEAN to stop indicating "some bits were corrected" and begin indicating "a large number of bits were corrected, the data held in this region of flash may be lost soon". UBI makes use of this and when -EUCLEAN is returned from mtd_read it will move data to another block of flash. Without adopting this interface change UBI on U-boot attempts to move data between blocks every time a single bit is corrected using the ECC, which is a very common occurance on some devices. For some devices where bit errors are common enough, UBI can get stuck constantly moving data around because each block it attempts to use has a single bit error. This condition is hit when wear_leveling_worker attempts to move data from one PEB to another in response to an -EUCLEAN/UBI_IO_BITFLIPS error. When this happens ubi_eba_copy_leb is called to perform the data copy, and after the data is written it is read back to check its validity. If that read returns UBI_IO_BITFLIPS (in response to an MTD -EUCLEAN) then ubi_eba_copy_leb returns 1 to wear_leveling worker, which then proceeds to schedule the destination PEB for erasure. This leads to erase_worker running on the PEB, and following a successful erase wear_leveling_worker is called which begins this whole cycle all over again. The end result is that (without UBI debug output enabled) the boot appears to simply hang whilst in reality U-boot busily works away at destroying a block of the NAND flash. Debug output from this situation: UBI DBG: ensure_wear_leveling: schedule scrubbing UBI DBG: wear_leveling_worker: scrub PEB 1027 to PEB 4083 UBI DBG: ubi_io_read_vid_hdr: read VID header from PEB 1027 UBI DBG: ubi_io_read: read 4096 bytes from PEB 1027:4096 UBI DBG: ubi_eba_copy_leb: copy LEB 0:0, PEB 1027 to PEB 4083 UBI DBG: ubi_eba_copy_leb: read 1040384 bytes of data UBI DBG: ubi_io_read: read 1040384 bytes from PEB 1027:8192 UBI: fixable bit-flip detected at PEB 1027 UBI DBG: ubi_io_write_vid_hdr: write VID header to PEB 4083 UBI DBG: ubi_io_write: write 4096 bytes to PEB 4083:4096 UBI DBG: ubi_io_read_vid_hdr: read VID header from PEB 4083 UBI DBG: ubi_io_read: read 4096 bytes from PEB 4083:4096 UBI DBG: ubi_io_write: write 4096 bytes to PEB 4083:8192 UBI DBG: ubi_io_read: read 4096 bytes from PEB 4083:8192 UBI: fixable bit-flip detected at PEB 4083 UBI DBG: schedule_erase: schedule erasure of PEB 4083, EC 55, torture 0 UBI DBG: erase_worker: erase PEB 4083 EC 55 UBI DBG: sync_erase: erase PEB 4083, old EC 55 UBI DBG: do_sync_erase: erase PEB 4083 UBI DBG: sync_erase: erased PEB 4083, new EC 56 UBI DBG: ubi_io_write_ec_hdr: write EC header to PEB 4083 UBI DBG: ubi_io_write: write 4096 bytes to PEB 4083:0 UBI DBG: ensure_wear_leveling: schedule scrubbing UBI DBG: wear_leveling_worker: scrub PEB 1027 to PEB 4083 ... This patch adopts the interface change as in Linux commit edbc4540 in order to avoid such situations. Given that none of the drivers under drivers/mtd return -EUCLEAN, this should only affect those using software ECC. I have tested that it works on a board which is currently out of tree, but which I hope to be able to begin upstreaming soon. Signed-off-by: Paul Burton <paul.burton@imgtec.com> Acked-by: Stefan Roese <sr@denx.de>
* | | | usb: Prevent using reserved registers on DM36x usbAndrew Murray2013-10-10-5/+14
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The musb driver defines and uses MUSB_CSR0_H_DIS_PING, however this bit is reserved on the DM36x. Thus this patch ensures that the reserved bit is not accesssed. It has been observed that some USB devices will fail to enumerate with errors such as 'error in inquiry' without this patch. See http://www.ti.com/litv/pdf/sprufh9a for details. Cc: Marek Vasut <marex@denx.de> Cc: Tom Rini <trini@ti.com> Signed-off-by: Andrew Murray <amurray@embedded-bits.co.uk> Acked-by: Marek Vasut <marex@denx.de>
* | | | Merge branch 'master' of git://git.denx.de/u-boot-armTom Rini2013-10-08-5/+5
|\ \ \ \ | | |/ / | |/| |
| * | | usb: Fix error handling in musb_hcd.cAndrew Murray2013-10-07-5/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The wait_until_[rx|tx]ep_ready functions return a u8 to indicate success containing the value 0, 1 or -1. This patch changes the return type to an int to accommodate the negative return values. These functions are used in the file using calls such as if (!wait_until... Where a -1 is returned it is mishandled and treated as success instead of a CRC error. This patch addresses this. Cc: Marek Vasut <marex@denx.de> Cc: Tom Rini <trini@ti.com> Signed-off-by: Andrew Murray <amurray@embedded-bits.co.uk> Acked-by: Marek Vasut <marex@denx.de>
* | | | Merge branch 'master' of git://git.denx.de/u-boot-spiTom Rini2013-10-08-2205/+1417
|\ \ \ \ | |_|/ / |/| | |
| * | | spi: exynos: Support word transfersRajeshwari Shinde2013-10-08-15/+61
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Since SPI register access is so expensive, it is worth transferring data a word at a time if we can. This complicates the driver unfortunately. Use the byte-swapping feature to avoid having to convert to/from big endian in software. This change increases speed from about 2MB/s to about 4.5MB/s. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Rajeshwari S Shinde <rajeshwari.s@samsung.com> Reviewed-by: Jagannadha Sutradharudu Teki <jagannadh.teki@gmail.com>
| * | | spi: exynos: Minimise access to SPI FIFO levelRajeshwari Shinde2013-10-08-12/+15
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Accessing SPI registers is slow, but access to the FIFO level register in particular seems to be extraordinarily expensive (I measure up to 600ns). Perhaps it is required to synchronise with the SPI byte output logic which might run at 1/8th of the 40MHz SPI speed (just a guess). Reduce access to this register by filling up and emptying FIFOs more completely, rather than just one word each time around the inner loop. Since the rxfifo value will now likely be much greater that what we read before we fill the txfifo, we only fill the txfifo halfway. This is because if the txfifo is empty, but the rxfifo has data in it, then writing too much data to the txfifo may overflow the rxfifo as data arrives. This speeds up SPI flash reading from about 1MB/s to about 2MB/s on snow. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Rajeshwari S Shinde <rajeshwari.s@samsung.com> Reviewed-by: Jagannadha Sutradharudu Teki <jagannadh.teki@gmail.com>
| * | | spi: exynos: Support a delay after deactivateRajeshwari Shinde2013-10-08-0/+20
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | For devices that need some time to react after a spi transaction finishes, add the ability to set a delay. Implement this as a delay on the first/next transaction to avoid any delay in the fairly common case where a SPI transaction is followed by other processing. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Rajeshwari S Shinde <rajeshwari.s@samsung.com> Reviewed-by: Jagannadha Sutradharudu Teki <jagannadh.teki@gmail.com>
| * | | sf: ramtron: Remove page_size printJagannadha Sutradharudu Teki2013-10-07-2/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | There is no page_size for ramtron flashes, so just print the detected flash and it's size. Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
| * | | sf: Minor cleanupsJagannadha Sutradharudu Teki2013-10-07-10/+9
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | - Add spaces, tabs - Commenting. - Rearrange code. - Add static qualifier for missing func. - Remove memory_map from ramtron.c - Ramtron: spi_flash_internal.h -> sf_internal.h Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
| * | | spi: add TI QSPI driverMatt Porter2013-10-07-0/+312
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Adds a SPI master driver for the TI QSPI peripheral. - Added quad read support. - Added memory mapped support. Signed-off-by: Matt Porter <matt.porter@linaro.org> Signed-off-by: Sourav Poddar <sourav.poddar@ti.com> Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
| * | | sf: Add memory mapped read supportPoddar, Sourav2013-10-07-0/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Qspi controller can have a memory mapped port which can be used for data read. Added support to enable memory mapped port read. This patch enables the following: - It enables exchange of memory map address between mtd and qspi through the introduction of "memory_map" flag. - Add support to communicate to the driver that memory mapped transfer is to be started through introduction of new flags like "SPI_XFER_MEM_MAP" and "SPI_XFER_MEM_MAP_END". This will enable the spi controller to do memory mapped configurations if required. Signed-off-by: Sourav Poddar <sourav.poddar@ti.com> Reviewed-by: Jagannadha Sutradharudu Teki <jagannadh.teki@gmail.com>
| * | | sf: probe: Add support for EN25S64Priyanka Jain2013-10-07-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Add support for EON EN25S64 SPI flash. Signed-off-by: Priyanka Jain <Priyanka.Jain@freescale.com> Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
| * | | sf: Rename spi_flash filesJagannadha Sutradharudu Teki2013-10-07-4/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Renamed: spi_flash.c -> sf.c spi_flash_internal.h -> sf_internal.h spi_flash_ops.c -> sf_ops.c spi_flash_probe.c -> sf_probe.c Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
| * | | sf: spi_flash cleanupsJagannadha Sutradharudu Teki2013-10-07-61/+82
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | More cleanups on spi_flash side: - Removed unneeded comments. - Rearranged macros in proper location. - Rearranged func declerations - Renamed few function names. - Added License headers. Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
| * | | sf: probe: Add support for MX25L51235FJagannadha Sutradharudu Teki2013-10-07-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | Add support for Macronix MX25L51235F SPI flash. Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
| * | | sf: probe: Add support for MX25L25635FJagannadha Sutradharudu Teki2013-10-07-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | Add support for Macronix MX25L25635F SPI flash. Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
| * | | sf: ops: Add static qualifier to spi_flash_cmd_bankaddr_writeJagannadha Sutradharudu Teki2013-10-07-6/+1
| | | | | | | | | | | | | | | | Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
| * | | sf: probe: Print erase_size while printing flash detailsJagannadha Sutradharudu Teki2013-10-07-1/+2
| | | | | | | | | | | | | | | | | | | | | | | | Included erase_size while printing probed flash details. Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
| * | | sf: probe: Use print_size arg as page_sizeJagannadha Sutradharudu Teki2013-10-07-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Use flash->page_size arg in print_size() instead of flash->sector_size while printing detected flas part details. Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
| * | | sf: probe: Add support for S25FL512S_256KJagannadha Sutradharudu Teki2013-10-07-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | Add support for Spansion S25FL512S_256K SPI flash. Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
| * | | sf: probe: Add support for S25FL256S_256KJagannadha Sutradharudu Teki2013-10-07-1/+2
| | | | | | | | | | | | | | | | | | | | | | | | Add support for Spansion S25FL256S_256K SPI flash. Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
| * | | sf: probe: Add support for EN25Q64Jagannadha Sutradharudu Teki2013-10-07-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | Add support for EON EN25Q64 SPI flash. Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
| * | | sf: Remove unneeded flash drivers filesJagannadha Sutradharudu Teki2013-10-07-1508/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Now the common probing is handled in spi_flash_probe.c hence removed the unneeded flash drivers. Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
| * | | sf: ramtron: Add support for separate flash driverJagannadha Sutradharudu Teki2013-10-07-283/+125
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Compared to other spi flashes, ramtron has a different probing and implementation on flash ops, hence moved ramtron probe code into ramtron driver. Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
| * | | sf: probe: Simply the BAR configuration logicJagannadha Sutradharudu Teki2013-10-07-54/+20
| | | | | | | | | | | | | | | | Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
| * | | sf: probe: Add support for flag status pollingJagannadha Sutradharudu Teki2013-10-07-5/+11
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | From Micron, 512MB onwards, flash requires to poll flag status instead of read status- hence added E_FSR flag on spectific flash parts. Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
| * | | sf: probe: Add support for erase sector selection flagJagannadha Sutradharudu Teki2013-10-07-83/+91
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | SECT_4K, SECT_32K and SECT_64K opeartions are performed to to specific flash by adding a SECT* flag on respective spi_flash_params.flag param. Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
| * | | sf: probe: Add support to clear flash BP# bitsJagannadha Sutradharudu Teki2013-10-07-0/+7
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Few of the flashes(Atmel, Macronix and SST) require to clear BP# bits in flash power ups. So clear these BP# bits at probe time, so-that the flash is ready for user operations. Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
generated by cgit v1.1 at 2024-11-14 17:48:58 +0000