summaryrefslogtreecommitdiff
path: root/drivers
Commit message (Collapse)AuthorAgeLines
* mmc: add bcm2835 driverStephen Warren2013-03-20-0/+190
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This adds a simple driver for the BCM2835's SD controller. Workarounds are implemented for: * Register writes can't be too close to each-other in time, or they will be lost. * Register accesses must all be 32-bit, so implement custom accessors. This code was extracted from: git://github.com/gonzoua/u-boot-pi.git master which was created by Oleksandr Tymoshenko. Portions of the code there were obviously based on the Linux kernel at: git://github.com/raspberrypi/linux.git rpi-3.6.y commit f5b930b "Main bcm2708 linux port" signed-off-by Dom Cobley. swarren changed the following for upstream: * Removed hack udelay()s in bcm2835_sdhci_raw_writel(); setting SDHCI_QUIRK_WAIT_SEND_CMD appears to solve the issues. * Remove register logging from read*/write* functions. * Sort out confusion with min/max_freq values passed to add_sdhci(). * Use more descriptive variable names and calculations in IO accessors. * Simplified and commented twoticks_delay calculation. * checkpatch fixes. Cc: Andy Fleming <afleming@gmail.com> Signed-off-by: Oleksandr Tymoshenko <gonzo@bluezbox.com> Signed-off-by: Stephen Warren <swarren@wwwdotorg.org> Acked-by: Andy Fleming <afleming@gmail.com>
* video: add a driver for the bcm2835Stephen Warren2013-03-20-0/+128
| | | | | | | | | | | | | | | The firmware running on the bcm2835 SoC's VideoCore CPU manages the display controller. Add a simple "LCD" driver that communicates with the firmware using the property mailbox protocol. This configures the display and frame-buffer to match whatever physical resolution the firmware chosen when booting, which is typically the native resolution of the attached display device, presumably unless otherwise specified in config.txt on the boot media. Enable this driver in the Raspberry Pi board configuration. Signed-off-by: Stephen Warren <swarren@wwwdotorg.org> Acked-by: Anatolij Gustschin <agust@denx.de>
* Merge branch 'master' of git://git.denx.de/u-boot-usbTom Rini2013-03-18-47/+3969
|\
| * usb: Add multiple controllers support for EHCI PCIVincent Palatin2013-03-18-9/+16
| | | | | | | | | | | | | | Use the ability to have several active EHCI controller on a system in the PCI EHCI controller implementation. Signed-off-by: Simon Glass <sjg@chromium.org>
| * usb: usbeth: smsc95xx: remove EEPROM loaded checkMichael Spang2013-03-18-4/+0
| | | | | | | | | | | | | | | | | | | | | | | | [port of Linux kernel commit bcd218be5aeb by Steve Glendinning] The eeprom read & write commands currently check the E2P_CMD_LOADED_ bit is set before allowing any operations. This prevents any reading or writing unless a correctly programmed EEPROM is installed. Signed-off-by: Michael Spang <spang@chromium.org> Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Marek Vasut <marex@denx.de>
| * usb: ehci: Fix aliasing issue in EHCI interrupt codeVincent Palatin2013-03-18-1/+1
| | | | | | | | | | | | | | | | | | | | The interrupt endpoint handling code stores the buffer pointer in the QH padding field. We need to make it the size of a pointer to avoid strict aliasing issue with the compiler. Signed-off-by: Vincent Palatin <vpalatin@chromium.org> Signed-off-by: Simon Glass <sjg@chromium.org>
| * usb: ehci: Support interrupt transfers via periodic listPatrick Georgi2013-03-18-5/+316
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Interrupt transfers aren't meant to be used from the async list (the EHCI spec indicates trouble with low/full-speed intr on async). Build a periodic list instead, and provide an API to make use of it. Then, use that API from the existing interrupt transfer API. This provides support for USB keyboards using EHCI. Use timeouts to ensure we cannot get stuck in the keyboard scanning if something wrong happens (USB device unplugged or fatal I/O error) Signed-off-by: Vincent Palatin <vpalatin@chromium.org> Signed-off-by: Julius Werner <jwerner@chromium.org> Signed-off-by: Simon Glass <sjg@chromium.org>
| * usb: ehci: exynos: Enable non-dt pathVivek Gautam2013-03-18-0/+7
| | | | | | | | | | | | | | | | Enabling the non-dt path for the driver so that we don't get any build errors for non-dt configuration. Signed-off-by: Vivek Gautam <gautam.vivek@samsung.com> Acked-by: Simon Glass <sjg@chromium.org>
| * usb: ehci: exynos: Fix multiple FDT decodeVivek Gautam2013-03-18-28/+16
| | | | | | | | | | | | | | | | | | | | With current FDT support driver tries to parse device node twice in ehci_hcd_init() and ehci_hcd_stop(), which shouldn't happen ideally. Making provision to store data in a global structure and thereby passing its pointer when needed. Signed-off-by: Vivek Gautam <gautam.vivek@samsung.com>
| * usb:gadget: USB Mass Storage Gadget supportLukasz Majewski2013-03-18-0/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch adds the USB Mass Storage Gadget to u-boot New command called "ums" is implemented to provide access to on-device embedded persistent memory. USB Mass Storage is supposed to work on top of the USB Gadget framework Signed-off-by: Lukasz Majewski <l.majewski@samsung.com> Signed-off-by: Piotr Wilczek <p.wilczek@samsung.com> Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com> CC: Marek Vasut <marek.vasut@gmail.com>
| * usb:composite: USB Mass Storage - f_mass_storage.c from Linux kernelPiotr Wilczek2013-03-18-0/+2793
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The f_mass_storage.c source file from v2.6.36 Linux kernel. commit 8876f5e7d3b2a320777dd4f6f5301d474c97a06c Author: Michal Nazarewicz <m.nazarewicz@samsung.com> Date: Mon Jun 21 13:57:09 2010 +0200 USB: gadget: f_mass_storage: added eject callback Signed-off-by: Lukasz Majewski <l.majewski@samsung.com> Signed-off-by: Piotr Wilczek <p.wilczek@samsung.com> Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com> CC: Marek Vasut <marek.vasut@gmail.com>
| * usb:composite: USB Mass Storage - storage_common.c from Linux kernelLukasz Majewski2013-03-18-0/+653
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The storage_common.c source file from v2.6.36 Linux kernel. commit d26a6aa08b9f12b44fb1ee65625e7480d3d5bb81 Author: Michal Nazarewicz <m.nazarewicz@samsung.com> Date: Mon Nov 9 14:15:23 2009 +0100 USB: g_mass_storage: code cleaned up and comments updated Signed-off-by: Lukasz Majewski <l.majewski@samsung.com> Signed-off-by: Andrzej Pietrasiewicz <andrzej.p@samsung.com> Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com> CC: Marek Vasut <marek.vasut@gmail.com>
| * usb:composite:fix Provide function data when addressing device with only one ↵Lukasz Majewski2013-03-18-0/+19
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | interface This commit fixes problems with some non-standard requests send with device address instead of interface address (bmRequestType.Receipent field). This happens with dfu-util (debian version: 0.5), which address non standard requests (like w_value=0x21 and bRequest=GET_DESCRIPTOR) to device. Without this fix, the above request is STALLED, and hence causes dfu-util to assume some standard configuration (packet size = 1024B instead of 4096B) In turn it displays following errors: Error obtaining DFU functional descriptor Warning: Assuming DFU version 1.0 Warning: Transfer size can not be detected ... Warning: Trying default transfer size 1024 This fix allows passing non-standard request to function setup code, where it shall be handled. Tested at: Trats (exynos4210) Tested with:DFU and UMS gadgets Signed-off-by: Lukasz Majewski <l.majewski@samsung.com> Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
| * usbtty: adapt buffers for large packet supportShiraz Hashim2013-03-16-1/+1
| | | | | | | | | | | | | | Increase buffer sizes at driver and tty level to accommodate kermit large packet support. Signed-off-by: Shiraz Hashim <shiraz.hashim@st.com>
| * usb/host/ehci: Add support for EHCI on spearVipin Kumar2013-03-16-0/+60
| | | | | | | | | | | | | | Add EHCI support for spear boards Signed-off-by: Armando Visconti <armando.visconti@st.com> Signed-off-by: Vipin Kumar <vipin.kumar@st.com>
| * usb: Fix bug when both DFU & ETHER are definedPantelis Antoniou2013-03-16-2/+8
| | | | | | | | | | | | | | | | | | | | | | When both CONFIG_USB_GADGET & CONFIG_USB_ETHER are defined the makefile links objects twice. This patch uses a Makefile specific idiom of 'if defined(CONFIG_USB_GADGET) || defined(CONFIG_USB_ETHER)' to handle the case. Signed-off-by: Pantelis Antoniou <panto@antoniou-consulting.com>
| * dfu: Add a partition type targetPantelis Antoniou2013-03-16-0/+31
| | | | | | | | | | | | | | Dealing with raw block numbers with the dfu is very annoying. Introduce a partition method. Signed-off-by: Pantelis Antoniou <panto@antoniou-consulting.com>
| * dfu: Properly zero out timeout valuePantelis Antoniou2013-03-16-0/+3
| | | | | | | | | | | | | | Zero out timeout value; letting it filled with undefined values ends up with the dfu host hanging. Signed-off-by: Pantelis Antoniou <panto@antoniou-consulting.com>
| * usb: ehci: Add 64-bit controller supportVincent Palatin2013-03-16-0/+3
| | | | | | | | | | | | | | | | On EHCI controller with 64-bit address space support, we must initialize properly the high word for the PCI bus master accesses. Signed-off-by: Vincent Palatin <vpalatin@chromium.org> Signed-off-by: Simon Glass <sjg@chromium.org>
| * usb: ehci: generic PCI supportVincent Palatin2013-03-16-1/+40
| | | | | | | | | | | | | | | | | | Instead of hardcoding the PCI IDs on the USB controller, use the PCI class to detect them. Ensure the busmaster bit is properly set in the PCI configuration. Signed-off-by: Simon Glass <sjg@chromium.org>
* | Merge branch 'master' of git://git.denx.de/u-boot-armTom Rini2013-03-18-451/+1104
|\ \ | |/ |/| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Albert's rework of the linker scripts conflicted with Simon's making everyone use __bss_end. We also had a minor conflict over README.scrapyard being added to in mainline and enhanced in u-boot-arm/master with proper formatting. Conflicts: arch/arm/cpu/ixp/u-boot.lds arch/arm/cpu/u-boot.lds arch/arm/lib/Makefile board/actux1/u-boot.lds board/actux2/u-boot.lds board/actux3/u-boot.lds board/dvlhost/u-boot.lds board/freescale/mx31ads/u-boot.lds doc/README.scrapyard include/configs/tegra-common.h Build tested for all of ARM and run-time tested on am335x_evm. Signed-off-by: Tom Rini <trini@ti.com>
| * Merge branch 'u-boot-tegra/master' into 'u-boot-arm/master'Albert ARIBAUD2013-03-15-79/+735
| |\
| | * mmc: Tegra: Add SD bus power/voltage function and MMC pad init call.Tom Warren2013-03-14-8/+55
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Tegra30 requires the SD Bus Voltage & Power bits be set in the SD Power Control register. Tegra20 works w/o them set, but do it anyway for those SoCs as it's part of the SD spec. Also call a common board pad init routine (pad_init_mmc) in mmc_reset(), used by Tegra30 only for now. Note that Tegra20 SD/MMC HW differs enough from Tegra20 that a new compatible entry is used in the fdt compat_names/id tables. Signed-off-by: Tom Warren <twarren@nvidia.com> Reviewed-by: Stephen Warren <swarren@nvidia.com>
| | * Tegra: MMC: Add DT support to MMC driver for all T20 boardsTom Warren2013-03-14-58/+121
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | tegra_mmc_init() now parses the DT info for bus width, WP/CD GPIOs, etc. Tested on Seaboard, fully functional. Tamonten boards (medcom-wide, plutux, and tec) use a different/new dtsi file w/common settings. Signed-off-by: Tom Warren <twarren@nvidia.com> Signed-off-by: Thierry Reding <thierry.reding@avionic-design.de> Reviewed-by: Stephen Warren <swarren@nvidia.com>
| | * Tegra: I2C: Add T114 clock support to tegra_i2c driverTom Warren2013-03-14-5/+37
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | T114 has a slightly different I2C clock, with a new (extra) divisor in standard/fast mode and HS mode. Tested on my Dalmore, and the I2C clock is 100KHz +/- 3Hz on my Saleae Logic analyzer. Added a new entry in compat_names for T114 I2C since it differs from the previous Tegra SoCs. A flag is set when T114 I2C HW is found so new features like the extra clock divisor can be used. Signed-off-by: Tom Warren <twarren@nvidia.com> Acked-by: Laxman Dewangan <ldewangan@nvidia.com>
| | * tegra: usb: move [start|stop]_port into ehci_hcd_[init|stop]Lucas Stach2013-03-14-68/+51
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The ehci_hcd entry points were just calling into the Tegra USB functions. Now that they are in the same file we can just move over the implementation. Signed-off-by: Lucas Stach <dev@lynxeye.de> Acked-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com>
| | * tegra: usb: move implementation into right directoryLucas Stach2013-03-14-2/+533
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This moves the Tegra USB implementation into the drivers/usb/host directory. Note that this merges the old /arch/arm/cpu/armv7/tegra20/usb.c file into ehci-tegra.c. No code changes, just moving stuff around. v2: While at it also move some defines and the usb.h header file to make usb driver usable for Tegra30. NOTE: A lot more work is required to properly init the PHYs and PLL_U on Tegra30, this is just to make porting easier and it does no harm here. Signed-off-by: Lucas Stach <dev@lynxeye.de> Acked-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com>
| * | Merge branch 'u-boot-imx/master' into 'u-boot-arm/master'Albert ARIBAUD2013-03-15-110/+105
| |\ \ | | |/ | |/|
| | * mxs: Make ehci-mxs multiport capableMarek Vasut2013-03-07-68/+81
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Rework ehci-mxs so it supports both ports on MX28. It was necessary to wrap the per-port configuration into struct ehci_mxs_port and pull out the clock configuration function. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Fabio Estevam <fabio.estevam@freescale.com> Cc: Otavio Salvador <otavio@ossystems.com.br> Cc: Stefano Babic <sbabic@denx.de>
| | * mxs: Squash the header file usage in ehci-mxsMarek Vasut2013-03-07-5/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The ehci-mxs driver included the register definitions directly. Use imx-regs.h instead since it contains proper handling of the differences between mx23 and mx28. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Fabio Estevam <fabio.estevam@freescale.com> Cc: Otavio Salvador <otavio@ossystems.com.br> Cc: Stefano Babic <sbabic@denx.de> Acked-by: Otavio Salvador <otavio@ossystems.com.br>
| | * mxs: spi: Remove CONFIG_MXS_SPI_DMA_ENABLEMarek Vasut2013-03-07-16/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The CONFIG_MXS_SPI_DMA_ENABLE is no longer relevant as the SPI DMA has proven to work correctly. Remove this configuration option. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Fabio Estevam <fabio.estevam@freescale.com> Cc: Otavio Salvador <otavio@ossystems.com.br> Cc: Stefano Babic <sbabic@denx.de>
| | * mxs: spi: Fix the MXS SPI for mx23Marek Vasut2013-03-07-2/+17
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The MX23 has slightly different register layout. Adjust the SPI driver to match the layout, both the PIO and DMA part. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Fabio Estevam <fabio.estevam@freescale.com> Cc: Otavio Salvador <otavio@ossystems.com.br> Cc: Stefano Babic <sbabic@denx.de>
| | * mxs: mmc: spi: dma: Better wrap the MXS differencesMarek Vasut2013-03-07-18/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch streamlines the differences between the MX23 and MX28 by implementing a few helper functions to handle different DMA channel mapping, different clock domain for SSP block and fixes a few minor bugs. First of all, the DMA channel mapping is now fixed in dma.h by defining the actual channel map for both MX23 and MX28. Thus, MX23 now does no longer use MX28 channel map which was wrong. Also, there is a fix for MX28 DMA channel map, where the last four channels were incorrect. Next, because correct DMA channel map is in place, the mxs_dma_init_channel() call now bases the channel ID starting from SSP port #0. This removes the need for DMA channel offset being added and cleans up the code. For the same reason, the SSP0 offset can now be used in mxs_dma_desc_append(), thus no need to adjust dma channel number in the driver either. Lastly, the SSP clock ID is now retrieved by calling mxs_ssp_clock_by_bus() which handles the fact that MX23 has shared SSP clock for both ports, while MX28 has per-port SSP clock. Finally, the mxs_ssp_bus_id_valid() pulls out two implementations of the same functionality from MMC and SPI driver into common code. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Fabio Estevam <fabio.estevam@freescale.com> Cc: Otavio Salvador <otavio@ossystems.com.br> Cc: Stefano Babic <sbabic@denx.de>
| | * USB: drop unneeded header in ehci-mx6Stefano Babic2013-03-07-1/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Including header for pads is not needed and breaks board after renaming pin definitions. Series-to: u-boot Series-cc: marex@denx.de,fabio.estevam@freescale.com,eric.nelson@boundarydevices.com Signed-off-by: Stefano Babic <sbabic@denx.de>
| * | Merge u-boot/master into u-boot-ti/masterTom Rini2013-03-11-28/+441
| |\ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | In master we had already taken a patch to fix the davinci GPIO code for CONFIG_SOC_DM646X and in u-boot-ti we have additional patches to support DA830 (which is CONFIG_SOC_DA8XX && !CONFIG_SOC_DA850). Resolve these conflicts manually and comment the #else/#endif lines for clarity. Conflicts: arch/arm/include/asm/arch-davinci/gpio.h drivers/gpio/da8xx_gpio.c Signed-off-by: Tom Rini <trini@ti.com>
| * | | ARM: OMAP4+: Make control module register structure genericLokesh Vutla2013-03-11-15/+10
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | A seperate omap_sys_ctrl_regs structure is defined for omap4 & 5. If there is any change in control module for any of the ES versions, a new structure needs to be created. In order to remove this dependency, making the register structure generic for all the omap4+ boards. Signed-off-by: R Sricharan <r.sricharan@ti.com> Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com> Reviewed-by: Tom Rini <trini@ti.com>
| * | | am335x: cpsw: optimize cpsw_send to increase network performanceMugunthan V N2013-03-11-2/+18
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Before submitting packets to cpdma, phy status is updated on every packet which leads to delay in packet send intern reduces the Ethernet performance. Checking mdio status for each packet will reduce timetaken to send a packet and there by increasing the Ethernet performance. With this the performance is increased from 208KiB/s to 375KiB/s on EVMsk Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com>
| * | | SPL: ONENAND: Fix onenand_spl_load_image implementation.Enric Balletbo i Serra2013-03-08-8/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Tested with an IGEPv2 board seems that current onenand_spl_load_image implementation doesn't work. This patch fixes this function changing the read loop and reading the onenand blocks from page to page. Tested with various IGEP based boards with a OneNAND from Numonyx. Signed-off-by: Enric Balletbo i Serra <eballetbo@iseebcn.com>
| * | | omap3: allow dynamic selection of gfx_formatNikita Kiryanov2013-03-08-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Currently, omap3_dss_panel_config() sets gfx_format to a value that is hardcoded in the code. This forces anyone who wants to use a different gfx_format to make adjustments after calling omap3_dss_panel_config(). This could be avoided if the value of gfx_format were parameterized as input for omap3_dss_panel_config(). Make gfx_format a field in struct panel_config, and update existing structs to set this field to the value that was originally hard coded. Cc: Wolfgang Denk <wd@denx.de> Cc: Jeroen Hofstee <jeroen@myspectrum.nl> Cc: Tom Rini <trini@ti.com> Cc: Anatolij Gustschin <agust@denx.de> Signed-off-by: Nikita Kiryanov <nikita@compulab.co.il> Signed-off-by: Igor Grinberg <grinberg@compulab.co.il>
| * | | omap_hsmmc: add driver check for write protectionNikita Kiryanov2013-03-08-2/+12
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add check for write protection in omap mmc driver. Signed-off-by: Nikita Kiryanov <nikita@compulab.co.il> Signed-off-by: Igor Grinberg <grinberg@compulab.co.il> Reviewed-by: Tom Rini <trini@ti.com>
| * | | mmc: add support for write protectionNikita Kiryanov2013-03-08-0/+30
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Add generic mmc write protection functionality. Signed-off-by: Nikita Kiryanov <nikita@compulab.co.il> Signed-off-by: Igor Grinberg <grinberg@compulab.co.il>
| * | | omap_hsmmc: implement driver check for card detectionNikita Kiryanov2013-03-08-2/+35
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Implement driver check for card detection. Signed-off-by: Nikita Kiryanov <nikita@compulab.co.il> Signed-off-by: Igor Grinberg <grinberg@compulab.co.il>
| * | | omap_hsmmc: introduce omap_hsmmc_data structNikita Kiryanov2013-03-08-10/+18
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Currently there's no appropriate place to store driver specific data because the pointer that is meant for that (priv) is being used to store the base address of mmc registers. Introduce a new struct for storing driver specific data. Signed-off-by: Nikita Kiryanov <nikita@compulab.co.il>
| * | | omap_hsmmc: fix out of bounds array accessNikita Kiryanov2013-03-08-1/+1
| | |/ | |/| | | | | | | | | | | | | | | | | | | | | | | | | There are 3 MMC/SD/SDIO controllers in OMAP SoCs, but only 2 structs are defined for devices. This leads to data being written outside of array bounds on systems that use all 3 controllers. Update hsmmc_dev array to the correct size. Signed-off-by: Nikita Kiryanov <nikita@compulab.co.il>
| * | ARM: ns9750dev: remove remainders of dead boardWolfgang Denk2013-02-28-221/+0
| | | | | | | | | | | | | | | | | | | | | | | | Commit 8b710b1 started removing code for the unmaintained "ns9750dev" board; the board support is still broken, and not included anywhere in the Makefile or boards.cfg. Remove the remaining dead code. Signed-off-by: Wolfgang Denk <wd@denx.de>
| * | da8xx: Add the missing pinmux for da830 to the gpio driverTomas Novotny2013-02-18-0/+133
| | | | | | | | | | | | | | | | | | | | | | | | | | | The pinmux was generated from linux/arch/arm/mach-davinci/da830.c as of kernel version 3.7.5. If the driver is used for the da850, then SoC variant must be specified by CONFIG_SOC_DA850. Signed-off-by: Tomas Novotny <tomas@novotny.cz> Cc: Tom Rini <trini@ti.com>
* | | serial: ns16550: Remove unwanted castSimon Glass2013-03-15-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This cast does not seem correct, since we should be writing to a pointer, not a ulong. This fixes the following warning on nds32: -ns16550.c:49: warning: passing argument 2 of 'writeb' makes pointer from integer without a cast Signed-off-by: Simon Glass <sjg@chromium.org>
* | | I2C: S3C24X0: Bug fixes in i2c_transferRajeshwari Shinde2013-03-12-8/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch corrects the following issues 1) Write the correct M/T Stop value to I2CSTAT after i2c write. According to the spec, after finish the data transmission, we should write a M/T Stop (I2C_MODE_MT | I2C_TXRX_ENA) to I2CSTAT instead of a M/R Stop (I2C_MODE_MR | I2C_TXRX_ENA). 2) Not split the write to I2CSTAT into 2 steps in i2c read. According to the spec, we should write the combined M/R Start value to I2CSTAT after setting the slave address to I2CDS 3) Fix the mistake of making an equality check to an assignment. In the case of I2C write with the zero-length address, while tranfering the data, it should be an equality check (==) instead of an assignment (=). Signed-off-by: Tom Wai-Hong Tam <waihong@chromium.org> Signed-off-by: Rajeshwari Shinde <rajeshwari.s@samsung.com>
* | | I2C: S3C24X0: Remove the dead codeRajeshwari Shinde2013-03-12-7/+0
| | | | | | | | | | | | | | | | | | | | | | | | This revomes the code under #if 0 in the s3c24x0_i2c driver. Signed-off-by: Alim Akhtar <alim.akhtar@samsung.com> Signed-off-by: Rajeshwari Shinde <rajeshwari.s@samsung.com> Acked-by: Simon Glass <sjg@chromium.org>
* | | mvsata_ide.c: Correction of typo in commentsGray Remlin2013-03-11-2/+2
| | | | | | | | | | | | Signed-off-by: Gray Remlin <gryrmln@gmail.com>
generated by cgit v1.1 at 2024-11-11 13:35:57 +0000