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* mmc: Tegra: Add SD bus power/voltage function and MMC pad init call.Tom Warren2013-03-14-8/+55
| | | | | | | | | | | | | | Tegra30 requires the SD Bus Voltage & Power bits be set in the SD Power Control register. Tegra20 works w/o them set, but do it anyway for those SoCs as it's part of the SD spec. Also call a common board pad init routine (pad_init_mmc) in mmc_reset(), used by Tegra30 only for now. Note that Tegra20 SD/MMC HW differs enough from Tegra20 that a new compatible entry is used in the fdt compat_names/id tables. Signed-off-by: Tom Warren <twarren@nvidia.com> Reviewed-by: Stephen Warren <swarren@nvidia.com>
* Tegra: MMC: Add DT support to MMC driver for all T20 boardsTom Warren2013-03-14-58/+121
| | | | | | | | | | | | tegra_mmc_init() now parses the DT info for bus width, WP/CD GPIOs, etc. Tested on Seaboard, fully functional. Tamonten boards (medcom-wide, plutux, and tec) use a different/new dtsi file w/common settings. Signed-off-by: Tom Warren <twarren@nvidia.com> Signed-off-by: Thierry Reding <thierry.reding@avionic-design.de> Reviewed-by: Stephen Warren <swarren@nvidia.com>
* Tegra: I2C: Add T114 clock support to tegra_i2c driverTom Warren2013-03-14-5/+37
| | | | | | | | | | | | | T114 has a slightly different I2C clock, with a new (extra) divisor in standard/fast mode and HS mode. Tested on my Dalmore, and the I2C clock is 100KHz +/- 3Hz on my Saleae Logic analyzer. Added a new entry in compat_names for T114 I2C since it differs from the previous Tegra SoCs. A flag is set when T114 I2C HW is found so new features like the extra clock divisor can be used. Signed-off-by: Tom Warren <twarren@nvidia.com> Acked-by: Laxman Dewangan <ldewangan@nvidia.com>
* tegra: usb: move [start|stop]_port into ehci_hcd_[init|stop]Lucas Stach2013-03-14-68/+51
| | | | | | | | | | The ehci_hcd entry points were just calling into the Tegra USB functions. Now that they are in the same file we can just move over the implementation. Signed-off-by: Lucas Stach <dev@lynxeye.de> Acked-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com>
* tegra: usb: move implementation into right directoryLucas Stach2013-03-14-2/+533
| | | | | | | | | | | | | | | | This moves the Tegra USB implementation into the drivers/usb/host directory. Note that this merges the old /arch/arm/cpu/armv7/tegra20/usb.c file into ehci-tegra.c. No code changes, just moving stuff around. v2: While at it also move some defines and the usb.h header file to make usb driver usable for Tegra30. NOTE: A lot more work is required to properly init the PHYs and PLL_U on Tegra30, this is just to make porting easier and it does no harm here. Signed-off-by: Lucas Stach <dev@lynxeye.de> Acked-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com>
* Merge u-boot/master into u-boot-ti/masterTom Rini2013-03-11-28/+441
|\ | | | | | | | | | | | | | | | | | | | | | | | | In master we had already taken a patch to fix the davinci GPIO code for CONFIG_SOC_DM646X and in u-boot-ti we have additional patches to support DA830 (which is CONFIG_SOC_DA8XX && !CONFIG_SOC_DA850). Resolve these conflicts manually and comment the #else/#endif lines for clarity. Conflicts: arch/arm/include/asm/arch-davinci/gpio.h drivers/gpio/da8xx_gpio.c Signed-off-by: Tom Rini <trini@ti.com>
| * Merge branch 'mem' of git://git.denx.de/u-boot-x86Tom Rini2013-03-04-9/+39
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| | * net: Use new numeric setenv functionsSimon Glass2013-02-28-3/+1
| | | | | | | | | | | | | | | | | | Use setenv_ulong(), setenv_hex() and setenv_addr() in net/ Signed-off-by: Simon Glass <sjg@chromium.org>
| | * sandbox: Improve sandbox serial port keyboard interfaceTaylor Hutt2013-02-28-6/+38
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Implements the tstc() interface for the serial driver. Multiplexing the console between the serial port and a keyboard uses a polling method of checking if characters are available; this means that the serial console must be non-blocking when attempting to read characters. Signed-off-by: Taylor Hutt <thutt@chromium.org> Signed-off-by: Simon Glass <sjg@chromium.org>
| * | Merge branch 'master' of git://git.denx.de/u-boot-blackfinTom Rini2013-03-04-16/+361
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| | * blackfin: add bf6xx spi driverScott Jiang2013-03-04-0/+309
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Spi driver for bf60x is different from old one, so implement a new driver for it. Signed-off-by: Scott Jiang <scott.jiang.linux@gmail.com> Signed-off-by: Sonic Zhang <sonic.zhang@analog.com> Signed-off-by: Bob Liu <lliubbo@gmail.com> Signed-off-by: Sonic Zhang <sonic.adi@gmail.com>
| | * blackfin: bf60x: add rsi/sdh supportSonic Zhang2013-03-04-16/+52
| | | | | | | | | | | | | | | | | | | | | | | | Add rsi/sdh support for bf60x. Signed-off-by: Sonic Zhang <sonic.zhang@analog.com> Signed-off-by: Bob Liu <lliubbo@gmail.com> Signed-off-by: Sonic Zhang <sonic.adi@gmail.com>
| * | mtd: nand: Check if NAND is locked tight before lock cmdsJoe Hershberger2013-02-22-1/+18
| |/ | | | | | | | | | | | | | | | | If the NAND is locked tight, commands such as lock and unlock will not work, but the NAND chip may not report an error. Check the lock tight status before attempting such operations so that an error status can be reported if we know the operation will not succeed. Signed-off-by: Joe Hershberger <joe.hershberger@ni.com>
| * gpio: Build the da8xx_gpio code for the davinci644x deviceHolger Hans Peter Freyther2013-02-20-0/+5
| | | | | | | | | | | | | | The differences include the number of GPIOs and that one is not required to set the pinmux on request. Signed-off-by: Holger Hans Peter Freyther <holger@freyther.de>
| * serial/ns16550: don't generate functions for undefined portsScott Wood2013-02-19-0/+12
| | | | | | | | | | | | | | This saved 640 bytes on MPC8536DS (a board with two of the six ports defined). Signed-off-by: Scott Wood <scottwood@freescale.com>
| * kmeter1_nand: allow uasge of NAND_ECC_SOFT_BCHHolger Brunck2013-02-15-0/+4
| | | | | | | | | | | | | | | | | | If CONFIG_NAND_ECC_BCH is set we use 4-bit error corretion code instead of the 1-bit error correction code on the NAND device within this driver. Signed-off-by: Holger Brunck <holger.brunck@keymile.com> Acked-by: Scott Wood <scottwood@freescale.com>
* | ARM: OMAP4+: Make control module register structure genericLokesh Vutla2013-03-11-15/+10
| | | | | | | | | | | | | | | | | | | | | | | | A seperate omap_sys_ctrl_regs structure is defined for omap4 & 5. If there is any change in control module for any of the ES versions, a new structure needs to be created. In order to remove this dependency, making the register structure generic for all the omap4+ boards. Signed-off-by: R Sricharan <r.sricharan@ti.com> Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com> Reviewed-by: Tom Rini <trini@ti.com>
* | am335x: cpsw: optimize cpsw_send to increase network performanceMugunthan V N2013-03-11-2/+18
| | | | | | | | | | | | | | | | | | | | Before submitting packets to cpdma, phy status is updated on every packet which leads to delay in packet send intern reduces the Ethernet performance. Checking mdio status for each packet will reduce timetaken to send a packet and there by increasing the Ethernet performance. With this the performance is increased from 208KiB/s to 375KiB/s on EVMsk Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com>
* | SPL: ONENAND: Fix onenand_spl_load_image implementation.Enric Balletbo i Serra2013-03-08-8/+6
| | | | | | | | | | | | | | | | | | | | Tested with an IGEPv2 board seems that current onenand_spl_load_image implementation doesn't work. This patch fixes this function changing the read loop and reading the onenand blocks from page to page. Tested with various IGEP based boards with a OneNAND from Numonyx. Signed-off-by: Enric Balletbo i Serra <eballetbo@iseebcn.com>
* | omap3: allow dynamic selection of gfx_formatNikita Kiryanov2013-03-08-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Currently, omap3_dss_panel_config() sets gfx_format to a value that is hardcoded in the code. This forces anyone who wants to use a different gfx_format to make adjustments after calling omap3_dss_panel_config(). This could be avoided if the value of gfx_format were parameterized as input for omap3_dss_panel_config(). Make gfx_format a field in struct panel_config, and update existing structs to set this field to the value that was originally hard coded. Cc: Wolfgang Denk <wd@denx.de> Cc: Jeroen Hofstee <jeroen@myspectrum.nl> Cc: Tom Rini <trini@ti.com> Cc: Anatolij Gustschin <agust@denx.de> Signed-off-by: Nikita Kiryanov <nikita@compulab.co.il> Signed-off-by: Igor Grinberg <grinberg@compulab.co.il>
* | omap_hsmmc: add driver check for write protectionNikita Kiryanov2013-03-08-2/+12
| | | | | | | | | | | | | | | | Add check for write protection in omap mmc driver. Signed-off-by: Nikita Kiryanov <nikita@compulab.co.il> Signed-off-by: Igor Grinberg <grinberg@compulab.co.il> Reviewed-by: Tom Rini <trini@ti.com>
* | mmc: add support for write protectionNikita Kiryanov2013-03-08-0/+30
| | | | | | | | | | | | | | Add generic mmc write protection functionality. Signed-off-by: Nikita Kiryanov <nikita@compulab.co.il> Signed-off-by: Igor Grinberg <grinberg@compulab.co.il>
* | omap_hsmmc: implement driver check for card detectionNikita Kiryanov2013-03-08-2/+35
| | | | | | | | | | | | | | Implement driver check for card detection. Signed-off-by: Nikita Kiryanov <nikita@compulab.co.il> Signed-off-by: Igor Grinberg <grinberg@compulab.co.il>
* | omap_hsmmc: introduce omap_hsmmc_data structNikita Kiryanov2013-03-08-10/+18
| | | | | | | | | | | | | | | | | | | | Currently there's no appropriate place to store driver specific data because the pointer that is meant for that (priv) is being used to store the base address of mmc registers. Introduce a new struct for storing driver specific data. Signed-off-by: Nikita Kiryanov <nikita@compulab.co.il>
* | omap_hsmmc: fix out of bounds array accessNikita Kiryanov2013-03-08-1/+1
| | | | | | | | | | | | | | | | | | | | There are 3 MMC/SD/SDIO controllers in OMAP SoCs, but only 2 structs are defined for devices. This leads to data being written outside of array bounds on systems that use all 3 controllers. Update hsmmc_dev array to the correct size. Signed-off-by: Nikita Kiryanov <nikita@compulab.co.il>
* | ARM: ns9750dev: remove remainders of dead boardWolfgang Denk2013-02-28-221/+0
| | | | | | | | | | | | | | | | Commit 8b710b1 started removing code for the unmaintained "ns9750dev" board; the board support is still broken, and not included anywhere in the Makefile or boards.cfg. Remove the remaining dead code. Signed-off-by: Wolfgang Denk <wd@denx.de>
* | da8xx: Add the missing pinmux for da830 to the gpio driverTomas Novotny2013-02-18-0/+133
|/ | | | | | | | | The pinmux was generated from linux/arch/arm/mach-davinci/da830.c as of kernel version 3.7.5. If the driver is used for the da850, then SoC variant must be specified by CONFIG_SOC_DA850. Signed-off-by: Tomas Novotny <tomas@novotny.cz> Cc: Tom Rini <trini@ti.com>
* Merge branch 'master' of git://git.denx.de/u-boot-armTom Rini2013-02-12-177/+629
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| * tegra: add SPI SLINK driverAllen Martin2013-02-11-0/+344
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add driver for tegra SPI "SLINK" style driver. This controller is similar to the tegra20 SPI "SFLASH" controller. The difference is that the SLINK controller is a genernal purpose SPI controller and the SFLASH controller is special purpose and can only talk to FLASH devices. In addition there are potentially many instances of an SLINK controller on tegra and only a single instance of SFLASH. Tegra20 is currently ths only version of tegra that instantiates an SFLASH controller. This driver supports basic PIO mode of operation and is configurable (CONFIG_OF_CONTROL) to be driven off devicetree bindings. Up to 4 devices per controller may be attached, although typically only a single chip select line is exposed from tegra per controller so in reality this is usually limited to 1. To enable this driver, use CONFIG_TEGRA_SLINK Signed-off-by: Allen Martin <amartin@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com>
| * tegra: spi: add fdt support to tegra SPI SFLASH driverAllen Martin2013-02-11-2/+43
| | | | | | | | | | | | | | | | | | Add support for configuring tegra SPI driver from devicetree. Support is keyed off CONFIG_OF_CONTROL. Add entry in seaboard dts file for spi controller to describe seaboard spi. Signed-off-by: Allen Martin <amartin@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com>
| * Merge branch 'u-boot-imx/master' into 'u-boot-arm/master'Albert ARIBAUD2013-02-02-173/+240
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| | * mxs: mmc: Fix the MMC driver for MX23Marek Vasut2013-01-28-5/+22
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The MX23 has different layout of DMA channels. Fix the MMC driver to support MX23. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Otavio Salvador <otavio@ossystems.com.br> Cc: Fabio Estevam <fabio.estevam@freescale.com> Cc: Stefano Babic <sbabic@denx.de>
| | * mxs: mmc: Allow overriding default card detect implementationMarek Vasut2013-01-28-2/+14
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Some MXS based boards do not implement the card-detect signal. Allow user to specify alternate card-detect implementation. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Otavio Salvador <otavio@ossystems.com.br> Cc: Fabio Estevam <fabio.estevam@freescale.com> Cc: Stefano Babic <sbabic@denx.de>
| | * mxs: mmc: Fix MMC reset on iMX23Otavio Salvador2013-01-28-5/+11
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This does the same reset mask as done in v3.7 Linux kernel code. The block is properly configured for MMC operation that way. Signed-off-by: Otavio Salvador <otavio@ossystems.com.br> Cc: Marek Vasut <marex@denx.de> Cc: Fabio Estevam <fabio.estevam@freescale.com> Cc: Stefano Babic <sbabic@denx.de>
| | * mxs: dma: Fix APBH DMA driver for MX23Marek Vasut2013-01-28-2/+8
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The MX23 has less channels for the APBH DMA, sligtly different register layout and some bits in those registers are placed differently. Reflect this in the driver. This patch fixes MMC/DMA issue on MX23. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Otavio Salvador <otavio@ossystems.com.br> Cc: Fabio Estevam <fabio.estevam@freescale.com> Cc: Stefano Babic <sbabic@denx.de>
| | * net: fec_mxc: get phydev before fec_probeTroy Kisky2013-01-28-43/+76
| | | | | | | | | | | | Signed-off-by: Troy Kisky <troy.kisky@boundarydevices.com>
| | * net: fec_mxc: only call phy_connect in fec_probeTroy Kisky2013-01-28-21/+12
| | | | | | | | | | | | | | | | | | | | | This allows us to create the phydev before calling fec_probe in later patch. Signed-off-by: Troy Kisky <troy.kisky@boundarydevices.com>
| | * net: fec_mxc: use fec_set_dev_name to set nameTroy Kisky2013-01-28-8/+8
| | | | | | | | | | | | | | | | | | | | | This allows us to create the phydev before calling fec_probe in later patch. Signed-off-by: Troy Kisky <troy.kisky@boundarydevices.com>
| | * phy: add phy_find_by_mask/phy_connect_devTroy Kisky2013-01-28-50/+78
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | It is useful to be able to try a range of possible phy addresses to connect. Also, an ethernet device is not required to use phy_find_by_mask leading to better separation of mii vs ethernet, as suggested by Andy Fleming. Signed-off-by: Troy Kisky <troy.kisky@boundarydevices.com>
| | * net: fec_mxc: have fecmxc_initialize call fecmxc_initialize_multiTroy Kisky2013-01-28-16/+8
| | | | | | | | | | | | | | | | | | | | | Having only one call to fec_probe will ease the changing of its parameters. Signed-off-by: Troy Kisky <troy.kisky@boundarydevices.com>
| | * net: fec_mxc: change fec_mii_setspeed parameterTroy Kisky2013-01-28-5/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Only the hardware ethernet registers are needed for this function, so don't pass the more general structure. I'm trying to separate MII and fec. This also fixes MX28 fec_mii_setspeed use on secondary ethernet port This was found by inspection of the code and should be checked on real hardware. Signed-off-by: Troy Kisky <troy.kisky@boundarydevices.com>
| | * net: fec_mxc: delete CONFIG_FEC_MXC_MULTITroy Kisky2013-01-28-1/+1
| | | | | | | | | | | | | | | | | | | | | It is more logical to test for CONFIG_FEC_MXC_PHYADDR to determine whether to define the function fecmxc_initialize. Signed-off-by: Troy Kisky <troy.kisky@boundarydevices.com>
| | * mmc: Limit the number of used SSP ports on MX23Marek Vasut2013-01-21-1/+11
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The MX23 can only use two SSP ports. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Andy Fleming <afleming@freescale.com> Cc: Fabio Estevam <fabio.estevam@freescale.com> Cc: Otavio Salvador <otavio@ossystems.com.br> Cc: Stefano Babic <sbabic@denx.de>
| | * mxs: clock: Use 'mxs' prefix for methodsOtavio Salvador2013-01-21-3/+3
| | | | | | | | | | | | | | | | | | | | | Signed-off-by: Otavio Salvador <otavio@ossystems.com.br> Cc: Fabio Estevam <fabio.estevam@freescale.com> Cc: Marek Vasut <marex@denx.de> Cc: Stefano Babic <sbabic@denx.de>
| | * mxs: ssp: Pull out the SSP bus to regs conversionMarek Vasut2013-01-21-18/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Create function which converts SSP bus number to SSP register pointer. This functionality is reimplemented multiple times in the code, thus make one common implementation. Moreover, make it a switch(), since the SSP ports are not mapped in such nice linear fashion on MX23, therefore having it a switch will simplify things there. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Andy Fleming <afleming@freescale.com> Cc: Fabio Estevam <fabio.estevam@freescale.com> Cc: Stefano Babic <sbabic@denx.de>
| | * mxs: mmc: Drop unused members from struct mxsmmc_privMarek Vasut2013-01-21-12/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | The clock data are not used by the driver, drop them. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Andy Fleming <afleming@freescale.com> Cc: Fabio Estevam <fabio.estevam@freescale.com> Cc: Stefano Babic <sbabic@denx.de>
| * | video: tegra: Update line length to match resolutionThierry Reding2013-01-16-2/+2
| |/ | | | | | | | | | | | | | | | | | | | | | | | | | | | | Instead of storing the computed line length in a local variable, store it in the global lcd_line_length variable to make sure the LCD subsystem can properly draw content for the display resolution. This probably wasn't noticed yet because the only board where LCD support is currently enabled is Seaboard, which runs at a 1366x768 resolution. As it happens this is the maximum resolution supported and also the default that is used to initialize the framebuffer before the configuration from DT is available. Signed-off-by: Thierry Reding <thierry.reding@avionic-design.de> Signed-off-by: Tom Warren <twarren@nvidia.com>
* | sf: stmicro: Add support for N25Q256AJagannadha Sutradharudu Teki2013-02-06-0/+6
| | | | | | | | | | | | | | Add support for Numonyx N25Q256A SPI flash. Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
* | sf: stmicro: Add support for N25Q32AJagannadha Sutradharudu Teki2013-02-06-0/+6
| | | | | | | | | | | | | | Add support for Numonyx N25Q32A SPI flash. Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
* | sf: stmicro: Add support for N25Q32Jagannadha Sutradharudu Teki2013-02-06-0/+6
| | | | | | | | | | | | | | Add support for Numonyx N25Q32 SPI flash. Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
generated by cgit v1.1 at 2024-11-10 12:26:36 +0000