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* ENGR00176837-4 - FEC:enable some macro define for all chipFugang Duan2012-03-31-1/+1
| | | | | | | | | | | | | - Enable below macro define for all chip. Firstly, the marcos will be used in later version for later i.MX. Secondly, fix the build error in the former i.MX series chip before i.MX6. #define PHY_MIPSCR_LINK_UP (0x1 << 10) #define PHY_MIPSCR_SPEED_MASK (0x3 << 14) #define PHY_MIPSCR_1000M (0x2 << 14) #define PHY_MIPSCR_100M (0x1 << 14) #define PHY_MIPSCR_FULL_DUPLEX (0x1 << 13) Signed-off-by: Fugang Duan <B38611@freescale.com>
* mmc: CMD7:MMC_CMD_SELECT_CARD response fixAjay Bhargav2012-03-29-1/+1
| | | | | | | | | | | | | As per JEDEC document JESD84-A441 (page 105) response for CMD7 (MMC_CMD_SELECT_CARD) response should be R1 instead of R1b. In uboot we never take MMC to disconnected state and on powerup its always ideal state which later goes to stand-by state. from document footnote: R1 while selecting from Stand-By State to Transfer State; R1b while selecting from Disconnected State to Programming State. Signed-off-by: Ajay Bhargav <ajay.bhargav@einfochips.com>
* ENGR00176837-3 - FEC : detect phy ID to match the phy type.Fugang Duan2012-03-22-55/+95
| | | | | | | | - Add phy id macro definitions. - Add mxc_get_phy_ouid helper function. - Use phy ouid to check the phy type. Signed-off-by: Fugang Duan <B38611@freescale.com>
* ENGR00176834-2 - i.MX6DL sabresd: board bringupFugang Duan2012-03-20-2/+4
| | | | | | | | | | | | | The serial of patches adds the initial support for mx6dl sabra sd board: - DDR3 400MHz@64bit, 1G, 256M*4 - SD/MMC basic operations - Add PIN/IOMUX support for mmx6dl sabresd. - Ethernet is ok for 100/1000Mbps. - OTP fuse Signed-off-by: Fugang Duan <B38611@freescale.com>
* ENGR00176347-9 fec : increase wait time for phy linkFugang Duan2012-03-13-4/+7
| | | | | | | | | | | | | | - remove the excrescent code in enet_board_init function. - KSZ9021 phy auto-negotiation in mx6solo sabreauto RevA is used to establish link with the remote hub or switch. In general, the negotiation time is about 3-5 senconds But connecting to Gbps hub, the time is range from 8s to 15s. So, changing the MAX link waiting time to 20s. According to repetitious tests, solo ARD ethernet is ok in 100Mbps environment. It is not stable in 1000Mbps mode. Signed-off-by: Fugang Duan <B38611@freescale.com>
* ENGR00176347-4 anatop: add support for mx6solo/dlLily Zhang2012-03-13-1/+1
| | | | | | Enable anatop command "regul" for mx6solo/DL Signed-off-by: Lily Zhang <r58066@freescale.com>
* ENGR00174625: Remove build warnings for mx6qTerry Lv2012-02-17-1/+1
| | | | | | Remove build warnings for mx6q. Signed-off-by: Terry Lv <r65388@freescale.com>
* ENGR00139213: Add read and change voltage support for mx6Terry Lv2012-02-16-0/+278
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | dd read and change voltage support for mx6. For help, pls type "help regul" Detail command info: regul list - List all regulators' name regul show all - Display all regulators' voltage regul show core - Show core voltage in mV regul show periph - Show peripheral voltage in mV regul show <regulator name> - Show regulator's voltage in mV regul set core <voltage value> - Set core voltage in mV regul set periph <voltage value> - Set periph voltage in mV regul set <regulator name> <voltage value> - Set regulator's voltage in mV Example: MX6Q ARM2 U-Boot > regul list Name Voltage vddpu vddcore vddsoc vdd2p5 vdd1p1 vdd3p0 MX6Q ARM2 U-Boot > regul show all Name Voltage vddpu 1100000 vddcore 1100000 vddsoc 1200000 vdd2p5 2400000 vdd1p1 1100000 vdd3p0 3000000 MX6Q ARM2 U-Boot > regul show periph Name Voltage periph: 1100000 MX6Q ARM2 U-Boot > regul show core Name Voltage core: 1100000 MX6Q ARM2 U-Boot > regul set core 1100000 Set voltage succeed! Name Voltage core: 1100000 Signed-off-by: Terry Lv <r65388@freescale.com>
* ENGR00173966-2: fec: add i.mx6dl supportJason Liu2012-02-07-5/+5
| | | | | | | This patch add i.mx6dl support for fec driver i.mx6dl and i.mx6dq shares the same ENET IP. Signed-off-by: Jason Liu <r64343@freescale.com>
* ENGR00172343 Add suport for i.MX 6Q Sabre Smart DeviceNancy Chen2012-01-24-3/+3
| | | | | | | | Add suport for i.MX 6Quad SABRE Smart Device. Signed-off-by: Nancy Chen <Nancy.Chen@freescale.com> Signed-off-by: Tony Lin <tony.lin@freescale.com> Signed-off-by: Frank Li <Frank.Li@freescale.com>
* ENGR00172490: FIX: PMIC registers may not be accessible in u-boot via SPIRobby Cai2012-01-20-2/+6
| | | | | | | | | | | | | | | | The system PMIC registers may not be accessible in u-boot via SPI if function pmic_reg() is called in the latter part of boot up process in u-boot. It is because the imx_spi_slave structure is allocated from malloc() in the spi_setup_slave() function. However, this structure is not completely initialized, which may result in using a dirty control register value at CSPI during transfer. memset() the imx_spi_slave structure after malloc() can resolve this problem Please refer to CT39243849. Signed-off-by: Robby Cai <R63905@freescale.com>
* ENGR00171115 add fec support in mx6q sabreauto boardHake Huang2011-12-31-1/+1
| | | | | | | | | | Add fec support for sabreauto board Need hardware rework: 1. Add R450 10.0k 2. Remove R1105 1k 3. short Pin 1,2 of u516, will impact CAN1 Signed-off-by: Hake Huang <b20222@freescale.com>
* ENGR00170768 Android: Fix fastboot can't used on MX6Q SL MMC1 device.Zhang Jiejing2011-12-21-2/+12
| | | | | | | | | | | Fix fastboot can't used on mmc1 device on android. caused by the mmc part number use strtoul but it need the partition number < 0 . So this caused such error. Fixed by change strtoul to strtol. Signed-off-by: Zhang Jiejing <jiejing.zhang@freescale.com>
* ENGR00169544 - FEC : fix "imx5x bootp command cannot work well".Fugang Duan2011-12-20-59/+55
| | | | | | | | | - "bootp" command sometime cannot work well in i.MX53 platform. - Cause: Phy detect cable link need some time, so need wait the complete of cable detect. Signed-off-by: Fugang Duan <B38611@freescale.com>
* ENGR00170299-1 Android: add support fastboot functionZhang Jiejing2011-12-15-2/+18
| | | | | | add support for otg in MX6Q uboot to enable fastboot function. Signed-off-by: Zhang Jiejing <jiejing.zhang@freescale.com>
* ENGR00163040 - FEC : Fix ethernet cannot work after system sleep.Fugang Duan2011-11-25-6/+26
| | | | | | | | | | | | - Descript: Ethernet can't work in uboot and kernel DHCP throught press 'reset' key when send sleep command 'echo mem > /sys/power/state' - Cause: FEC driver will power down phy when system sleep. If just reset the board, FEC driver cannot run resume function. So, need power on phy in uboot and linux driver. Signed-off-by: Fugang Duan <B38611@freescale.com>
* ENGR00161852: remove u-boot build warnings for mx6qTerry Lv2011-11-10-1/+5
| | | | | | Remove u-boot build warnings for mx6q. Signed-off-by: Terry Lv <r65388@freescale.com>
* ENGR00161277 Add fuse access capability for MX6 Sabre-liteMahesh Mahadevan2011-11-02-1/+1
| | | | | | Add support to read and program fuses in the MX6 Sabre-lite Signed-off-by: Mahesh Mahadevan <r9aadq@freescale.com>
* ENGR00139215 iMX61 Uboot support blow fuseRyan QIAN2011-11-02-0/+257
| | | | | | | | 1. add force option to blow operation 2. add blown value check 3. add simple validation for zeros returned by 'simple_strtoul' call Signed-off-by: Ryan QIAN <b32804@freescale.com>
* ENGR00161004 MX6Q Uboot Rename sabreauto to arm2 boardAnish Trivedi2011-10-28-2/+2
| | | | | | | | | Sabreauto is an inaccurate name for the Armadillo2 board that this code is actually meant for. So, replaced "sabreauto" in folder names, file names, configs, and code with "arm2". Created a new machine id for ARM2 board. Signed-off-by: Anish Trivedi <anish@freescale.com>
* ENGR00139221 USDHC Add SDXC UHS-I supportAnish Trivedi2011-10-27-19/+288
| | | | | | | Modified MMC library for UHS-I command sequence Added support to USDHC driver for UHS-I Signed-off-by: Anish Trivedi <anish@freescale.com>
* ENGR00160399 Added support for the MX6Q Sabre-lite boardMahesh Mahadevan2011-10-25-29/+36
| | | | | | Includes support for uSDHC read, write, FEC, SPI-NOR etc. Signed-off-by: Mahesh Mahadevan <r9aadq@freescale.com>
* ENGR00160725 fastboot: fix the serial number display errorXinyu Chen2011-10-25-1/+1
| | | | | | Incorrect usb string package size assign. Signed-off-by: Xinyu Chen <xinyu.chen@freescale.com>
* ENGR00156670-2 MMC: Fixed some bugs in common codeAnish Trivedi2011-09-13-1/+1
| | | | | | | | | | | | | Need to send RCA when sending CMD13. Cannot use print_size function when displaying card capacity because it expects a 32 bit integer as input, while mmc->capacity is a 64 bit integer. There is loss of information leading to incorrect capacities being displayed for "mmcinfo" cmd. Changed it to simply print the entire 64 bit integer, which is the number of bytes. Signed-off-by: Tony Lin <tony.lin@freescale.com> Signed-off-by: Anish Trivedi <anish@freescale.com>
* ENGR00156670-1 ESDHC/USDHC: Remove delay before each cmd and some bug fixesAnish Trivedi2011-09-13-8/+13
| | | | | | | | | | | | Removed delay of 10 ms before each command. There should not be a need to have this delay after the ENGR00156405 patch that polls until card is not busy anymore before proceeding to next cmd. Added poll on reset bits of controller after the bits are set to wait until they clear before proceeding further. Signed-off-by: Tony Lin <tony.lin@freescale.com> Signed-off-by: Anish Trivedi <anish@freescale.com>
* ENGR00156405 ESDHC: Add workaround for auto-clock gate errata ENGcm03648Anish Trivedi2011-09-13-2/+33
| | | | | | | | | | | | The errata, not applicable to USDHC, causes ESDHC to shut off clock to the card when auto-clock gating is enabled for commands with busy signalling and no data phase. The card might require the clock to exit the busy state, so the workaround is to disable the auto-clock gate bits in SYSCTL register for such commands. The workaround also entails polling on DAT0 bit in the PRSSTAT register to learn when busy state is complete. Auto-clock gating is re-enabled at the end of busy state. Signed-off-by: Anish Trivedi <anish@freescale.com>
* ENGR00156304 eMMC: Need to update partition config after changing boot partitionAnish Trivedi2011-09-08-32/+33
| | | | | | | | | | | | | | | | After enabling boot partition on an eMMC using "mmc bootpart" command, the partition configuration variable that is supposed to track this value on the eMMC is not updated. This leads to stale and possibly inaccurate boot partition number being printed when "mmcinfo" command is used, thereby confusing the user. The fix is to update the part_config variable of mmc struct with the new value that was just written to the eMMC. Also removed condition that restricted boot_bus_width programming (for fastboot) to eMMC with DDR support only. Now, even non-DDR capable eMMCs can be programmed for fastboot (in SDR mode). Signed-off-by: Anish Trivedi <anish@freescale.com>
* ENGR00139254: Enable MX6Q Uboot Splash ScreenSandor Yu2011-09-02-30/+68
| | | | | | | | | | | | | | Only support LVDS0 splash screen. Enable splash process: 1.define CONFIG_SPLASH_SCREEN in mx6q_sabreauto.h 2.Config U-boot with followed command:() setenv splashimage '0x30000000' #Set splash position as Center setenv splashpos 'm,m' #Set LVDS via LVDS bridge 0 setenv lvds_num 0 Signed-off-by: Sandor Yu <r01008@freescale.com>
* ENGR00154666-4: Align u-boot mmc command with communityTerry Lv2011-09-01-3/+1
| | | | | | | Change fastboot code for that fastboot uses mmc command to access card. Thus the code need to be modified to new mmc command. Signed-off-by: Terry Lv <r65388@freescale.com>
* ENGR00154666-3: Align u-boot mmc command with communityTerry Lv2011-09-01-326/+552
| | | | | | | | | | | This patch will enhance mmc command. 1. Add erase command. 2. Abandon dev_no in mmc command. User need to switch slot with "mmc dev" command. 3. Add mmc part switch command. Enhance partition switch support. 4. Add mmc bootpart. Boot partition support is more flexible. Signed-off-by: Terry Lv <r65388@freescale.com>
* ENGR00153759 mx51: fix fastboot build failed without boot partition macroXinyu Chen2011-07-27-0/+2
| | | | | | | In mx51 configuration, CONFIG_BOOT_PARTITION_ACCESS is not defined. This cause build error to fastboot.c Signed-off-by: Xinyu Chen <xinyu.chen@freescale.com>
* ENGR00153605 fastboot: uboot cannot be burned to boot partitionSammy He2011-07-26-1/+6
| | | | | | | uboot image cannot be burned to boot partition for eMMC 4.3. This patch will fix it. Signed-off-by: Sammy He <r62914@freescale.com>
* ENGR00152755 MX6 Switch DRAM init script from plugin to DCD for emmc fastbootAnish Trivedi2011-07-06-2/+6
| | | | | | | | | | | | | | | | | ROM requires DCD table instead of plugin to initialize DRAM if emmc fastboot mode is to be used. Therefore, switched the DRAM script from plugin to DCD table. The DCD table created is based on the following RVD script: Arik_init_DDR3_528MHz_002.inc found at http://compass.freescale.net/livelink/livelink?func=ll&objId=222928845 When fastboot mode is used by ROM, the MMC_BOOT register of USDHC does not get reset when RSTA bit is set by uboot driver. Therefore, need to write 0 to it manually during driver init. This brings USDHC out of fastboot mode, allowing normal communication with emmc to proceed in uboot. Changed comments for DLL delay to be more accurate. Signed-off-by: Anish Trivedi <anish@freescale.com>
* ENGR00139206 MX6 USDHC eMMC 4.4 supportAnish Trivedi2011-07-05-14/+42
| | | | | | | | | | | New bit definitions in USDHC. Added is_usdhc variable to fsl_esdhc_cfg to distinguish between ESDHC and USDHC. Enabled DDR mode support in USDHC. Created a config to customize target delay for DDR mode. Modified USDHC pad settings to make DDR mode work for all emmcs at 50 MHz. Signed-off-by: Anish Trivedi <anish@freescale.com>
* ENGR00152241 MX6: enable 1G speed mode for PHY and ENETZeng Zhaoming2011-06-29-10/+41
| | | | | | | | | | | | | In precode, PHY forced to work at 100M even connect to 1G switch. In this commit, let PHY auto negotiate it working speed. Enet tx work at store-and-forward mode. BTW, AR8031 take quite a long time, about 1.6s from negotiation to link up. we have to wait and then set ENET correctly. Signed-off-by: Zeng Zhaoming <b32542@freescale.com>
* ENGR00139198: iMX61 uBoot add ENET supportZeng Zhaoming2011-06-27-5/+69
| | | | | | | | | | | | | | | | Add ENET and AR8031 PHY support to uboot. To make it works on sabreauto, need do following changes: 1. rework phy to output 125M clock from CLK_25M signal, and the 125M clock input to SoC as reference clock to generate RGMII_TXC clock. 2. Enable TXC delay in PHY debug register. 3. set ENET working in RMII mode. 4. set ENET working at 1000M or 100M/10M. 5. set ENET TX fifo to maximum to avoid underrun error. 6. force AR8031 PHY working at 100M Signed-off-by: Anson Huang <b20788@freescale.com> Signed-off-by: Zeng Zhaoming <b32542@freescale.com>
* ENGR00144424 MX6: enable uboot for ARM2(SABREAUTO) CPU boardAnson Huang2011-06-24-7/+14
| | | | | | | | | | | | | Use 528M DDR script Disable L2 cache because rom enable L2 cache when use plug-in Fix usdhc pad settings Remove mac address hardcode Signed-off-by: Anson Huang <b20788@freescale.com> Signed-off-by: Richard Zhu <r65037@freescale.com> Signed-off-by: Terry Lv <r65388@freescale.com> Signed-off-by: Anish Trivedi <anish@freescale.com> Signed-off-by: Jason Liu <r64343@freescale.com>
* ENGR00143704: U_BOOT: Nand oobsize is wrong in some nand chipsTerry Lv2011-05-20-7/+11
| | | | | | Nand oobsize is wrong in some nand chips. Signed-off-by: Terry Lv <r65388@freescale.com>
* ENGR00142995 MX50: Enable uSDHC instead of eSDHC for SDR modeAnish Trivedi2011-05-10-6/+30
| | | | | | | | | | | | | | | | | | On SD3 on MX50, there is an option to choose eSDHC or uSDHC controller. By default eSDHC is selected. However, eSDHC shows some borderline timing in SDR mode at 50 MHz, whereas uSDHC shows borderline timing in DDR mode at 50 MHz. Therefore, add a compile time option to uboot for MX50 to select uSDHC in SDR mode or eSDHC in DDR mode on SD3 port. By default the compile time option, CONFIG_MX50_ENABLE_USDHC_SDR, is commented out in the include/configs/mx50_<board>.h file to select eSDHC with DDR mode enabled. Uncomment the define to select uSDHC with only SDR mode enabled. Also increased max frequency supported by ESDHC to 52 MHz instead of 50 MHz. Signed-off-by: Anish Trivedi <anish@freescale.com>
* ENGR00142322: mx53-smd: spi nor: can't erase 0x200000 sizeTerry Lv2011-04-20-13/+13
| | | | | | | | | | | | | Spi nor can't erase 0x200000 size. There are two issues in this CR. 1. Spi nor can't erase 0x200000 size. 2. Whole chip erase don't work. The solution will be: 1. Delay more time for WIP check. 2. Use normal erase for whole chip erase. Signed-off-by: Terry Lv <r65388@freescale.com>
* ENGR00141335-1: Use bypass way to set ddr dll in mx53Terry Lv2011-04-11-1/+1
| | | | | | | | Usually dll setup for eMMC4.4 DDR is required to polling SLV_LOCK status bit. However the system hangs when polling for SLV_LOCK bit. The temporary workaround is to force slave override mode to bypass it. Signed-off-by: Terry Lv <r65388@freescale.com>
* ENGR00141556: Fix copyright issueTerry Lv2011-04-08-28/+11
| | | | | | | | | | | We're following the following rules: 1. FSL copyright should be added for freescale added and modified files. 2. FSL copyright should go after existing copyrights. 3. For Duplicate FSL copyright, Our copyright will go after that also. 4. FSL copyright should not include personal names as part. 5. For only FSL copyright, "All rights reserved" is not mattered. Signed-off-by: Terry Lv <r65388@freescale.com>
* ENGR00140873: MMC may wrongly regconize 2GB eMMC as high capacityTerry Lv2011-03-21-2/+4
| | | | | | | | | | | | MMC driver may wrongly regconize some 2GB eMMC as high capacity card. This patch is picked from community. A non-zero value of SEC_COUNT does not indicate that the card is sector addressed. According to the MMC specification, cards with a densitygreater than 2GiB are sector addressed. Signed-off-by: Terry Lv <r65388@freescale.com>
* ENGR00140486 Add SPI NOR Flash M25P32 driverRobby Cai2011-03-18-0/+549
| | | | | | | So far, it's supposed to be on MX50 RD3 and MX53 SMD Signed-off-by: Robby Cai <R63905@freescale.com> (cherry picked from commit 0e3d67cd1a2dc30af80e5119b626d997be254991)
* ENGR00138533: Fix sata write operation random failure issueTerry Lv2011-03-02-1/+3
| | | | | | | Parameter of calling to memalign is wrong. Thus need to modify it. Signed-off-by: Terry Lv <r65388@freescale.com>
* ENGR00138549 Android fastboot: Support eMMC4.4 on imx53_smdrel_imx_2.6.35_11.01.00Sammy He2011-01-28-13/+45
| | | | | | | | Support eMMC4.4 storage on imx53_smd android fastboot, using environment to control it, the command is: > setenv fastboot_dev mmc1 Signed-off-by: Sammy He <r62914@freescale.com>
* ENGR00138422-3 Android fastboot: Pass block offset to cmd_fastbootSammy He2011-01-27-16/+18
| | | | | | Pass mmc/sata block offset from fastboot driver to cmd_fastboot, not byte. Signed-off-by: Sammy He <r62914@freescale.com>
* ENGR00138422-2 Add SATA storage support for android fastbootSammy He2011-01-26-39/+72
| | | | | | Add SATA storage support for android fastboot. Signed-off-by: Sammy He <r62914@freescale.com>
* ENGR00138422-1 Fix usb connection failure if do sata initSammy He2011-01-26-8/+19
| | | | | | | Increase memory alignment to fix usb connection failure issue if do sata init, and support MMU disable case in imx_udc driver. Signed-off-by: Sammy He <r62914@freescale.com>
* ENGR00138359 Change uramdisk from 6M byte offset of android fastbootSammy He2011-01-22-5/+5
| | | | | | | Change uramdisk from 6M byte offset of android fastboot due to kernel image size more than 3M now. Signed-off-by: Sammy He <r62914@freescale.com>
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