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path: root/drivers/video/ipu_regs.h
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* video: ipu_disp: wait for DP SF end irq when disabling sync BG flowsLiu Ying2014-08-11-0/+3
| | | | | | | | | | | | Instead of waiting for DC triple buffer to be cleared, this patch changes to wait for a relevant DP sync flow end interrupt to come when disabling sync BG flows. In this way, we align the implement to the freescale internal IPUv3 driver. After applying this patch, an uboot hang up issue at the arch_preboot_os() stage, where we disable a relevant ipu display channel, is not observed any more on some MX6DL platforms. Signed-off-by: Liu Ying <Ying.Liu@freescale.com>
* video: ipu reg: Correct reserved array size in struct ipu_idmacLiu Ying2014-01-12-1/+1
| | | | | | | | | | | | | The array reserved as a placeholder in the structure ipu_idmac should contain 44 32bit unsigned integer entries instead of 45 ones, because the placeholder is located bewteen the register IDMAC_SC_CORD1 and the register IDMAC_CH_BUSY_1 with the address offsets of 0x804c and 0x8100 respectively. Reported-by: Robin Gong <b38343@freescale.com> Acked-by: Robin Gong <b38343@freescale.com> Cc: Stefano Babic <sbabic@denx.de> Signed-off-by: Liu Ying <Ying.Liu@freescale.com>
* video: ipu reg: Correct reserved1 array size in struct ipu_cmLiu Ying2014-01-12-1/+1
| | | | | | | | | | | | | The array reserved1 as a placeholder in the structure ipu_cm should contain 4 32bit unsigned integer entries instead of 16 ones, because the placeholder is located bewteen the register IPU_CH_DB_MODE_SEL_1 and the register IPU_ALT_CH_DB_MODE_SEL_0 with the address offsets of 0x154 and 0x168 respectively. Reported-by: Robin Gong <b38343@freescale.com> Acked-by: Robin Gong <b38343@freescale.com> Cc: Stefano Babic <sbabic@denx.de> Signed-off-by: Liu Ying <Ying.Liu@freescale.com>
* Add GPL-2.0+ SPDX-License-Identifier to source filesWolfgang Denk2013-07-24-17/+1
| | | | | | Signed-off-by: Wolfgang Denk <wd@denx.de> [trini: Fixup common/cmd_io.c] Signed-off-by: Tom Rini <trini@ti.com>
* mx6: use CONFIG_MX6 instead of CONFIG_MX6QTroy Kisky2012-11-10-1/+1
| | | | | | | | | | Use CONFIG_MX6 when the particular processor variant isn't important. Reserve the use of CONFIG_MX6Q to specifically test for quad cores variant. Signed-off-by: Troy Kisky <troy.kisky@boundarydevices.com>
* mx6: Allow mx6 to access the IPUv3 registersFabio Estevam2012-07-10-1/+11
| | | | | | Adjust the IPUv3 registers, so that the IPUv3 driver can be extended for mx6 as well. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
* mx53: Allow IPUv3 driver to also work on mx53Fabio Estevam2012-05-25-21/+21
| | | | | | | Adjust the IPU base registers so that ipuv3 driver can work on both mx51 and mx53 SoCs. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
* GCC4.6: Squash warnings in ipu_disp.cMarek Vasut2011-10-01-9/+9
| | | | | | | | | | | | ipu_disp.c: In function ‘ipu_disp_set_global_alpha’: ipu_disp.c:1237:11: warning: variable ‘flow’ set but not used [-Wunused-but-set-variable] ipu_disp.c: In function ‘ipu_disp_set_color_key’: ipu_disp.c:1302:16: warning: variable ‘flow’ set but not used [-Wunused-but-set-variable] Signed-off-by: Marek Vasut <marek.vasut@gmail.com> Cc: Stefano Babic <sbabic@denx.de>
* MX51: Add IPU driver for video supportStefano Babic2010-10-22-0/+418
The patch is a porting of the IPU Linux driver developed by Freescale to have framebuffer functionalities in u-boot. The port is based on kernel 2.6.31 commit cc4fe714041805997b601fe8e5dd585d8a99297f, as delivered by Freescale [i.MX BSP]. Most features are dropped from the original driver and only LCD support is the goal of this porting. Signed-off-by: Stefano Babic <sbabic@denx.de>
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