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path: root/drivers/video/ipu_common.c
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* MLK-11952 Video: IPU: Fix dereferencing NULL pointer problemYe.Li2017-04-05-0/+4
| | | | | | | | | | By Coverity check, the clk_set_rate function dereferences the clk pointer without checking whether it is NULL. This may cause problem when clk is NULL. Fix the problem by adding NULL check. Signed-off-by: Ye.Li <B37916@freescale.com> (cherry picked from commit ded2f2958d568411274eeecd265fcc1181638335) (cherry picked from commit b58ac1502391d87470918ff8d172b2b8dc1e7a68)
* MLK-10747-2 video: ipu: Enable/disable LDB_DI clock when necessaryLiu Ying2017-04-05-6/+59
| | | | | | | | | This patch adds enable/disable hooks support for ldb_di[0/1] clocks and enables/disables them when necessary. Signed-off-by: Liu Ying <Ying.Liu@freescale.com> (cherry picked from commit 615d4c51679a6c2ee0ed4c5e3922eec76646eef1) (cherry picked from commit 152192507c3bbaba093783d7da32b88327705c63)
* MLK-10747-1 video: ipu: Build ldb_di clock relevant code only for MX6 and MX53Liu Ying2017-04-05-0/+8
| | | | | | | | | The LDB is found in MX6 variants and MX53, so this patch makes the ldb_di clock relevant code be built only for them. Signed-off-by: Liu Ying <Ying.Liu@freescale.com> (cherry picked from commit 3e40c7466ae7d1d6ca74011bfe69ae059d412a3b) (cherry picked from commit 0c47d4138fd2fe8aa864160e23428b2ef95f16ae)
* MLK-10774-2 HDMI: splash screen function enhancementPeng Fan2017-04-05-1/+1
| | | | | | | | | | | | | | | | -Change HDMI video mode to VGA. -Add pixel clock fraction part setting in IPU driver, fix video mode timing issue. -Add overflow state clear workaround, fix kernel hang in HDMI driver issue. -Correct IPU clock to 264MHz. Signed-off-by: Sandor Yu <R01008@freescale.com> Signed-off-by: Nitin Garg <nitin.garg@freescale.com> Signed-off-by: Peng Fan <Peng.Fan@freescale.com> Signed-off-by: Ye Li <ye.li@nxp.com> (cherry picked from commit 5028519b434d5dfbe53c48ac4b115ff8b69bbac7) (cherry picked from commit 8dcbd43b971616fb67dc3b2af32e2d33f68ed0ce)
* treewide: replace #include <asm/errno.h> with <linux/errno.h>Masahiro Yamada2016-09-23-1/+1
| | | | | | | | | | | Now, arch/${ARCH}/include/asm/errno.h and include/linux/errno.h have the same content. (both just wrap <asm-generic/errno.h>) Replace all include directives for <asm/errno.h> with <linux/errno.h>. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> [trini: Fixup include/clk.] Signed-off-by: Tom Rini <trini@konsulko.com>
* video: ipu_common: fix build errorPeng Fan2016-04-28-1/+3
| | | | | | | | | | | | | | | | | | | | | | Some toolchains fail to build "clk->rate = (u64)(clk->parent->rate * 16) / div;" And the cast usage is wrong. Use the following code to fix the issue, " do_div(parent_rate, div); clk->rate = parent_rate; " Reported-by: Peter Robinson <pbrobinson@gmail.com> Signed-off-by: Peng Fan <van.freenix@gmail.com> Cc: Stefano Babic <sbabic@denx.de> Cc: Fabio Estevam <fabio.estevam@nxp.com> Cc: Tom Rini <trini@konsulko.com> Cc: Anatolij Gustschin <agust@denx.de> Cc: Peter Robinson <pbrobinson@gmail.com> Reviewed-by: Tom Rini <trini@konsulko.com> Tested-by: Peter Robinson <pbrobinson@gmail.com>
* video: ipu: avoid overflow issuePeng Fan2016-03-14-19/+54
| | | | | | | | | | | Multiplication, as "clk->parent->rate * 16" may overflow. So use do_div to avoid such issue. Signed-off-by: Peng Fan <van.freenix@gmail.com> Signed-off-by: Sandor Yu <sandor.yu@nxp.com> Cc: Anatolij Gustschin <agust@denx.de> Cc: Stefano Babic <sbabic@denx.de> Cc: Fabio Estevam <fabio.estevam@nxp.com>
* video, ipu: make ldb clock frequency overwritable through board codeHeiko Schocher2015-04-20-0/+8
| | | | | | | | | | the ldb clock can be setup in board code (for example set through PLL5). Update the ldb_clock rate also through board code. This should be removed, if a clock framework is availiable. Signed-off-by: Heiko Schocher <hs@denx.de> Tested-by: Eric Nelson <eric.nelson@boundarydevices.com>
* video, ipu: make ldb_clock configurableHeiko Schocher2015-04-20-1/+5
| | | | | | | | | | make the ldb_clock configurable through the new define CONFIG_SYS_LDB_CLOCK. This is needed as the ldb clock is not always 650000000, for example on the aristainetos2 board, where the ldb clock derives from PLL5 clock. Signed-off-by: Heiko Schocher <hs@denx.de> Tested-by: Eric Nelson <eric.nelson@boundarydevices.com>
* video: ipu: prevent warnings with W=1Jeroen Hofstee2014-10-25-1/+1
| | | | | | | - make local functions static - remove unused is_interlaced function Signed-off-by: Jeroen Hofstee <jeroen@myspectrum.nl>
* Add GPL-2.0+ SPDX-License-Identifier to source filesWolfgang Denk2013-07-24-17/+1
| | | | | | Signed-off-by: Wolfgang Denk <wd@denx.de> [trini: Fixup common/cmd_io.c] Signed-off-by: Tom Rini <trini@ti.com>
* ipu common: reset ipuv3 correctlyLiu Ying2012-11-06-0/+10
| | | | | | | | | | | | | This patch checks self-clear sw_ipu_rst bit in SCR register of SRC controller to be cleared after setting it to high to reset IPUv3. This makes sure that IPUv3 finishes sofware reset. A timeout mechanism is added to stop polling on the bit status in case the bit could not be cleared by the hardware automatically within 10 millisecond. Signed-off-by: Liu Ying <Ying.Liu@freescale.com>
* mx5: Use explicit clock gate namesBenoît Thébaudeau2012-10-15-1/+1
| | | | | | | | Use clock gate definitions having names showing clearly the gated clock instead of names giving only a register field index. Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com> Cc: Stefano Babic <sbabic@denx.de>
* i.MX6: provide functional names for CCM_CCGR0-CCGR6 bit fieldsEric Nelson2012-10-15-2/+8
| | | | | | | | | | | | | Add meaningful constants for each clock channels and use them for enabling and disabling i.MX6 clocks. Includes an update to enable/disable the IPU1 clock in drivers/video/ipu_common to remove IMX5x register access when used on i.MX6 as discussed in V1: http://patchwork.ozlabs.org/patch/185129/ Signed-off-by: Eric Nelson <eric.nelson@boundarydevices.com>
* ipu_common: Add ldb_clk for use in parenting the pixel clockEric Nelson2012-07-10-2/+10
| | | | | | | Add ldb_clk for use in parenting the pixel clock. Signed-off-by: Eric Nelson <eric.nelson@boundarydevices.com> Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
* ipu_common: Do not hardcode the ipu_clk frequencyFabio Estevam2012-07-10-1/+1
| | | | | | Do not hardcode the ipu_clk frequency and let the board file pass this value. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
* ipu_common: Rename MXC_CCM_BASEFabio Estevam2012-07-10-1/+1
| | | | | | Rename MXC_CCM_BASE to CCM_BASE_ADDR as this is already defined for MX6. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
* ipu_common: Let clk_ipu_enable/disable only run on MX51 and MX53Fabio Estevam2012-07-10-1/+4
| | | | | | | The registers accessed inside clk_ipu_enable/disable are not present on MX6, so make sure they only run on MX51 and MX53. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
* ipu_common: Only apply the erratum to MX51Fabio Estevam2012-07-10-0/+2
| | | | | | | | | | | | The following erratum : "ENGcm08316 IPU: Clarification regarding the bypass mode registers setup for display and camera interfaces" only applies to mx51, so restrict its usage for this SoC only. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
* MX51: Add IPU driver for video supportStefano Babic2010-10-22-0/+1183
The patch is a porting of the IPU Linux driver developed by Freescale to have framebuffer functionalities in u-boot. The port is based on kernel 2.6.31 commit cc4fe714041805997b601fe8e5dd585d8a99297f, as delivered by Freescale [i.MX BSP]. Most features are dropped from the original driver and only LCD support is the goal of this porting. Signed-off-by: Stefano Babic <sbabic@denx.de>
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