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* dm: ehci-mx6: support driver modelPeng Fan2016-08-07-14/+130
| | | | | | | | | | | | | | | | Support driver model for ehci mx6 driver. Consolidate code to be shared between DM and non-DM, such as introducing ehci_mx6_common_init. For simplicity, some old fasion code are keeped for DM usage, such as board_ehci_power and board_usb_phy_mode. And 'dr-mode', usbphy and vbus handling code for DM is not added now. These will be added in future patches. Signed-off-by: Peng Fan <peng.fan@nxp.com> Cc: Marek Vasut <marex@denx.de> Cc: Mateusz Kulikowski <mateusz.kulikowski@gmail.com> Cc: Stefan Agner <stefan@agner.ch> Cc: Simon Glass <sjg@chromium.org>
* Merge branch 'master' of git://www.denx.de/git/u-boot-imxTom Rini2016-07-28-5/+25
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| * usb: ehci-mx6: introduce config for high active power pinStefan Agner2016-07-19-0/+13
| | | | | | | | | | | | | | | | | | Add a new config CONFIG_MXC_USB_OTG_HACTIVE which configures the OTG Power Pin to be high active. Low active is the reset value of the affected configuration register, hence the config option is named by the non-reset configuration. Signed-off-by: Stefan Agner <stefan.agner@toradex.com>
| * usb: ehci-mx6: configure power polarity in usb_power_configStefan Agner2016-07-19-5/+5
| | | | | | | | | | | | | | | | USBNC_n_CTRL1 bit 9 actually controls the power pin polarity. Rename UCTRL_PM to align reference manual and set the bit in the appropriate callback usb_power_config. Signed-off-by: Stefan Agner <stefan.agner@toradex.com>
| * usb: move CONFIG_USB_EHCI_MX7 to KconfigStefan Agner2016-07-19-0/+7
| | | | | | | | | | | | | | Create an entry for "config USB_EHCI_MX7" in Kconfig and switch over to it for all boards. Signed-off-by: Stefan Agner <stefan.agner@toradex.com>
* | dm: zynq: usb: Convert to CONFIG_DM_USBSimon Glass2016-07-27-52/+51
| | | | | | | | | | | | Convert zynq USB to driver model. Note this is tested on zynq-zybo only. Signed-off-by: Simon Glass <sjg@chromium.org>
* | dm: Use dm_scan_fdt_dev() directly where possibleSimon Glass2016-07-27-13/+2
| | | | | | | | | | | | | | Quite a few places have a bind() method which just calls dm_scan_fdt_dev(). We may as well call dm_scan_fdt_dev() directly. Update the code to do this. Signed-off-by: Simon Glass <sjg@chromium.org>
* | dm: Convert users from dm_scan_fdt_node() to dm_scan_fdt_dev()Simon Glass2016-07-27-5/+2
| | | | | | | | | | | | | | This new function is more convenient for callers, and handles pre-relocation situations automatically. Signed-off-by: Simon Glass <sjg@chromium.org>
* | usb: dwc2 : invalidate dcache before starting DMAXu Ziyuan2016-07-25-0/+3
| | | | | | | | | | | | | | | | | | | | | | | | Invalidate dcache before starting the DMA to ensure coherency. In case there are any dirty lines from the DMA buffer in the cache, subsequent cache-line replacements may corrupt the buffer in memory while the DMA is still going on. Cache-line replacement can happen if the CPU tries to bring some other memory locations into the cache while the DMA is going on. Signed-off-by: Ziyuan Xu <xzy.xu@rock-chips.com> Acked-by: Simon Glass <sjg@chromium.org>
* | usb: dwc2-otg: adjust fifo size via platform dataXu Ziyuan2016-07-25-9/+19
| | | | | | | | | | | | | | | | The total FIFO size of some SoCs may be different from the existen, this patch supports fifo size setting from platform data. Signed-off-by: Ziyuan Xu <xzy.xu@rock-chips.com> Acked-by: Simon Glass <sjg@chromium.org>
* | usb: rockchip-phy: implement USB2.0 phy controlXu Ziyuan2016-07-25-0/+108
| | | | | | | | | | | | | | | | | | So far, Rockchip SoCs have two kinds of USB2.0 phy, such as Synopsys and Innosilicon. This patch applys dwc2 usb driver framework to implement phy_init() and phy_off() methods for Synopsys phy on Rockchip platform. Signed-off-by: Ziyuan Xu <xzy.xu@rock-chips.com> Acked-by: Simon Glass <sjg@chromium.org>
* | usb: Kconfig: Add Kconfigs entry USB_EHCI_ZYNQSiva Durga Prasad Paladugu2016-07-22-0/+7
| | | | | | | | | | | | | | | | | | Add Kconfig entry config option for USB_EHCI_ZYNQ and update the same to enable for all zynq boards which supports USB Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
* | Various, unrelated tree-wide typo fixes.Robert P. J. Day2016-07-16-1/+1
|/ | | | | | | | | | | | | | | | | | | Fix a number of typos, including: * "compatble" -> "compatible" * "eanbeld" -> "enabled" * "envrionment" -> "environment" * "FTD" -> "FDT" (for "flattened device tree") * "ommitted" -> "omitted" * "overriden" -> "overridden" * "partiton" -> "partition" * "propogate" -> "propagate" * "resourse" -> "resource" * "rest in piece" -> "rest in peace" * "suport" -> "support" * "varible" -> "variable" Signed-off-by: Robert P. J. Day <rpjday@crashcourse.ca>
* Merge branch 'master' of git://git.denx.de/u-boot-usbTom Rini2016-07-01-4/+9
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| * ehci: mx7: fix otg id detectionPeng Fan2016-06-25-2/+5
| | | | | | | | | | | | | | | | | | | | The USBNC_PHYCFG2_ACAENB bit should be cleared to enable the OTG ID detection, not set it. When the bit is set, the ACA Resistance Detection is enabled, which disables the OTG ID detection, because the internal pull up is off. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
| * ehci: mx7: fix usbnc_regsPeng Fan2016-06-25-1/+2
| | | | | | | | | | | | | | | | There is a 4 bytes hole between phy_cfg2 and phy_status, fix the usbnc_regs structure to include the hole. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
| * usb: fsl: Fix NULL terminating issue for usb controller name stringRajesh Bhagat2016-06-25-1/+2
| | | | | | | | | | | | | | Fixes NULL terminating issue for usb controller name string by using sizeof operator. Signed-off-by: Rajesh Bhagat <rajesh.bhagat@nxp.com>
* | Merge git://git.denx.de/u-boot-fsl-qoriqTom Rini2016-06-28-2/+2
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| * | armv8: fsl-layerscape: Append "A" in SoC name for ARM based SoCsPrabhakar Kushwaha2016-06-28-2/+2
| |/ | | | | | | | | | | | | | | | | | | | | Freescale ARMv8 SoC name ends with "A" to represent ARM SoCs. like LS2080A, LS1043A, LS1012A. So append "A" to SoC names. Signed-off-by: Pratiyush Mohan Srivastava <pratiyush.srivastava@nxp.com> Signed-off-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
* | fastboot: sparse: resync common/image-sparse.c (part 2)Steve Rae2016-06-27-12/+19
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | - update fastboot_okay() and fastboot_fail() This file originally came from upstream code. While retaining the storage abstraction feature, this is the second set of the changes required to resync with the cmd_flash_mmc_sparse_img() in the file aboot.c from https://us.codeaurora.org/cgit/quic/la/kernel/lk/plain/app/aboot/aboot.c?h=LE.BR.1.2.1 Signed-off-by: Steve Rae <srae@broadcom.com>
* | fastboot: sparse: remove session-id logicSteve Rae2016-06-27-14/+2
|/ | | | | | | This "session-id" alogrithm is not required, and currently corrupts the stored image whenever more the one "session" is required. Signed-off-by: Steve Rae <srae@broadcom.com>
* clk: convert API to match reset/mailbox styleStephen Warren2016-06-19-7/+7
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The following changes are made to the clock API: * The concept of "clocks" and "peripheral clocks" are unified; each clock provider now implements a single set of clocks. This provides a simpler conceptual interface to clients, and better aligns with device tree clock bindings. * Clocks are now identified with a single "struct clk", rather than requiring clients to store the clock provider device and clock identity values separately. For simple clock consumers, this isolates clients from internal details of the clock API. * clk.h is split so it only contains the client/consumer API, whereas clk-uclass.h contains the provider API. This aligns with the recently added reset and mailbox APIs. * clk_ops .of_xlate(), .request(), and .free() are added so providers can customize these operations if needed. This also aligns with the recently added reset and mailbox APIs. * clk_disable() is added. * All users of the current clock APIs are updated. * Sandbox clock tests are updated to exercise clock lookup via DT, and clock enable/disable. * rkclk_get_clk() is removed and replaced with standard APIs. Buildman shows no clock-related errors for any board for which buildman can download a toolchain. test/py passes for sandbox (which invokes the dm clk test amongst others). Signed-off-by: Stephen Warren <swarren@nvidia.com> Acked-by: Simon Glass <sjg@chromium.org>
* Merge branch 'master' of git://git.denx.de/u-boot-usbTom Rini2016-06-18-39/+299
|\ | | | | | | | | | | | | Signed-off-by: Tom Rini <trini@konsulko.com> Conflicts: arch/arm/include/asm/arch-fsl-layerscape/immap_lsch3.h
| * usb: ehci: only shutdown opened controllerPeng Fan2016-06-18-0/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | If the usb controller is not running, no need to shutdown it, otherwise `usb stop` complains about: "EHCI failed to shut down host controller". To i.MX7D SDB, there are two usb ports, one Host, one OTG. If we only plug one udisk to the Host port and then `usb start`, the OTG controller for OTG port does not run actually. Then, if `usb stop`, the OTG controller for OTG port will also be shutdown, but it is not running. This patch adds a check to only shutdown the running controller. Signed-off-by: Peng Fan <peng.fan@nxp.com> Cc: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Cc: Mateusz Kulikowski <mateusz.kulikowski@gmail.com> Cc: Hans de Goede <hdegoede@redhat.com> Cc: "Stefan Brüns" <stefan.bruens@rwth-aachen.de> Cc: Stephen Warren <swarren@nvidia.com>
| * usb: xhci: fsl: Add workaround for USB erratum A008751Sriram Dash2016-06-13-0/+46
| | | | | | | | | | | | | | | | | | This patch is doing the following: 1. Implementing the errata for LS2080. 2. Adding fixup for fdt for LS2080. Signed-off-by: Sriram Dash <sriram.dash@nxp.com> Signed-off-by: Rajesh Bhagat <rajesh.bhagat@nxp.com>
| * fsl: usb: make errata function common for PPC and ARMSriram Dash2016-06-13-2/+181
| | | | | | | | | | | | | | | | | | This patch does the following things: 1. Makes the errata checking code common for PPC and ARM 2. Moves all these static inline functions into a dedicated C file Signed-off-by: Sriram Dash <sriram.dash@nxp.com> Signed-off-by: Rajesh Bhagat <rajesh.bhagat@nxp.com>
| * usb: xhci: fsl: code cleanup for device tree fixup for fsl usb controllersSriram Dash2016-06-13-38/+56
| | | | | | | | | | | | | | | | Performs code cleanup for device tree fixup for fsl usb controllers by making functions to handle these similar errata checking code. Signed-off-by: Rajesh Bhagat <rajesh.bhagat@nxp.com> Signed-off-by: Sriram Dash <sriram.dash@nxp.com>
| * usb: dwc2_udc_otg: support 8-bit interfaceSteve Rae2016-06-13-0/+14
| | | | | | | | | | | | | | Define CONFIG_USB_GADGET_DWC2_OTG_PHY_BUS_WIDTH_8 to allow the physical interface to be 8-bit (rather than 16-bit). Signed-off-by: Steve Rae <srae@broadcom.com>
* | sunxi: musb: Properly turn of musb controller before bootingHans de Goede2016-06-10-0/+7
|/ | | | | | | | Turn of the clock and assert the reset when musb_stop gets called, so that the os gets the musb controller in a pristine state. This fixes a spurious VBus error interrupt triggering as soon as the Linux musb driver loads. Signed-off-by: Hans de Goede <hdegoede@redhat.com>
* usb: move CONFIG_USB_XHCI_DWC3 to KconfigMasahiro Yamada2016-06-04-0/+6
| | | | | | | Create an entry for "config USB_XHCI_DWC3" in Kconfig and switch over to it for all boards. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
* usb: move CONFIG_USB_XHCI to Kconfig with renamingMasahiro Yamada2016-06-04-7/+1
| | | | | | | | | | | | | | | | | Move CONFIG_USB_XHCI to defconfig files for all boards, renaming it into CONFIG_USB_XHCI_HCD. As commented in the help of "config USB_XHCI" entry, this has been a TODO for a long time; now CONFIG_USB_XHCI_HCD and CONFIG_USB_XHCI have been unified in favor of the former. Note: Some boards define CONFIG_USB_XHCI in their headers without CONFIG_USB, which does not meet the "depends on" in Kconfig. I added CONFIG_USB=y for those boards when converting. Otherwise, they would fail to build. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
* usb: phy: omap_usb_phy: Fix USB3_PHY DPLL configurationRoger Quadros2016-06-02-15/+41
| | | | | | | | | | The index returned by get_sys_clk_index() is not exactly what we expect. Let's not rely on that and use get_sys_clk_freq() instead. This fixes missing USB3 devices in the Linux kernel when USB is started in u-boot. It still doesn't fix missing USB3 devices in u-boot though. Signed-off-by: Roger Quadros <rogerq@ti.com>
* usb: dwc3: Makefile: Don't build gadget code if USB_GADGET is disabledRoger Quadros2016-05-27-1/+1
| | | | | | | It is pointless to build gadget driver if USB_GADGET is disabled. Signed-off-by: Roger Quadros <rogerq@ti.com> Acked-by: Marek Vasut <marex@denx.de>
* drivers: usb: common: add common code for usb drivers to useMugunthan V N2016-05-17-0/+41
| | | | | | | Add common usb code which usb drivers makes use of it. Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com> Reviewed-by: Simon Glass <sjg@chromium.org>
* usb: gadget: dfu: discard dead codePeng Fan2016-05-06-9/+1
| | | | | | | | | | | | | | Reported by Coverity: Logically dead code (DEADCODE) dead_error_line: Execution cannot reach this statement: (f_dfu->strings + --i).s = .... If calloc failed, i is still 0 and no need to call free, so discard the dead code. Signed-off-by: Peng Fan <van.freenix@gmail.com> Cc: "Łukasz Majewski" <l.majewski@samsung.com> Cc: Marek Vasut <marex@denx.de>
* usb: dwc2: Add delay to fix the USB detection problem on SoCFPGAStefan Roese2016-05-06-0/+9
| | | | | | | | | | | | | | | | | | With patch c998da0d (usb: Change power-on / scanning timeout handling), the USB scanning is started earlier and with a smaller timeout. This resulted on SoCFPGA (using the DWC2 driver) in some USB sticks not getting detected any more. This patch now adds a 1 second delay (in the host mode only) to the DWC2 driver before the scanning is started. With this delay, now all problematic USB keys are detected successfully again. And there is no need any more to change the delay / timeout in the common USB code (usb_hub.c). Signed-off-by: Stefan Roese <sr@denx.de> Cc: Chin Liang See <clsee@altera.com> Cc: Dinh Nguyen <dinguyen@opensource.altera.com> Cc: Hans de Goede <hdegoede@redhat.com> Cc: Stephen Warren <swarren@nvidia.com> Cc: Marek Vasut <marex@denx.de>
* usb: ehci-mx6: allow board_ehci_hcd_init to failStefan Agner2016-05-06-2/+5
| | | | | | | | | | | There could be runtime determined board specific reason why a EHCI initialization fails (e.g. ENODEV if a Port is not available). In this case, properly return the error code. While at it, that function (board_ehci_hcd_init) has actually two documentation blocks... Use the correct function name for the documentation block of board_usb_phy_mode. Signed-off-by: Stefan Agner <stefan@agner.ch>
* usb: dwc2: Init desc_before_addrMarek Vasut2016-05-03-0/+3
| | | | | | | | | | | Initialize desc_before_addr, otherwise the USB core won't send the first 64B Get Device Descriptor request in common/usb.c function usb_setup_descriptor() . There are some USB devices which expect this sequence and otherwise can misbehave. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Dinh Nguyen <dinguyen@opensource.altera.com> Cc: Tom Rini <trini@konsulko.com>
* usb: dwc2: Make OC protection configurableMarek Vasut2016-05-03-3/+14
| | | | | | | | | | Introduce a new flag in the controller private data, which allows selectively disabling the OC protection. Use the standard 'disable-over-current' OF prop to set this flag. This OC protection must be disabled on EBV SoCrates rev 1. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Stefan Roese <sr@denx.de> Cc: Dinh Nguyen <dinguyen@kernel.org>
* usb: dwc2: Pull Ext VBUS macro from dwc_otg_core_init()Marek Vasut2016-05-03-7/+14
| | | | | | | | | | | Introduce a boolean flag in the dwc2 controller private data and set it according to the macro (for now) instead of having this macro directly in the dwc_otg_core_init(). This will let us configure the flag from DT or such later on, if needed. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Stefan Roese <sr@denx.de> Cc: Dinh Nguyen <dinguyen@kernel.org>
* usb: dwc2: Pass private data into dwc_otg_core_init()Marek Vasut2016-05-03-2/+3
| | | | | | | | | | Pass the whole bulk of private data instead of just the regs, since the private data will soon contain important configuration flags. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Stefan Roese <sr@denx.de> Cc: Dinh Nguyen <dinguyen@kernel.org>
* Fix spelling of "occurred".Vagrant Cascadian2016-05-02-4/+4
| | | | | Signed-off-by: Vagrant Cascadian <vagrant@debian.org> Reviewed-by: Simon Glass <sjg@chromium.org>
* usb: s3c-otg: Fix remaining bytes in debug messagesRoger Quadros2016-04-25-2/+2
| | | | | | | | | | Remaining bytes means bytes that are not yet transferred and not the bytes that were transferred in the last transfer. Reported-by: Lukasz Majewski <l.majewski@samsung.com> Signed-off-by: Roger Quadros <rogerq@ti.com> Tested-by: Steve Rae <srae@broadcom.com> [Test HW: bcm28155_ap board]
* usb: s3c-otg: Fix short packet for request size > ep.maxpacketRoger Quadros2016-04-25-1/+1
| | | | | | | | | | | | | | Request size can be greater than ep.packet and still end in a short packet. We need to tackle this case as end of transfer (if short_not_ok is not set) as indicated in USB 2.0 Specification [1], else we get stuck up on certain protocols like fastboot. [1] - USB2.0 Specification, Section 5.3.2 Pipes Reported-by: Steve Rae <steve.rae@broadcom.com> Signed-off-by: Roger Quadros <rogerq@ti.com> Tested-by: Steve Rae <steve.rae@broadcom.com> Tested-by: Lukasz Majewski <l.majewski@samsung.com>
* fastboot: Clean up bulk-out logicRoger Quadros2016-04-25-27/+23
| | | | | | | | Just use ep->maxpacket to get the maxpacket size and simplify the bulk-out maxpacket alignment. Signed-off-by: Roger Quadros <rogerq@ti.com> Tested-by: Steve Rae <srae@broadcom.com>
* fastboot: Enable the respective speed endpoints at runtimeRoger Quadros2016-04-25-7/+17
| | | | | | | | | | In a dual speed configuration we need to check at runtime if we want to enable the Full-Speed or High-Speed endpoint. Signed-off-by: Roger Quadros <rogerq@ti.com> Acked-by: Lukasz Majewski <l.majewski@samsung.com> Tested-by: Steve Rae <srae@broadcom.com> [Test HW: bcm235xx board]
* fastboot: Fix wMaxPacketSize for High-Speed IN endpointRoger Quadros2016-04-25-9/+27
| | | | | | | | | | | | | | wMaxPacketSize for IN endpoing in High-Speed must be 512 and not 64. While fixing that we do some clean ups like - use cpu_to_le16(decimal_length) instead of hexadecimal length. - No need to initialize bInterval to 0. Static variables are 0 initialized. - Move descriptor setting from fastboot_add to to fastboot_bind. - check for dual speed configuration before setting the high speed descriptors. Signed-off-by: Roger Quadros <rogerq@ti.com> Tested-by: Steve Rae <srae@broadcom.com> Tested-by: Steve Rae <srae@broadcom.com> [Test HW: bcm235xx board]
* usb: gadget Move: CONFIG_G_DNL_* to KconfigSam Protsenko2016-04-20-1/+14
| | | | | | And also reformat defconfigs using "make savedefconfig" rule. Signed-off-by: Sam Protsenko <semen.protsenko@linaro.org>
* usb: dwc3: Move CONFIG_USB_DWC3_PHY_* to KconfigSam Protsenko2016-04-20-0/+17
| | | | Signed-off-by: Sam Protsenko <semen.protsenko@linaro.org>
* usb: dwc3: Move CONFIG_USB_DWC3_OMAP to KconfigSam Protsenko2016-04-20-0/+10
| | | | Signed-off-by: Sam Protsenko <semen.protsenko@linaro.org>
generated by cgit v1.1 at 2024-12-30 14:10:57 +0000