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| * usb: gadget: allow ci_udc to build with new gadget frameworkStephen Warren2014-05-01-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Allow ci_udc.o to be built when using the new(?) USB gadget framework, as enabled by CONFIG_USB_GADGET. Note that this duplicates the Makefile entry for ci_udc.o, since it's also included inside #ifdef CONFIG_USB_ETHER. I'm not sure what that define means; perhaps an old style of Ethernet-specific USB gadget implementation? I wonder if the line that this patch adds shouldn't be outside all of the ifdefs, so it stands on its own, similar to how e.g. epautoconf.o is shared between the two? Signed-off-by: Stephen Warren <swarren@nvidia.com>
| * usb: ums: use only 1 buffer for CI_UDCStephen Warren2014-04-30-0/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | ci_udc.c allocates only a single buffer for each endpoint, which ci_ep_alloc_request() returns as a hard-coded value rather than dynamically allocating. Consequently, storage_common.c must limit itself to using a single buffer at a time. Add a special case to the definition of FSG_NUM_BUFFERS for this. Another option would be to fix ci_ep_alloc_request() to dynamically allocate the buffers like some/all(?) other device mode drivers do. However, I don't think that ci_ep_queue() supports queueing up multiple buffers either yet, and I'm not familiar enough with the controller yet to implement that. As such, any attempt to use multiple buffers simply results in data corruption and other errors. Signed-off-by: Stephen Warren <swarren@nvidia.com>
| * usb: ci_udc: support variants with hostpc registerStephen Warren2014-04-30-18/+62
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Tegra's USB controller appears to be a variant of the ChipIdea controller; perhaps derived from it, or simply a different version of the IP core to what U-Boot supports today. In this variant, at least the following difference are present: - Some registers are moved about. - Setup transaction completion is reported in a separate 'epsetupstat' register, rather than in 'epstat' (which still exists, perhaps for other transaction types). - USB connection speed is reported in a separate 'hostpc1_devlc' register, rather than 'portsc'. - The registers used by ci_udc.c begin at offset 0x130 from the USB register base, rather than offset 0x140. However, this is handled by the associated EHCI controller driver, since the register address is stored in controller.ctrl->hcor. Introduce define CONFIG_CI_UDC_HAS_HOSTPC to indicate which variant of the controller should be supported. The "HAS_HOSTPC" part of this name mirrors the similar "has_hostpc" field used by the Linux EHCI controller core to represent the presence/absence of the hostpc1_devlc register. Signed-off-by: Stephen Warren <swarren@nvidia.com>
| * usb: ci_udc: make PHY initialization conditionalStephen Warren2014-04-30-2/+7
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | usb_gadget_register_driver() currently unconditionally programs PORTSC to select a ULPI PHY. This is incorrect on at least the Tegra boards I am testing with, which use a UTMI PHY for the OTG ports. Make the PHY selection code conditional upon the specific EHCI controller that is in use. Ideally, I believe that the PHY initialization code should be part of ehci_hcd_init() in the relevant EHCI controller driver, or some board- specific function that ehci_hcd_init() calls. For MX6, I'm not sure this PHY initialization code is correct even before this patch, since ehci-mx6's ehci_hcd_init() already configures PORTSC to a board-specific value, and it seems likely that the code in ci_udc.c is incorrectly undoing this. Perhaps this is not an issue if the PHY selection register bits aren't implemented on this instance of the MX6 USB controller? ehci-mxs.c doens't appear to touch PORTSC, so this code is likely still required there. Signed-off-by: Stephen Warren <swarren@nvidia.com>
| * usb: ci_udc: set ep->req.actual after transferStephen Warren2014-04-30-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | At least drivers/usb/gadget/storage_common.c expects that ep->req.actual contain the number of bytes actually transferred. (At least in practice, I observed it failing to work correctly unless this was the case). However, ci_udc.c modifies ep->req.length instead. I assume that .length is supposed to represent the allocated buffer size, whereas .actual is supposed to represent the actual number of bytes transferred. In the OUT transaction case, this may happen simply because the host sends a smaller packet than the max possible size, which is quite legal. In the IN case, transferring fewer bytes than requested could presumably happen as an error. Modify handle_ep_complete() to write to .actual rather than modifying .length. Signed-off-by: Stephen Warren <swarren@nvidia.com>
| * usb: ci_udc: Support larger packetsStephen Warren2014-04-30-0/+3
| | | | | | | | | | | | | | | | | | | | | | | | ci_ep_queue() currently only fills in the page0/page1 fields in the queue item. If the buffer is larger than 4KiB (unaligned) or 8KiB (page-aligned), then this prevents the HW from knowing where to write the balance of the data. Fix this by initializing all 5 pageN pointers, which allows up to 16KiB (potentially non-page-aligned) buffers. Signed-off-by: Stephen Warren <swarren@nvidia.com>
| * exynos: usb: Fix data abort on boards w/o vbus-gpio node in the DTandrey.konovalov@linaro.org2014-04-30-2/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Commit 4a271cb1b4ff doesn't take into account that fdtdec_setup_gpio() returns success when the gpio passed to it is FDT_GPIO_NONE (no gpio node found in the fdtdec_decode_gpio() call). This results in calling gpio_direction_output() on invalid gpio. For this reason executing "usb start" command on Arndale causes data abort in the ehci-exynos driver. Add the fdt_gpio_isvalid() check to fix that problem. Signed-off-by: Andrey Konovalov <andrey.konovalov@linaro.org> Cc: Julius Werner <jwerner@chromium.org> Cc: Simon Glass <sjg@chromium.org> Cc: Minkyu Kang <mk7.kang@samsung.com> Cc: Marek Vasut <marex@denx.de>
| * usb: musb: fill in usb_gadget_unregister_driverRob Herring2014-04-30-1/+4
| | | | | | | | | | | | | | | | Add missing missing disconnect and unbind calls to the musb gadget driver's usb_gadget_unregister_driver function. Otherwise, any gadget drivers fail to uninitialize and run a 2nd time. Signed-off-by: Rob Herring <robh@kernel.org>
| * usb: handle NULL table in usb_gadget_get_stringRob Herring2014-04-30-0/+3
| | | | | | | | | | | | | | | | | | | | Allow a NULL table to be passed to usb_gadget_get_string for cases when a string table may not be populated. Signed-off-by: Rob Herring <robh@kernel.org> Reviewed-by: Tom Rini <trini@ti.com> Acked-by: Marek Vasut <marex@denx.de> Acked-by: Lukasz Majewski <l.majewski@samsung.com>
| * usb:gadget:f_thor: fix write to filesystem by add dfu_flush()Przemyslaw Marczak2014-04-30-0/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Since dfu read/write operations needs to be flushed manually, writing to filesystem on MMC by thor was broken. MMC raw write actually is working fine because current dfu_flush() function writes filesystem only. This commit adds dfu_flush() to f_thor and now filesystem write is working. This change was tested on Trats2 board. Signed-off-by: Przemyslaw Marczak <p.marczak@samsung.com> Cc: Lukasz Majewski <l.majewski@samsung.com> Cc: Marek Vasut <marex@denx.de> Cc: Heiko Schocher <hs@denx.de> Cc: Tom Rini <trini@ti.com>
| * usb:gadget:f_thor: code cleanup in function download_tail()Przemyslaw Marczak2014-04-30-4/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | In thor's download_tail() function, dfu_get_entity() is called before each dfu_write() call and the returned entity pointers are the same. So dfu_get_entity() can be called just once and this patch changes this. Signed-off-by: Przemyslaw Marczak <p.marczak@samsung.com> Cc: Lukasz Majewski <l.majewski@samsung.com> Cc: Marek Vasut <marex@denx.de> Cc: Heiko Schocher <hs@denx.de> Cc: Tom Rini <trini@ti.com>
| * usb: Add endian support macros to interrupt transfers in the EHCI driver.Adrian Cox2014-04-30-25/+31
| | | | | | | | | | | | Update the EHCI driver to support interrupt transfers on PowerPC. Signed-off-by: Adrian Cox <adrian@humboldt.co.uk>
| * usb: ehci: rmobile: Add support ehci host driver of rmobile SoCsNobuhiro Iwamatsu2014-04-30-0/+131
| | | | | | | | | | | | | | | | The rmobile SoC has usb host controller. This supports USB controllers listed in the R8A7790, R8A7791 and R8A7740. Signed-off-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com> Reviewed-by: Marek Vasut <marex@denx.de>
| * fsl/usb: Increase TXFIFOTHRESH value for usb write in T4 Rev 2.0Nikhil Badola2014-04-22-0/+20
| | | | | | | | | | | | | | | | | | | | | | Increase TXFIFOTHRES field value in TXFILLTUNING register of usb for T4 Rev 2.0. This decreases data burst rate with which data packets are posted from the TX latency FIFO to compensate for latencies in DDR pipeline during DMA. This avoids Tx buffer underruns and leads to successful usb writes Signed-off-by: Ramneek Mehresh <ramneek.mehresh@freescale.com> Signed-off-by: Nikhil Badola <nikhil.badola@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
| * fsl/usb: Workaround for USB erratum-A007075Nikhil Badola2014-04-22-0/+10
| | | | | | | | | | | | | | | | | | | | | | | | Put a delay of 5 millisecond after reset so that ULPI phy gets enough time to come out of reset. Erratum A007075 applies to following SOCs and their variants, if any P1010 rev 1.0 B4860 rev 1.0, 2.0 P4080 rev 2.0, 3.0 Signed-off-by: Nikhil Badola <nikhil.badola@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
| * fsl/usb: Fix phy type for Second USB controllerNikhil Badola2014-04-22-2/+6
| | | | | | | | | | | | | | | | | | Set correct phy_type value for second USB controller. This is required for supporting SOCs having 2 USB controllers working simultaneously, one with UTMI phy and other with ULPI phy Signed-off-by: Nikhil Badola <B46172@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
* | usb: tegra: combine header fileStefan Agner2014-04-17-1/+0
| | | | | | | | | | | | | | | | | | | | | | Combine the Tegra USB header file into one header file for all SoCs. Use ifdef to account for the difference, especially Tegra20 is quite different from newer SoCs. This avoids duplication, mainly for Tegra30 and newer devices. Reviewed-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Stefan Agner <stefan@agner.ch> Signed-off-by: Tom Warren <twarren@nvidia.com>
* | usb: tegra: fix PHY configurationStefan Agner2014-04-17-3/+21
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | On Tegra30 and later, the PTS (parallel transceiver select) and STS (serial transceiver select) are part of the HOSTPC1_DEVLC_0 register rather than PORTSC1_0 register. Since the reset configuration usually matches the intended configuration, this error did not show up on Tegra30 devices. Also use the slightly different bit fields of first USB, (USBD) on Tegra20 and move those definitions to the Tegra20 specific header file. Reviewed-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Stefan Agner <stefan@agner.ch> Signed-off-by: Tom Warren <twarren@nvidia.com>
* | usb: tegra: fix USB2 powerdown for Tegra30 and laterStefan Agner2014-04-17-0/+3
|/ | | | | | | | | | | | Clear the forced powerdown bit in the UTMIP_PLL_CFG2_0 register which brings USB2 in UTMI mode to work. This was clearly missing since the forced powerdown bit is set in reset by default for all USB ports. Acked-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Stefan Agner <stefan@agner.ch> Tested-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com>
* usb: dfu: introduce dfuMANIFEST stateHeiko Schocher2014-03-23-6/+42
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | on nand flash using ubi, after the download of the new image into the flash, the "rest" of the nand sectors get erased while flushing the medium. With current u-boot version dfu-util may show: Starting download: [##################################################] finished! state(7) = dfuMANIFEST, status(0) = No error condition is present unable to read DFU status as get_status is not answered while erasing sectors, if erasing needs some time. So do the following changes to prevent this: - introduce dfuManifest state According to dfu specification ( http://www.usb.org/developers/devclass_docs/usbdfu10.pdf ) section 7: "the device enters the dfuMANIFEST-SYNC state and awaits the solicitation of the status report by the host. Upon receipt of the anticipated DFU_GETSTATUS, the device enters the dfuMANIFEST state, where it completes its reprogramming operations." - when stepping into dfuManifest state, sending a PollTimeout DFU_MANIFEST_POLL_TIMEOUT in ms, to the host, so the host (dfu-util) waits the PollTimeout before sending a get_status again. Signed-off-by: Heiko Schocher <hs@denx.de> Cc: Lukasz Majewski <l.majewski@samsung.com> Cc: Kyungmin Park <kyungmin.park@samsung.com> Cc: Marek Vasut <marex@denx.de> Cc: Pantelis Antoniou <panto@antoniou-consulting.com>
* usb: net: introduce support for Moschip USB ethernetGerhard Sittig2014-03-12-0/+820
| | | | | | | | | | | | | | | introduce an 'mcs7830' driver for Moschip MCS7830 based (7730/7830/7832) USB 2.0 Ethernet Devices see "MCS7830 -- USB 2.0 to 10/100M Fast Ethernet Controller" at http://www.asix.com.tw/products.php?op=pItemdetail&PItemID=109;74;109 the driver was implemented based on the U-Boot Asix driver with additional information gathered from the Moschip Linux driver, development was done on "Delock 61147" and "Logilink UA0025C" dongles Signed-off-by: Gerhard Sittig <gsi@denx.de> Acked-by: Marek Vasut <marex@denx.de>
* usb: create common header virtual root hub descriptorsStephen Warren2014-03-10-485/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Many USB host controller drivers contain almost identical copies of the same virtual root hub descriptors. Put these into a common file to avoid duplication. Note that there were some very minor differences between the descriptors in the various files, such as: - USB 1.0 vs. USB 1.1 - Manufacturer/Device ID - Max packet size - String content I assume these aren't relevant. Cc: Thomas Lange <thomas@corelatus.se> Cc: Shinya Kuribayashi <skuribay@pobox.com> Cc: Gary Jennejohn <garyj@denx.de> Cc: Wolfgang Denk <wd@denx.de> Cc: Eric Millbrandt <emillbrandt@coldhaus.com> Cc: Pierre Aubert <p.aubert@staubli.com> Cc: Stefan Roese <sr@denx.de> Cc: Daniel Hellstrom <daniel@gaisler.com> Cc: Denis Peter <d.peter@mpl.ch> Cc: Rodolfo Giometti <giometti@linux.it> Cc: Zhang Wei <wei.zhang@freescale.com> Cc: Mateusz Zalega <m.zalega@samsung.com> Cc: Remy Bohmer <linux@bohmer.net> Cc: Markus Klotzbuecher <mk@denx.de> Cc: Minkyu Kang <mk7.kang@samsung.com> Cc: Gary Jennejohn <garyj@denx.de> Cc: C Nauman <cnauman@diagraph.com> Cc: David Müller <d.mueller@elsoft.ch> Cc: Yoshihiro Shimoda <shimoda.yoshihiro@renesas.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org> Cc: Thomas Abraham <t-abraham@ti.com> Cc: Tom Rini <trini@ti.com> Cc: Andrew Murray <amurray@embedded-bits.co.uk> Cc: Matej Frančeškin <matej.franceskin@comtrade.com> Cc: Cliff Cai <cliff.cai@analog.com> Cc: Bryan Wu <cooloney@gmail.com> Signed-off-by: Stephen Warren <swarren@wwwdotorg.org>
* usb: ehci: fully align interrupt QHs/QTDsStephen Warren2014-03-10-2/+4
| | | | | | | | | These data structures are passed to cache-flushing routines, and hence must be conform to both the USB the cache-flusing alignment requirements. That means aligning to USB_DMA_MINALIGN. This is important on systems where cache lines are >32 bytes. Signed-off-by: Stephen Warren <swarren@nvidia.com>
* ush: ehci: initialize altnext pointers in QHStephen Warren2014-03-10-0/+2
| | | | | | | | | | | | | | | | | | | | | Section 4.10.2 "Advance Queue" of ehci-specification-for-usb.pdf specifies how an EHCI controller loads a new QTD for processing if the QH is not already marked as active. It states: ===== If the field Bytes to Transfer is not zero and the T-bit in the Alternate Next qTD Pointer is set to zero, then the host controller uses the Alternate Next qTD Pointer. Otherwise, the host controller uses the Next qTD Pointer. If Next qTD Pointer’s T-bit is set to a one, then the host controller exits this state and uses the horizontal pointer to the next schedule data structure. ===== Hence, we must ensure that the alternate next QTD pointer's T-bit (TERMINATE) is set, so the EHCI controller knows to use the next QTD pointer. Signed-off-by: Stephen Warren <swarren@nvidia.com>
* net: asix: don't pad odd-length TX packetsStephen Warren2014-03-07-2/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | For Ethernet/USB RX packets, the ASIX HW pads odd-sized packets so that they have an even size. Currently, asix_recv() does remove this padding, and asic_send() adds equivalent padding in the TX path. However, the HW does not appear to need this packing for TX packets in practical testing with "ASIX Elec. Corp. AX88x72A 000001" Vendor: 0x0b95 Product 0x7720 Version 0.1. The Linux kernel does no such padding for the TX path. Remove the padding from the TX path: * For consistency with the Linux kernel. * NVIDIA has a Tegra simulator which validates that the length of USB packets sent to an ASIX device matches the packet length value inside the packet data. Having U-Boot and the kernel do the same thing when creating the TX packets simplifies the simulator's validation. Cc: Lucas Stach <dev@lynxeye.de> Cc: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Stephen Warren <swarren@nvidia.com> Acked-by: Simon Glass <sjg@chromium.org> Acked-by: Marek Vasut <marex@denx.de> Tested-by: Marek Vasut <marex@denx.de> Tested-by: Gerhard Sittig <gsi@denx.de>
* sizes.h - consolidate for all architecturesAlexey Brodkin2014-03-04-1/+1
| | | | | | | | | | | | | | | | Copied from Linux sources "include/linux/sizes.h" commit 413541dd66d51f791a0b169d9b9014e4f56be13c Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com> Cc: Vineet Gupta <vgupta@synopsys.com> Cc: Tom Rini <trini@ti.com> Cc: Stefan Roese <sr@denx.de> Cc: Albert Aribaud <albert.u.boot@aribaud.net> Acked-by: Tom Rini <trini@ti.com> Acked-by: Stefan Roese <sr@denx.de> [trini: Add bcm Kona platforms to the patch] Signed-off-by: Tom Rini <trini@ti.com>
* Merge branch 'master' of git://git.denx.de/u-boot-mpc85xxTom Rini2014-02-25-1/+1
|\ | | | | | | | | | | | | With this, fixup a trivial build error of get_effective_memsize needing to be updated in the new board/freescale/p1010rdb/spl.c Signed-off-by: Tom Rini <trini@ti.com>
| * fsl/usb: Limit phy_type comparison to first four charactersNikhil Badola2014-02-24-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | Use first four characters for phy_type comparison. Strcmp() should not be used to check the phy_type string which maybe parsed by hwconfig_subarg(). Hwconfig_subarg() returns part of hwconfig string starting from phy_type value till the end of the string. Since phy_type could be either "utmi" or "ulpi", strncmp() should be used so that a comparison of "utmi;fsl_ddr:bank_intlv=auto" with "utmi" will succeed. Signed-off-by: Shaohui Xie <Shaohui.Xie@freescale.com> Signed-off-by: Nikhil Badola <nikhil.badola@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
* | Merge branch 'master' of git://git.denx.de/u-boot-armTom Rini2014-02-20-38/+0
|\ \
| * \ Merge branch 'u-boot/master' into 'u-boot-arm/master'Albert ARIBAUD2014-02-20-4/+3
| |\ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Conflicts: Makefile drivers/net/npe/Makefile These two conflicts arise from commit 0b2d3f20 ("ARM: NET: Remove the IXP NPE ethernet driver") and are resolved by deleting the drivers/net/npe/Makefile file and removing the CONFIG_IXP4XX_NPE line from Makefile.
| * \ \ Merge branch 'u-boot-pxa/master' into 'u-boot-arm/master'Albert ARIBAUD2014-02-19-38/+0
| |\ \ \ | | |_|/ | |/| |
| | * | ARM: USB: Remove the IXP EHCI driverMarek Vasut2014-02-06-38/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The driver is no longer used, remove it. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Albert Aribaud <albert.u.boot@aribaud.net> Cc: Michael Schwingen <michael@schwingen.org> Cc: Tom Rini <trini@ti.com>
* | | | blackfin: Add <asm/clock.h> to numerous driversTom Rini2014-02-20-0/+1
| |_|/ |/| | | | | | | | | | | | | | | | | | | | | | | With d6a320d we moved some clock externs out of blackfin_local.h and into clock.h but now need to include <asm/clock.h> in more drivers to avoid warnings. Cc: Sonic Zhang <sonic.zhang@analog.com> Signed-off-by: Tom Rini <trini@ti.com>
* | | kbuild: use Linux Kernel build scriptsMasahiro Yamada2014-02-19-4/+3
|/ / | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Now we are ready to switch over to real Kbuild. This commit disables temporary scripts: scripts/{Makefile.build.tmp, Makefile.host.tmp} and enables real Kbuild scripts: scripts/{Makefile.build,Makefile.host,Makefile.lib}. This switch is triggered by the line in scripts/Kbuild.include -build := -f $(if $(KBUILD_SRC),$(srctree)/)scripts/Makefile.build.tmp obj +build := -f $(if $(KBUILD_SRC),$(srctree)/)scripts/Makefile.build obj We need to adjust some build scripts for U-Boot. But smaller amount of modification is preferable. Additionally, we need to fix compiler flags which are locally added or removed. In Kbuild, it is not allowed to change CFLAGS locally. Instead, ccflags-y, asflags-y, cppflags-y, CFLAGS_$(basetarget).o, CFLAGS_REMOVE_$(basetarget).o are prepared for that purpose. Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com> Tested-by: Gerhard Sittig <gsi@denx.de>
* | usb: mv_udc: Rename to ci_udcMarek Vasut2014-02-06-102/+102
| | | | | | | | | | | | | | | | | | | | The mv_udc is not marvell-specific anymore. The mv_udc is used to drive generic ChipIdea CI13xxx series OTG cores, so rename the driver to ci_udc instead. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Eric Nelson <eric.nelson@boundarydevices.com> Cc: Stefano Babic <sbabic@denx.de>
* | usb:gadget:f_thor: cosmetic: Remove debug memsetLukasz Majewski2014-02-06-2/+0
| | | | | | | | | | | | | | | | Apparently debug memset (with a 0x55 value) has been overlooked in the f_thor code. Signed-off-by: Lukasz Majewski <l.majewski@samsung.com> Cc: Marek Vasut <marex@denx.de>
* | usb:gadget:f_thor: Allocate request up to THOR_PACKET_SIZE not ep->maxpacketLukasz Majewski2014-02-06-1/+1
| | | | | | | | | | | | | | | | Now it is possible to allocate static request - which receives data from the host (OUT transaction) to the size of THOR packet. Signed-off-by: Lukasz Majewski <l.majewski@samsung.com> Cc: Marek Vasut <marex@denx.de>
* | usb:udc:samsung: Zero copy approach for data passed to Samsung's UDC driverLukasz Majewski2014-02-06-40/+42
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The Samsung's UDC driver is not anymore copying data from USB requests to aligned internal buffers. Now it works directly in data allocated in the upper layers like UMS, DFU, THOR. This change is possible since those gadgets now must take care to allocate buffers aligned to cache line (CONFIG_SYS_CACHELINE_SIZE). This can be achieved by using DEFINE_CACHE_ALIGN_BUFFER() or ALLOC_CACHE_ALIGN_BUFFER() macros. Those take care to allocate buffer aligned to cache line in both starting address and its size. Sometimes it is enough to just use memalign() with size being a multiplication of cache line size. Test condition - test HW + measurement: Trats - Exynos4210 rev.1 - test HW Trats2 - Exynos4412 rev.1 400 MiB compressed rootfs image download with `thor 0 mmc 0` Measurement: Transmission speed: 27.04 MiB/s Signed-off-by: Lukasz Majewski <l.majewski@samsung.com> Cc: Marek Vasut <marex@denx.de>
* | usb:udc:samsung: Allow burst transfers for non EP0 endpintsLukasz Majewski2014-02-06-4/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch removed obscure restriction on the HW setting of DMA transfers. Before this change each transaction sent up to 512 bytes (with packet count equal to 1) for non EP0 transfer. Now it is possible to setup DMA transaction up to DMA_BUFFER_SIZE. Test condition - test HW + measurement: Trats - Exynos4210 rev.1 - test HW Trats2 - Exynos4412 rev.1 400 MiB compressed rootfs image download with `thor 0 mmc 0` Measurement: Transmission speed: 20.74 MiB/s Signed-off-by: Lukasz Majewski <l.majewski@samsung.com> Cc: Marek Vasut <marex@denx.de>
* | usb:udc:samsung: Remove redundant cache operation from Samsung UDC driverLukasz Majewski2014-02-06-17/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | A set of cache operations (both invalidation and flush) were redundant in the S3C HS OTG Samsung driver: 1. s3c_udc_ep0_zlp - to transmit EP0's ZLP packets one don't need to flush the cache (since it is the zero length transmission) 2. s3c_udc_pre_setup and s3c_ep0_complete_out - cache invalidation is not needed when the buffer for OUT EP0 transmission is setup, since no data has yet arrived. Cache cleanups presented above don't contribute much to transmission speed up, hence shall be regarded as cosmetic changes. 3. setdma_rx - here the s3c UDC driver's internal buffers were invalidated. This call is not needed anymore since we reuse the buffers passed from gadgets. This is a key contribution to transmission speed improvement. Test condition - test HW + measurement: Trats - Exynos4210 rev.1 - test HW Trats2 - Exynos4412 rev.1 400 MiB compressed rootfs image download with `thor 0 mmc 0` Measurements: Base values (without improvement): Transmission speed: 9.51 MiB/s After the change: Transmission speed: 10.15 MiB/s Signed-off-by: Lukasz Majewski <l.majewski@samsung.com> Cc: Marek Vasut <marex@denx.de>
* | usb:gadget:ums: Replace malloc calls with memalign to fix cache buffer alignmentLukasz Majewski2014-02-06-2/+2
|/ | | | | | | | Calls to malloc() have been replaced by memalign. It now provides proper buffer alignment. Signed-off-by: Lukasz Majewski <l.majewski@samsung.com> Cc: Marek Vasut <marex@denx.de>
* usb: exynos5: arndale: Add network supportInderpal Singh2014-01-13-0/+2
| | | | | | | | | | | | Arndale board has AX88760, which is USB 2.0 Hub & USB 2.0 Ethernet Combo controller, connected to HSIC Phy of USB host controller via USB3503 hub. This patch uses board specific board_usb_init function to perform reset sequence for USB3503 hub and enables the relevant config options for network to work. Signed-off-by: Inderpal Singh <inderpal.singh@linaro.org> Signed-off-by: Chander Kashyap <chander.kashyap@linaro.org>
* usb: ehci: exynos: set/reset hsic physInderpal Singh2014-01-13-0/+39
| | | | | | | | The controller has 3 ports. The port0 is for USB 2.0 Phy, port1 and port2 are for HSIC phys. The usb 2.0 phy is already being setup. This patch sets up the hsic phys. Signed-off-by: Inderpal Singh <inderpal.singh@linaro.org>
* usb: gadget: fotg210: EP0 fifo empty indication is non-reliableKuo-Jung Su2014-01-13-0/+1
| | | | | | | | | | | | | | | | | | The fifo size of ep0 is 64 bytes, and if the packet size grater than 64 bytes, the driver would have to fill up the fifo multiple times, and before filling up the fifo, the driver should make sure the fifo is empty by checking fifo empty indication. However there is a hardware bug that the fifo empty indication is somehow a bit earlier than fifo reset. So if I don't add an extra delay here, the data might be corrupted. (i.e., 1 byte missing) After a couple of tests, it truns out that 1 usec is good enough. This workaround should be applied to all hardware revisions. Signed-off-by: Kuo-Jung Su <dantesu@faraday-tech.com> CC: Marek Vasut <marex@denx.de>
* usb: gadget: fotg210: add w1c interrupt status supportKuo-Jung Su2014-01-13-0/+14
| | | | | | | | | | | | | | Since hardware revision 1.11.0, the following interrupt status registers are now W1C (i.e., write 1 clear): 1. Interrupt Source Group 0 Register (0x144) (EP0 Abort: BIT5) 2. Interrupt Source Group 2 Register (0x14C) (All bits) And before revision 1.11.0, these registers are all R/W. Which means software must write a 0 to clear the status. Signed-off-by: Kuo-Jung Su <dantesu@faraday-tech.com> CC: Marek Vasut <marex@denx.de>
* usb: ehci: Fix register accessMarek Vasut2013-12-18-1/+1
| | | | | | | | Fix the register access in EHCI HCD. We need to use address of the register as an ehci_writel() argument. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org>
* usb: ehci: Do not de-init uninited controllersMarek Vasut2013-12-18-0/+3
| | | | | | | | | In case the controller is not initialized, we shall not de-initialize it. As the control structure will not be filled, we will produce a null ptr dereference if the controller is not inited. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org>
* usb: ehci-pci: Clarify and cleanup the EHCI controller detectionMarek Vasut2013-12-18-3/+25
| | | | | | | | | The detection function of the EHCI PCI controller was really cryptic, add a beefy comment and clean the portion of the code up a bit. No change in the logic of the code. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org>
* usb: f_dfu: cosmetic: Code cleanupLukasz Majewski2013-12-18-2/+2
| | | | | | Code cleanup for dfu_bind_config function Signed-off-by: Lukasz Majewski <l.majewski@samsung.com>
* usb: dfu: f_dfu: Provide infrastructure to adjust DFU's Poll Timeout valueLukasz Majewski2013-12-18-3/+38
| | | | | | | | | | | It is necessary to deter the host from sending subsequent DFU_GETSTATUS request in the case of e.g. writing the buffer to medium. Here the timeout is increased when we fill up the whole buffer. This delay allows eMMC memory to perform its internal operations. Otherwise we end up with HOST's error regarding GET_STATUS receive timeout. Signed-off-by: Lukasz Majewski <l.majewski@samsung.com>
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