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* dm: ehci-mx6: support driver modelPeng Fan2016-08-07-14/+130
| | | | | | | | | | | | | | | | Support driver model for ehci mx6 driver. Consolidate code to be shared between DM and non-DM, such as introducing ehci_mx6_common_init. For simplicity, some old fasion code are keeped for DM usage, such as board_ehci_power and board_usb_phy_mode. And 'dr-mode', usbphy and vbus handling code for DM is not added now. These will be added in future patches. Signed-off-by: Peng Fan <peng.fan@nxp.com> Cc: Marek Vasut <marex@denx.de> Cc: Mateusz Kulikowski <mateusz.kulikowski@gmail.com> Cc: Stefan Agner <stefan@agner.ch> Cc: Simon Glass <sjg@chromium.org>
* Merge branch 'master' of git://www.denx.de/git/u-boot-imxTom Rini2016-07-28-5/+25
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| * usb: ehci-mx6: introduce config for high active power pinStefan Agner2016-07-19-0/+13
| | | | | | | | | | | | | | | | | | Add a new config CONFIG_MXC_USB_OTG_HACTIVE which configures the OTG Power Pin to be high active. Low active is the reset value of the affected configuration register, hence the config option is named by the non-reset configuration. Signed-off-by: Stefan Agner <stefan.agner@toradex.com>
| * usb: ehci-mx6: configure power polarity in usb_power_configStefan Agner2016-07-19-5/+5
| | | | | | | | | | | | | | | | USBNC_n_CTRL1 bit 9 actually controls the power pin polarity. Rename UCTRL_PM to align reference manual and set the bit in the appropriate callback usb_power_config. Signed-off-by: Stefan Agner <stefan.agner@toradex.com>
| * usb: move CONFIG_USB_EHCI_MX7 to KconfigStefan Agner2016-07-19-0/+7
| | | | | | | | | | | | | | Create an entry for "config USB_EHCI_MX7" in Kconfig and switch over to it for all boards. Signed-off-by: Stefan Agner <stefan.agner@toradex.com>
* | dm: zynq: usb: Convert to CONFIG_DM_USBSimon Glass2016-07-27-52/+51
| | | | | | | | | | | | Convert zynq USB to driver model. Note this is tested on zynq-zybo only. Signed-off-by: Simon Glass <sjg@chromium.org>
* | dm: Use dm_scan_fdt_dev() directly where possibleSimon Glass2016-07-27-6/+1
| | | | | | | | | | | | | | Quite a few places have a bind() method which just calls dm_scan_fdt_dev(). We may as well call dm_scan_fdt_dev() directly. Update the code to do this. Signed-off-by: Simon Glass <sjg@chromium.org>
* | dm: Convert users from dm_scan_fdt_node() to dm_scan_fdt_dev()Simon Glass2016-07-27-3/+1
| | | | | | | | | | | | | | This new function is more convenient for callers, and handles pre-relocation situations automatically. Signed-off-by: Simon Glass <sjg@chromium.org>
* | usb: Kconfig: Add Kconfigs entry USB_EHCI_ZYNQSiva Durga Prasad Paladugu2016-07-22-0/+7
|/ | | | | | | | | Add Kconfig entry config option for USB_EHCI_ZYNQ and update the same to enable for all zynq boards which supports USB Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
* ehci: mx7: fix otg id detectionPeng Fan2016-06-25-2/+5
| | | | | | | | | | The USBNC_PHYCFG2_ACAENB bit should be cleared to enable the OTG ID detection, not set it. When the bit is set, the ACA Resistance Detection is enabled, which disables the OTG ID detection, because the internal pull up is off. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
* ehci: mx7: fix usbnc_regsPeng Fan2016-06-25-1/+2
| | | | | | | | There is a 4 bytes hole between phy_cfg2 and phy_status, fix the usbnc_regs structure to include the hole. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
* usb: fsl: Fix NULL terminating issue for usb controller name stringRajesh Bhagat2016-06-25-1/+2
| | | | | | | Fixes NULL terminating issue for usb controller name string by using sizeof operator. Signed-off-by: Rajesh Bhagat <rajesh.bhagat@nxp.com>
* clk: convert API to match reset/mailbox styleStephen Warren2016-06-19-7/+7
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The following changes are made to the clock API: * The concept of "clocks" and "peripheral clocks" are unified; each clock provider now implements a single set of clocks. This provides a simpler conceptual interface to clients, and better aligns with device tree clock bindings. * Clocks are now identified with a single "struct clk", rather than requiring clients to store the clock provider device and clock identity values separately. For simple clock consumers, this isolates clients from internal details of the clock API. * clk.h is split so it only contains the client/consumer API, whereas clk-uclass.h contains the provider API. This aligns with the recently added reset and mailbox APIs. * clk_ops .of_xlate(), .request(), and .free() are added so providers can customize these operations if needed. This also aligns with the recently added reset and mailbox APIs. * clk_disable() is added. * All users of the current clock APIs are updated. * Sandbox clock tests are updated to exercise clock lookup via DT, and clock enable/disable. * rkclk_get_clk() is removed and replaced with standard APIs. Buildman shows no clock-related errors for any board for which buildman can download a toolchain. test/py passes for sandbox (which invokes the dm clk test amongst others). Signed-off-by: Stephen Warren <swarren@nvidia.com> Acked-by: Simon Glass <sjg@chromium.org>
* usb: ehci: only shutdown opened controllerPeng Fan2016-06-18-0/+3
| | | | | | | | | | | | | | | | | | | | | | If the usb controller is not running, no need to shutdown it, otherwise `usb stop` complains about: "EHCI failed to shut down host controller". To i.MX7D SDB, there are two usb ports, one Host, one OTG. If we only plug one udisk to the Host port and then `usb start`, the OTG controller for OTG port does not run actually. Then, if `usb stop`, the OTG controller for OTG port will also be shutdown, but it is not running. This patch adds a check to only shutdown the running controller. Signed-off-by: Peng Fan <peng.fan@nxp.com> Cc: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Cc: Mateusz Kulikowski <mateusz.kulikowski@gmail.com> Cc: Hans de Goede <hdegoede@redhat.com> Cc: "Stefan Brüns" <stefan.bruens@rwth-aachen.de> Cc: Stephen Warren <swarren@nvidia.com>
* usb: xhci: fsl: Add workaround for USB erratum A008751Sriram Dash2016-06-13-0/+24
| | | | | | | | | This patch is doing the following: 1. Implementing the errata for LS2080. 2. Adding fixup for fdt for LS2080. Signed-off-by: Sriram Dash <sriram.dash@nxp.com> Signed-off-by: Rajesh Bhagat <rajesh.bhagat@nxp.com>
* usb: move CONFIG_USB_XHCI_DWC3 to KconfigMasahiro Yamada2016-06-04-0/+6
| | | | | | | Create an entry for "config USB_XHCI_DWC3" in Kconfig and switch over to it for all boards. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
* usb: move CONFIG_USB_XHCI to Kconfig with renamingMasahiro Yamada2016-06-04-7/+1
| | | | | | | | | | | | | | | | | Move CONFIG_USB_XHCI to defconfig files for all boards, renaming it into CONFIG_USB_XHCI_HCD. As commented in the help of "config USB_XHCI" entry, this has been a TODO for a long time; now CONFIG_USB_XHCI_HCD and CONFIG_USB_XHCI have been unified in favor of the former. Note: Some boards define CONFIG_USB_XHCI in their headers without CONFIG_USB, which does not meet the "depends on" in Kconfig. I added CONFIG_USB=y for those boards when converting. Otherwise, they would fail to build. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
* usb: dwc2: Add delay to fix the USB detection problem on SoCFPGAStefan Roese2016-05-06-0/+9
| | | | | | | | | | | | | | | | | | With patch c998da0d (usb: Change power-on / scanning timeout handling), the USB scanning is started earlier and with a smaller timeout. This resulted on SoCFPGA (using the DWC2 driver) in some USB sticks not getting detected any more. This patch now adds a 1 second delay (in the host mode only) to the DWC2 driver before the scanning is started. With this delay, now all problematic USB keys are detected successfully again. And there is no need any more to change the delay / timeout in the common USB code (usb_hub.c). Signed-off-by: Stefan Roese <sr@denx.de> Cc: Chin Liang See <clsee@altera.com> Cc: Dinh Nguyen <dinguyen@opensource.altera.com> Cc: Hans de Goede <hdegoede@redhat.com> Cc: Stephen Warren <swarren@nvidia.com> Cc: Marek Vasut <marex@denx.de>
* usb: ehci-mx6: allow board_ehci_hcd_init to failStefan Agner2016-05-06-2/+5
| | | | | | | | | | | There could be runtime determined board specific reason why a EHCI initialization fails (e.g. ENODEV if a Port is not available). In this case, properly return the error code. While at it, that function (board_ehci_hcd_init) has actually two documentation blocks... Use the correct function name for the documentation block of board_usb_phy_mode. Signed-off-by: Stefan Agner <stefan@agner.ch>
* usb: dwc2: Init desc_before_addrMarek Vasut2016-05-03-0/+3
| | | | | | | | | | | Initialize desc_before_addr, otherwise the USB core won't send the first 64B Get Device Descriptor request in common/usb.c function usb_setup_descriptor() . There are some USB devices which expect this sequence and otherwise can misbehave. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Dinh Nguyen <dinguyen@opensource.altera.com> Cc: Tom Rini <trini@konsulko.com>
* usb: dwc2: Make OC protection configurableMarek Vasut2016-05-03-3/+14
| | | | | | | | | | Introduce a new flag in the controller private data, which allows selectively disabling the OC protection. Use the standard 'disable-over-current' OF prop to set this flag. This OC protection must be disabled on EBV SoCrates rev 1. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Stefan Roese <sr@denx.de> Cc: Dinh Nguyen <dinguyen@kernel.org>
* usb: dwc2: Pull Ext VBUS macro from dwc_otg_core_init()Marek Vasut2016-05-03-7/+14
| | | | | | | | | | | Introduce a boolean flag in the dwc2 controller private data and set it according to the macro (for now) instead of having this macro directly in the dwc_otg_core_init(). This will let us configure the flag from DT or such later on, if needed. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Stefan Roese <sr@denx.de> Cc: Dinh Nguyen <dinguyen@kernel.org>
* usb: dwc2: Pass private data into dwc_otg_core_init()Marek Vasut2016-05-03-2/+3
| | | | | | | | | | Pass the whole bulk of private data instead of just the regs, since the private data will soon contain important configuration flags. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Stefan Roese <sr@denx.de> Cc: Dinh Nguyen <dinguyen@kernel.org>
* sunxi: H3: Do not clear usb companion clk-gate / reset on removeHans de Goede2016-04-12-6/+14
| | | | | | | | | | | | | | | | | On the H3 we need to enable the clk and de-assert the reset of the companion to be able to talk to the actual usb host controller. Before this commit we were also disabling the companion clk-gate / asserting its reset on remove, causing the later remove callback of the companion itself to (sometimes) fail with: ERROR: USB HC reset timed out! This commit fixes this by not disabling the companion's clk-gate nor asserting its reset on remove. Signed-off-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Ian Campbell <ijc@hellion.org.uk>
* drivers:usb:common:fsl-dt-fixup: Move device-tree fixup framework to common fileSriram Dash2016-04-10-195/+0
| | | | | | | | | Move usb device-tree fixup framework from ehci-fsl.c to common place so that it can be used by other drivers as well (xhci-fsl.c). Signed-off-by: Ramneek Mehresh <ramneek.mehresh@nxp.com> Signed-off-by: Sriram Dash <sriram.dash@nxp.com> Acked-by: Marek Vasut <marex@denx.de>
* usb: ehci-hcd: Fix crash when no ops are provided to ehci_register()Mateusz Kulikowski2016-04-10-2/+2
| | | | | | | | | | | This commit fixes crash on BananaPi (and possibly others) casued by 3f9f8a5b83f8aec40c9f4ee496046a695e333c45. Crash reason: When no ops were passed to ehci_register(), USB host driver caused NULL pointer dereference. Signed-off-by: Mateusz Kulikowski <mateusz.kulikowski@gmail.com>
* ehci: Add support for Qualcomm EHCIMateusz Kulikowski2016-04-01-0/+190
| | | | | | | | | | This driver is able to reconfigure OTG controller into HOST mode. Board can add board-specific initialization as board_prepare_usb(). It requires USB_ULPI_VIEWPORT enabled in board configuration. Signed-off-by: Mateusz Kulikowski <mateusz.kulikowski@gmail.com> Acked-by: Marek Vasut <marex@denx.de> Tested-by: Simon Glass <sjg@chromium.org>
* ehci-ci.h: drop generic USBCMD fieldsMateusz Kulikowski2016-04-01-2/+2
| | | | | | | | Use definitions from ehci.h instead. Signed-off-by: Mateusz Kulikowski <mateusz.kulikowski@gmail.com> Acked-by: Marek Vasut <marex@denx.de> Tested-by: Simon Glass <sjg@chromium.org>
* usb: Rename ehci-fsl.h to ehci-ci.hMateusz Kulikowski2016-04-01-7/+7
| | | | | | | | | | | | | Most of ehci-fsl header describe USB controller designed by Chipidea and used by various SoC vendors. This patch renames it to a generic header: ehci-ci.h Contents of file are not changed (so it contains several references to freescale SoCs). Signed-off-by: Mateusz Kulikowski <mateusz.kulikowski@gmail.com> Acked-by: Marek Vasut <marex@denx.de> Tested-by: Simon Glass <sjg@chromium.org>
* ehci-hcd: Add init_after_resetMateusz Kulikowski2016-04-01-0/+7
| | | | | | | | | | | | Some host controllers need addidional initialization after ehci_reset() In non-dm implementation it is possible to use CONFIG_EHCI_HCD_INIT_AFTER_RESET. This patch adds similar option to ehci drivers using dm. Signed-off-by: Mateusz Kulikowski <mateusz.kulikowski@gmail.com> Acked-by: Marek Vasut <marex@denx.de> Reviewed-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org>
* sunxi: ohci: Add A83T compatibleChen-Yu Tsai2016-03-31-0/+1
| | | | | | | | We have a separate compatible for almost each SoC. Add one for the A83T. Signed-off-by: Chen-Yu Tsai <wens@csie.org> Reviewed-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Hans de Goede <hdegoede@redhat.com>
* sunxi: ehci: Add A83T compatibleChen-Yu Tsai2016-03-31-0/+1
| | | | | | | | We have a separate compatible for almost each SoC. Add one for the A83T. Signed-off-by: Chen-Yu Tsai <wens@csie.org> Reviewed-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Hans de Goede <hdegoede@redhat.com>
* sunxi: Fix 2nd usb controller on sun4i/sun7i no longer workingHans de Goede2016-03-23-5/+23
| | | | | | | | | | The 2nd usb controller on sun4i/sun7i has its base address 0x8000 bytes from the 1st one, rather then 0x1000. Also the ahb clk gates are interleaved with the ohci clk-gates introducing a hole between the clks for usb1 and usb2. Signed-off-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Ian Campbell <ijc@hellion.org.uk>
* usb: xhci: Fix vendor command error if the request type is ↵Ted Chen2016-03-20-2/+4
| | | | | | | | | | | | USB_REQ_SET_ADDRESS or USB_REQ_SET_CONFIGURATION. Add test into xhci_submit_control_message for usb requesttype in USB vendor request being of standardized type. This fixes detection of certain USB fixes, for example Ethernet, USB 3.0 port. Non standardized requesttype in USB vendor request will be ignored. Signed-off-by: Ted Chen <tedchen@realtek.com> Tested-by: Anand Moon <linux.amoon@gmail.com>
* dm: usb: Unbind old block devices when shutting down USBSimon Glass2016-03-17-1/+5
| | | | | | | | | | | | | | | | | When 'usb start' is used, block devices are created for any USB flash sticks and disks, etc. When 'usb stop' is used, these block devices are currently not removed. We don't want old block devices hanging around since they can still be visible to U-Boot. Therefore, when USB is shut down, remove and unbind all the block devices created by the USB subsystem. Possibly we should unbind all devices which don't cause problems by being unbound. Most likely we can remove everything except USB controllers, hubs and emulators. We can consider that later. Signed-off-by: Simon Glass <sjg@chromium.org> Tested-by: Stephen Warren <swarren@nvidia.com>
* usb: dwc2: disable erroneous overcurrent conditionDinh Nguyen2016-03-05-1/+5
| | | | | | | | | | | For the case where an external VBUS is used, we should enable the external VBUS comparator in the driver. This would prevent an unnecessary overcurrent error which would then disable the host port. The overcurrent condition was happening on the SoCFPGA Cyclone5 devkit, thus USB was not working on the devkit. This patch fixes that problem. Signed-off-by: Dinh Nguyen <dinguyen@opensource.altera.com>
* usb: ehci: Fix warning on aarch64Marek Vasut2016-02-26-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | Fix the following warning on aarch64 introduced by using p2v/v2p functions in the code: In file included from ./arch/arm/include/asm/byteorder.h:29:0, from include/compiler.h:125, from include/image.h:19, from include/common.h:88, from drivers/usb/host/ehci-hcd.c:10: drivers/usb/host/ehci-hcd.c: In function ‘ehci_td_buffer’: drivers/usb/host/ehci-hcd.c:250:49: warning: cast to pointer from integer of different size [-Wint-to-pointer-cast] td->qt_buffer[idx] = cpu_to_hc32(virt_to_phys((void *)addr)); ^ include/linux/byteorder/little_endian.h:34:51: note: in definition of macro ‘__cpu_to_le32’ #define __cpu_to_le32(x) ((__force __le32)(__u32)(x)) ^ drivers/usb/host/ehci-hcd.c:250:24: note: in expansion of macro ‘cpu_to_hc32’ td->qt_buffer[idx] = cpu_to_hc32(virt_to_phys((void *)addr)); Signed-off-by: Marek Vasut <marex@denx.de> Cc: Stephen Warren <swarren@wwwdotorg.org> Cc: Tom Rini <trini@konsulko.com>
* usb: ehci: Be explicit about the BE IO accessorsMarek Vasut2016-02-24-2/+3
| | | | | | | | | | Add explicit cpu_to_be32()/be32_to_cpu() conversion to BE EHCI I/O accessors to align them with their LE counterpart. No functional change. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com> Cc: Hans de Goede <hdegoede@redhat.com>
* usb: ehci: Clear USBMODE_BE on LE MMIOMarek Vasut2016-02-24-0/+2
| | | | | | | | | If the USB EHCI is configured for little endian MMIO, make sure to clear the USBMODE_BE flag from the USBMODE register. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com> Cc: Hans de Goede <hdegoede@redhat.com>
* usb: ehci: Implement V2P mappingMarek Vasut2016-02-24-10/+9
| | | | | | | | | | | | Certain processor architectures, like MIPS, require that the USB structures and transfer buffers are passed with their PA to the USB controller. If VA is passed, the USB will not work. Add the necessary virt_to_phys() calls into the USB EHCI code to make it work. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com> Cc: Hans de Goede <hdegoede@redhat.com>
* usb: ehci: Use map_physmem in ehci-genericMarek Vasut2016-02-24-1/+3
| | | | | | | | | Some architectures, like MIPS, require remapping of the registers. Add the map_physmem() call to handle it. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com> Cc: Hans de Goede <hdegoede@redhat.com>
* sunxi: H3: Add support for the host usb-physJelle van der Waa2016-02-23-16/+16
| | | | | | | | Add support for phy 1-3. Signed-off-by: Jelle van der Waa <jelle@vdwaa.nl> [hdegoede@redhat.com: use setclrbits_le32 instead of read-modify-write] Signed-off-by: Hans de Goede <hdegoede@redhat.com>
* drivers: usb: ohci-at91: clean up the PLLB codeWenyou Yang2016-02-18-15/+7
| | | | | | | | | Due to introducing the new PLLB clock handle functions, use these functions to clean up the PLLB enable/disable code. Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com> Reviewed-by: Andreas Bießmann <andreas.devel@googlemail.com> Tested-by: Heiko Schocher <hs@denx.de>
* drivers: usb: atmel: clean up the UTMI PLL codeWenyou Yang2016-02-18-47/+11
| | | | | | | | | Due to introducing the new UTMI PLL clock handle functions, use these function to reduce the duplicated code. Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com> Tested-by: Heiko Schocher <hs@denx.de> Reviewed-by: Andreas Bießmann <andreas.devel@googlemail.com>
* drivers: at91: clean up peripheral clock codeWenyou Yang2016-02-18-24/+4
| | | | | | | | | | Due to introducing the new peripheral clock handle functions, use these functions to reduce the duplicated code. Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com> Tested-by: Heiko Schocher <hs@denx.de> [fixup for missing clk.h in at91_emac.c] Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
* usb: remove UniPhier EHCI driverMasahiro Yamada2016-02-14-83/+0
| | | | | | | | | | Now, all this driver does can be covered by the generic EHCI driver (drivers/usb/host/ehci-generic.c). UniPhier SoCs have switched to use it. Delete this driver rather than bothering to convert it to Driver Model. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Acked-by: Marek Vasut <marex@denx.de>
* Merge branch 'master' of git://git.denx.de/u-boot-usbTom Rini2016-01-25-100/+216
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| * usb: add clock support for generic EHCIMasahiro Yamada2016-01-25-0/+14
| | | | | | | | | | | | | | This driver is designed in a generic manner, so clocks should be handled genericly as well. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
| * usb: dwc2: Do not mix data toggle for IN and OUT endpoints, check boundsStefan Brüns2016-01-23-10/+19
| | | | | | | | | | | | | | | | | | | | | | | | | | | | USB protocol allows for 16 IN and 16 OUT endpoints (USB 2.0 Spec, 8.3.2.2 Endpoint Field). A function may have an EP 1 for both IN and OUT, so these two should be kept separate. As EPs are either BULK or INTERRUPT (or ISO), it is fine to have one array per direction for all transfer types (also see e236519b7365ef75c5da6a5623f0b03d9c00cfae). USB device address is 7 bits, so a bus may have more than 16 devices. Check the device number, as the DWC2 driver only supports BULK/ISO for the first 16 devices. Signed-off-by: Stefan Brüns <stefan.bruens@rwth-aachen.de>
| * usb: dwc2: Add SPLIT INTERRUPT transaction supportStefan Brüns2016-01-23-5/+24
| | | | | | | | | | | | | | | | | | | | | | | | | | | | CSPLITs for INTERRUPT transactions have to be scheduled in each microframe following the SSPLIT. INTERRUPT transfers are executed in the next even/ odd microframe depending on the HCCHAR_ODDFRM flag. As there are no handshakes for INTERRUPT SSPLITs the SSPLIT may have failed (transport error) without the error being detected by the host driver. If the last CSPLIT is not received within 4 microframes after the SSPLIT there was a transaction error and the complete transaction has to be restarted. Signed-off-by: Stefan Brüns <stefan.bruens@rwth-aachen.de>
generated by cgit v1.1 at 2024-12-21 11:29:18 +0000