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* Merge branch 'master' of git://git.denx.de/u-boot-mpc85xxTom Rini2014-02-25-1/+1
|\ | | | | | | | | | | | | With this, fixup a trivial build error of get_effective_memsize needing to be updated in the new board/freescale/p1010rdb/spl.c Signed-off-by: Tom Rini <trini@ti.com>
| * fsl/usb: Limit phy_type comparison to first four charactersNikhil Badola2014-02-24-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | Use first four characters for phy_type comparison. Strcmp() should not be used to check the phy_type string which maybe parsed by hwconfig_subarg(). Hwconfig_subarg() returns part of hwconfig string starting from phy_type value till the end of the string. Since phy_type could be either "utmi" or "ulpi", strncmp() should be used so that a comparison of "utmi;fsl_ddr:bank_intlv=auto" with "utmi" will succeed. Signed-off-by: Shaohui Xie <Shaohui.Xie@freescale.com> Signed-off-by: Nikhil Badola <nikhil.badola@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
* | ARM: USB: Remove the IXP EHCI driverMarek Vasut2014-02-06-38/+0
|/ | | | | | | | | The driver is no longer used, remove it. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Albert Aribaud <albert.u.boot@aribaud.net> Cc: Michael Schwingen <michael@schwingen.org> Cc: Tom Rini <trini@ti.com>
* usb: exynos5: arndale: Add network supportInderpal Singh2014-01-13-0/+2
| | | | | | | | | | | | Arndale board has AX88760, which is USB 2.0 Hub & USB 2.0 Ethernet Combo controller, connected to HSIC Phy of USB host controller via USB3503 hub. This patch uses board specific board_usb_init function to perform reset sequence for USB3503 hub and enables the relevant config options for network to work. Signed-off-by: Inderpal Singh <inderpal.singh@linaro.org> Signed-off-by: Chander Kashyap <chander.kashyap@linaro.org>
* usb: ehci: exynos: set/reset hsic physInderpal Singh2014-01-13-0/+39
| | | | | | | | The controller has 3 ports. The port0 is for USB 2.0 Phy, port1 and port2 are for HSIC phys. The usb 2.0 phy is already being setup. This patch sets up the hsic phys. Signed-off-by: Inderpal Singh <inderpal.singh@linaro.org>
* usb: ehci: Fix register accessMarek Vasut2013-12-18-1/+1
| | | | | | | | Fix the register access in EHCI HCD. We need to use address of the register as an ehci_writel() argument. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org>
* usb: ehci: Do not de-init uninited controllersMarek Vasut2013-12-18-0/+3
| | | | | | | | | In case the controller is not initialized, we shall not de-initialize it. As the control structure will not be filled, we will produce a null ptr dereference if the controller is not inited. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org>
* usb: ehci-pci: Clarify and cleanup the EHCI controller detectionMarek Vasut2013-12-18-3/+25
| | | | | | | | | The detection function of the EHCI PCI controller was really cryptic, add a beefy comment and clean the portion of the code up a bit. No change in the logic of the code. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org>
* usb: ehci-omap: Reset the USB Host OMAP moduleRoger Quadros2013-12-06-15/+42
| | | | | | | | | | | | | | | | | | | In commit bb1f327 we removed the UHH reset to fix NFS root (over usb ethernet) problems with Beagleboard (3530 ES1.0). However, this seems to cause USB detection problems for Pandaboard, about (3/8). On further investigation, it seems that doing the UHH reset is not the cause of the original Beagleboard problem, but in the way the reset was done. This patch adds proper UHH RESET mechanism for OMAP3 and OMAP4/5 based on the UHH_REVISION register. This should fix the Beagleboard NFS problem as well as the Pandaboard USB detection problem. Reported-by: Tomi Valkeinen <tomi.valkeinen@ti.com> CC: Stefan Roese <sr@denx.de> Reviewed-by: Stefan Roese <sr@denx.de> Signed-off-by: Roger Quadros <rogerq@ti.com>
* Merge branch 'iu-boot/master' into 'u-boot-arm/master'Albert ARIBAUD2013-11-09-9/+10
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Conflicts: arch/arm/cpu/arm926ejs/mxs/Makefile board/compulab/cm_t35/Makefile board/corscience/tricorder/Makefile board/ppcag/bg0900/Makefile drivers/bootcount/Makefile include/configs/omap4_common.h include/configs/pdnb3.h Makefile conflicts are due to additions/removals of object files on the ARM branch vs KBuild introduction on the main branch. Resolution consists in adjusting the list of object files in the main branch version. This also applies to two files which are not listed as conflicting but had to be modified: board/compulab/common/Makefile board/udoo/Makefile include/configs/omap4_common.h conflicts are due to the OMAP4 conversion to ti_armv7_common.h on the ARM side, and CONFIG_SYS_HZ removal on the main side. Resolution is to convert as this icludes removal of CONFIG_SYS_HZ. include/configs/pdnb3.h is due to a removal on ARM side. Trivial resolution is to remove the file. Note: 'git show' will also list two files just because they are new: include/configs/am335x_igep0033.h include/configs/omap3_igep00x0.h
| * arm: atmel: get rid of too many ifdefferyBo Shen2013-11-04-10/+4
| | | | | | | | | | | | | | | | | | | | | | Get rid of too many ifdeffery in usb ohci driver Add following two configuration for USB clock selecting - CONFIG_USB_ATMEL_CLK_SEL_PLLB: using PLLB as usb ohci input clock - CONFIG_USB_ATMEL_CLK_SEL_UPLL: using UPLL as usb ohci input clock Signed-off-by: Bo Shen <voice.shen@atmel.com> Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
| * arm: atmel: at91sam9n12ek: add usb host supportBo Shen2013-11-04-2/+9
| | | | | | | | | | | | | | Add usb host support for at91sam9n12ek board. Signed-off-by: Bo Shen <voice.shen@atmel.com> Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
* | usb: ohci-hcd: submit_common_msg: report actual_length properlyMateusz Kulikowski2013-11-08-1/+1
| | | | | | | | | | | | | | submit_common_msg should report amount of data passed from/to device. Instead, it always returned size requested by Host. Signed-off-by: Mateusz Kulikowski <mateusz.kulikowski@gmail.com>
* | drivers: usb: convert makefiles to Kbuild styleMasahiro Yamada2013-10-31-51/+29
| | | | | | | | Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
* | powerpc/usb:Differentiate USB controller base addressramneek mehresh2013-10-24-4/+15
| | | | | | | | | | | | | | | | Introduce different macros for storing addresses of multiple USB controllers. This is required for successful initialization and usage of multiple USB controllers inside u-boot Signed-off-by: Ramneek Mehresh <ramneek.mehresh@freescale.com>
* | usb: rename board_usb_init_type to usb_init_typeTroy Kisky2013-10-22-2/+2
| | | | | | | | | | | | | | | | | | commit bba679144d25b91bcd7befff5a96728a30875f54 "usb: rename board_usb_init_type to usb_init_type" missed xhci-omap.c So, fix that patch here, and fix a checkpatch warning. WARNING: Avoid unnecessary line continuations Signed-off-by: Troy Kisky <troy.kisky@boundarydevices.com>
* | usb: ehci-mx6: add support for otg portTroy Kisky2013-10-20-40/+91
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Previously, only host1 was supported using an index of 0. Now, otg has index 0, host1 is 1, host2 is 2, host3 is 3. Since OTG requires usbmode to be set after reset, I added CONFIG_EHCI_HCD_INIT_AFTER_RESET to nitrogen6x.h and mx6qsabreauto.h. I also added a weak function board_ehci_power to handle turning power on/off for otg. Type is type of device connected (USB stick vs Host.) Init is type of device desired. Only power up port if type == init == USB_INIT_HOST. Only return error if type != init. Signed-off-by: Troy Kisky <troy.kisky@boundarydevices.com>
* | usb: ehci-hcd: add enum usb_init_type parameter to ehci_hcd_init.Troy Kisky2013-10-20-25/+46
| | | | | | | | | | | | | | This paramter will later be used to initialize OTG ports in host or device mode. Signed-off-by: Troy Kisky <troy.kisky@boundarydevices.com>
* | usb: add enum usb_init_type parameter to usb_lowlevel_initTroy Kisky2013-10-20-7/+7
| | | | | | | | | | | | This parameter will later be used to verify OTG ports. Signed-off-by: Troy Kisky <troy.kisky@boundarydevices.com>
* | usb: dra7xx: Add support for dra7xx xhci USB hostDan Murphy2013-10-20-4/+2
| | | | | | | | | | | | | | | | | | | | | | Add the support for the dra7xx xhci usb host. dra7xx does not contain an EHCI controller so the headers can be removed from the board file. The xHCI host on dra7xx is connected to a usb2 phy so need to add support to enable those clocks. Signed-off-by: Dan Murphy <dmurphy@ti.com>
* | usb: omap: Move the usb phy code to the usb/phy directoryDan Murphy2013-10-20-169/+2
| | | | | | | | | | | | | | | | | | | | | | Moving the usb/phy code from xhci-omap to the usb/phy directory and moving the associated phy code over to the new file. Newer TI processors adding xHCI support will have different PHY configurations so therefore abstracting this code away will prevent messing around with the xhci-omap file itself. Signed-off-by: Dan Murphy <dmurphy@ti.com>
* | usb: omap5: Update the board_usb_init apiDan Murphy2013-10-20-3/+4
| | | | | | | | | | | | | | | | | | | | Recent patches declares board_usb_init function prototype for a new usb architecture. Turning on the OMAP_XHCI defines cause a redefinition compiler failure. So update the board_usb_init to the latest prototype. Signed-off-by: Dan Murphy <dmurphy@ti.com>
* | usb: omap: Move the xhci-omap header file to common locationDan Murphy2013-10-20-1/+1
| | | | | | | | | | | | | | Moving the xhci-omap header to a more global location so that other code can reference this code. Signed-off-by: Dan Murphy <dmurphy@ti.com>
* | usb: new board-specific USB init interfaceMateusz Zalega2013-10-20-19/+10
| | | | | | | | | | | | | | | | | | | | | | | | | | | | This commit unifies board-specific USB initialization implementations under one symbol (usb_board_init), declaration of which is available in usb.h. New API allows selective initialization of USB controllers whenever needed. Signed-off-by: Mateusz Zalega <m.zalega@samsung.com> Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com> Reviewed-by: Lukasz Majewski <l.majewski@samsung.com> Cc: Marek Vasut <marex@denx.de> Cc: Lukasz Majewski <l.majewski@samsung.com>
* | OMAP5: USB: Add OMAP xHCI file and headerDan Murphy2013-10-20-0/+327
| | | | | | | | | | | | | | | | Add the OMAP file for the xHCI Host controller This code will initilialize the proper components within the OMAP5 to enable the xHCI host controller. Signed-off-by: Dan Murphy <dmurphy@ti.com>
* | exynos: usb: Switch USB VBUS GPIOs to be device tree configuredJulius Werner2013-10-20-0/+22
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Some Exynos boards, such as the SMDK5250, control USB port power through a GPIO pin. For now this had been hardcoded in the exynos5-dt board file, but not all boards use the same pin, requiring local changes to support different boards. This patch moves the GPIO initialization into the USB host controller drivers which they belong to, and uses the samsung,vbus-gpio parameter in the device tree to configure it. Signed-off-by: Julius Werner <jwerner@chromium.org> Signed-off-by: Vivek Gautam <gautam.vivek@samsung.com> Cc: Simon Glass <sjg@chromium.org> Cc: Minkyu Kang <mk7.kang@samsung.com> Cc: Marek Vasut <marex@denx.de>
* | USB: XHCI: Add xHCI host controller support for Exynos5Vivek Gautam2013-10-20-0/+317
| | | | | | | | | | | | | | | | | | | | | | | | | | This adds driver layer for xHCI controller in Samsung's exynos5 soc. This interacts with xHCI host controller stack. Signed-off-by: Vikas C Sajjan <vikas.sajjan@samsung.com> Signed-off-by: Vivek Gautam <gautam.vivek@samsung.com> Cc: Julius Werner <jwerner@chromium.org> Cc: Simon Glass <sjg@chromium.org> Cc: Minkyu Kang <mk7.kang@samsung.com> Cc: Dan Murphy <dmurphy@ti.com> Cc: Marek Vasut <marex@denx.de>
* | USB: xHCI: Add stack support for xHCIVivek Gautam2013-10-20-0/+3947
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This adds stack layer for eXtensible Host Controller Interface which facilitates use of USB 3.0 in host mode. Adapting xHCI host controller driver in linux-kernel by Sarah Sharp to needs in u-boot. Initial porting from Linux kernel version 3.4, with following top commit history of drivers/usb/host/xhci* : cf84055 xHCI: Cleanup isoc transfer ring when TD length mismatch found This adds the basic xHCI host controller driver with bare minimum features: - Control/Bulk transfer support has been added with required infrastructure for necessary xHC data structures. - Stream protocol hasn't been supported yet. - No support for quirky devices has been added. Signed-off-by: Vikas C Sajjan <vikas.sajjan@samsung.com> Signed-off-by: Julius Werner <jwerner@chromium.org> Signed-off-by: Vivek Gautam <gautam.vivek@samsung.com> Cc: Simon Glass <sjg@chromium.org> Cc: Minkyu Kang <mk7.kang@samsung.com> Cc: Dan Murphy <dmurphy@ti.com> Cc: Marek Vasut <marex@denx.de>
* | usb: Move 'bmRequestType' USB device request macros from EHCI headerVivek Gautam2013-10-20-16/+0
|/ | | | | | | | | | | | | | Macros defining bmRequestType field of USB device request, given in table 9.2 USB 2.0 spec, are rather generic macros which can be further used by other Host controller stacks. So moving them to usb_defs header. Signed-off-by: Vivek Gautam <gautam.vivek@samsung.com> Cc: Julius Werner <jwerner@chromium.org> Cc: Simon Glass <sjg@chromium.org> Cc: Minkyu Kang <mk7.kang@samsung.com> Cc: Dan Murphy <dmurphy@ti.com> Cc: Marek Vasut <marex@denx.de>
* Coding Style cleanup: remove trailing white spaceWolfgang Denk2013-10-14-1/+1
| | | | Signed-off-by: Wolfgang Denk <wd@denx.de>
* usb: ehci: Fix test mode for connected portsJulius Werner2013-09-27-0/+38
| | | | | | | | | | | | | | | | The EHCI controller has some very specific requirements for the USB 2.0 port test modes, which were not closely followed in the initial test mode commit. It demands that the host controller is completely shut down (all ports suspended, Run/Stop bit unset) when activating test mode, and will not work on an already enumerated port. This patch fixes that by introducing a new ehci_shutdown() function that closely follows the procedure listed in EHCI 4.14. Also, when we have such a function anyway, we might as well also use it in usb_lowlevel_stop() to make the normal host controller shutdown cleaner. Signed-off-by: Julius Werner <jwerner@chromium.org> Acked-by: Simon Glass <sjg@chromium.org>
* usb: ehci-mx5: Use 'bool' instead of 'unsigned char'Fabio Estevam2013-08-26-3/+3
| | | | | | | The 'enable' argument can be better expressed as boolean. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br>
* usb: ehci-mx5: Remove unneeded write to cscmr1 registerFabio Estevam2013-08-26-9/+0
| | | | | | | | | | | Currently we have the following behavior in ehci_hcd_init() - Read csmr1 register, clear bit 26 and then set bit 26. However a little bit later we call set_usb_phy_clk() which clears bit 26, so let's get rid of the unnecessary code. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
* ARM: OMAP: USB: Fix linker error when ULPI is not definedDan Murphy2013-08-26-0/+7
| | | | | | | | Fix the linker error for missing ulpi_reset when ulpi is not defined in the board config. Signed-off-by: Dan Murphy <dmurphy@ti.com> Acked-by: Marek Vasut <marex@denx.de>
* ARM: OMAP5: USB: Add OMAP5 common USB EHCI informationDan Murphy2013-08-26-2/+24
| | | | | | | | * Enable the OMAP5 EHCI host clocks * Add OMAP5 EHCI register definitions * Add OMAP5 ES2 host revision Signed-off-by: Dan Murphy <dmurphy@ti.com>
* ehci-hcd: fix memory leak in lowlevel initNikita Kiryanov2013-07-29-1/+3
| | | | | | | | | | usb_lowlevel_init() allocates a new periodic_list each time it is invoked, without freeing the original list. Since it is initialized later on in the code, just reuse the first-allocated list in future invocations of usb_lowlevel_init. Cc: Marek Vasut <marex@denx.de> Cc: Igor Grinberg <grinberg@compulab.co.il> Signed-off-by: Nikita Kiryanov <nikita@compulab.co.il>
* usb: ehci-omap: Don't softreset USB High-speed Host (UHH) ModuleRoger Quadros2013-07-29-12/+15
| | | | | | | | | | | | | | | | | | | | | | Fixes NFS root problems with Beagle (3530 ES1.0) when used with external USB-ethernet adapter and "USB start" command used within u-boot. Soft resetting the UHH module causes instability issues on all OMAPs so we just avoid it. See OMAP36xx Errata i571: USB host EHCI may stall when entering smart-standby mode i660: USBHOST Configured In Smart-Idle Can Lead To a Deadlock On OMAP4/5, soft-resetting the UHH module can put it into Smart-Idle mode and lead to a deadlock. On OMAP3 this doesn't seem to be the case but still instabilities are observed on beagle (3530 ES1.0) if soft-reset is used. e.g. NFS root failures with Linux kernel. Signed-off-by: Roger Quadros <rogerq@ti.com>
* usb: ehci: Split out struct ehci_ctrl definitionMarek Vasut2013-07-29-10/+14
| | | | | | | | | | | | Move the struct ehci_ctrl defition from ehci-hcd.c into ehci.h so it can be re-used by drivers. In particular, the mv_udc driver can benefit from this move. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Fabio Estevam <fabio.estevam@freescale.com> Cc: Lei Wen <leiwen@marvell.com> Cc: Otavio Salvador <otavio@ossystems.com.br> Cc: Stefano Babic <sbabic@denx.de>
* Add GPL-2.0+ SPDX-License-Identifier to source filesWolfgang Denk2013-07-24-373/+27
| | | | | | Signed-off-by: Wolfgang Denk <wd@denx.de> [trini: Fixup common/cmd_io.c] Signed-off-by: Tom Rini <trini@ti.com>
* Merge branch 'master' of git://git.denx.de/u-boot-armTom Rini2013-07-12-36/+268
|\ | | | | | | | | | | | | | | | | | | Fix a trivial conflict in arch/arm/dts/exynos5250.dtsi about gpio and serial. Conflicts: arch/arm/dts/exynos5250.dtsi Signed-off-by: Tom Rini <trini@ti.com>
| * ARM: Tegra: USB: EHCI: Add support for Tegra30/Tegra114Jim Lin2013-07-11-36/+268
| | | | | | | | | | | | | | | | | | | | Tegra30 and Tegra114 are compatible except PLL parameters. Tested on Tegra30 Cardhu, and Tegra114 Dalmore platforms. All works well. Signed-off-by: Jim Lin <jilin@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com>
* | usb: ehci: add missing cache managmentStephen Warren2013-06-12-0/+30
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Commit 8f62ca6 "usb: ehci: Support interrupt transfers via periodic list" didn't include any cache management in the new interrupt transfer path. It also added an extra write to or_asynclistaddr in usb_lowlevel_init(), without having flushed out the data there. Add the missing cache management calls, so that the code works again. This allows the USB keyboard on Tegra's Seaboard/Springbank boards to work. Cc: Patrick Georgi <patrick@georgi-clan.de> Cc: Vincent Palatin <vpalatin@chromium.org> Cc: Julius Werner <jwerner@chromium.org> Cc: Simon Glass <sjg@chromium.org> Cc: Marek Vasut <marex@denx.de> Signed-off-by: Stephen Warren <swarren@nvidia.com>
* | usb: ehci: add Faraday USB 2.0 EHCI supportKuo-Jung Su2013-06-12-0/+154
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch adds support to both Faraday FUSBH200 and FOTG210, the differences between Faraday EHCI and standard EHCI are listed bellow: 1. The PORTSC starts at 0x30 instead of 0x44. 2. The CONFIGFLAG(0x40) is not only un-implemented, and also has its address space removed. 3. Faraday EHCI is a TDI design, but it doesn't compatible with the general TDI implementation found at both U-Boot and Linux. 4. The ISOC descriptors differ from standard EHCI in several ways. But since U-boot doesn't support ISOC, we don't have to worry about that. Signed-off-by: Kuo-Jung Su <dantesu@faraday-tech.com> CC: Marek Vasut <marex@denx.de>
* | usb: ehci: add weak-aliased function for PORTSCKuo-Jung Su2013-06-12-4/+13
| | | | | | | | | | | | | | | | | | | | | | | | | | | | There is at least one non-EHCI compliant controller (i.e. Faraday EHCI) not only leave RESERVED and CONFIGFLAG registers un-implemented but also has their address spaces removed. As an result, the PORTSC register of Faraday EHCI always starts from 0x30 instead of 0x44 in standard EHCI. So that we'll need a weak-aliased function for abstraction. Signed-off-by: Kuo-Jung Su <dantesu@faraday-tech.com> CC: Marek Vasut <marex@denx.de>
* | usb: ehci: prevent bad PORTSC register accessKuo-Jung Su2013-06-12-5/+15
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | 1. The 'index' of ehci_submit_root() is not always > 0. e.g. While it gets invoked from usb_get_descriptor(), the 'index' is always a '0'. (See ch.9 of USB2.0) 2. The PORTSC register is not always required, and thus it should only report a port error when necessary. It would cause a port scan failure if the ehci_submit_root() always gets terminated by a port error. Signed-off-by: Kuo-Jung Su <dantesu@faraday-tech.com> CC: Marek Vasut <marex@denx.de>
* | usb: Correct CLEAR_FEATURE code in ehci-hcdSimon Glass2013-06-12-4/+6
|/ | | | | | | | | | | | | | | This commit broke USB2 on link (Chromebook Pixel): 020bbcb usb: hub: Power-cycle on root-hub ports However the root cause seems to be a missing mask and missing 'break' in ehci-hcd.c. This patch fixes both. On link, 'usb start' with a USB keyboard and memory stick inserted now finds both. The keyboard works as expected. Also ext2ls shows a directory listing from the memory stick. Signed-off-by: Simon Glass <sjg@chromium.org>
* Merge branch 'u-boot/master' into 'u-boot-arm/master'Albert ARIBAUD2013-05-30-35/+44
|\ | | | | | | | | | | Conflicts: common/cmd_fpga.c drivers/usb/host/ohci-at91.c
| * usb: common: Use a global definition for 'min3'Vivek Gautam2013-05-06-10/+0
| | | | | | | | | | | | | | | | | | We can use a common global method for calculating minimum of 3 numbers. Put the same in 'common header' and let 'ehci' use it. Signed-off-by: Vivek Gautam <gautam.vivek@samsung.com> Acked-by: Tom Rini <trini@ti.com>
| * USB: ohci-at91: make OHCI work on at91sam9g10 SoCBo Shen2013-05-05-2/+2
| | | | | | | | | | | | The at91sam9g10 need to configure HCK0 to make OHCI work Signed-off-by: Bo Shen <voice.shen@atmel.com>
| * usb: Add new command to set USB 2.0 port test modesJulius Werner2013-05-05-11/+14
| | | | | | | | | | | | | | | | | | This patch adds a new 'usb test' command, that will set a port to a USB 2.0 test mode (see USB 2.0 spec 7.1.20). It supports all five test modes on both downstream hub ports and ordinary device's upstream ports. In addition, it supports EHCI root hub ports. Signed-off-by: Julius Werner <jwerner@chromium.org>
generated by cgit v1.1 at 2024-11-06 19:27:22 +0000