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* da8xx/hawkboard: Add support for ohci host controllerSughosh Ganu2012-09-01-0/+49
| | | | | | | | | | Also enable the ohci port on hawkboard. These additions result in an increased u-boot size -- adjust the same accordingly in the board's config. Move the usb header for da8xx platforms under arch-davinci. Signed-off-by: Sughosh Ganu <urwithsughosh@gmail.com>
* mxs: prefix register structs with 'mxs' prefixOtavio Salvador2012-09-01-8/+8
| | | | Signed-off-by: Otavio Salvador <otavio@ossystems.com.br>
* mxs: prefix register acessor macros with 'mxs' prefixOtavio Salvador2012-09-01-4/+4
| | | | | | | As the register accessing mode is the same for all i.MXS SoCs we ought to use 'mxs' prefix intead of 'mx28'. Signed-off-by: Otavio Salvador <otavio@ossystems.com.br>
* i.mx: iomux-v3.h: move to imx-common include directoryTroy Kisky2012-07-31-1/+1
| | | | Signed-off-by: Troy Kisky <troy.kisky@boundarydevices.com>
* ehci-hcd: change debug() to printf() in case of errorsIlya Yanok2012-07-18-3/+3
| | | | | | Printing message could be useful if something goes really wrong. Signed-off-by: Ilya Yanok <ilya.yanok@cogentembedded.com>
* ehci-hcd: fix external buffer cache handlingIlya Yanok2012-07-18-9/+14
| | | | | | | | | | | | | | | | | | | | | | | Buffer coming from upper layers should be cacheline aligned/padded to perform safe cache operations. For now we don't do bounce buffering so getting unaligned buffer is an upper layer error. We can't check if the buffer is properly padded with current interface so just assume it is (consider changing with in the future). The following changes are done: 1. Remove useless length alignment check. We get actual transfer length not the size of the underlying buffer so it's perfectly valid for it to be unaligned. 2. Move flush_dcache_range() out of while loop or it will flush too much. 3. Don't try to fix buffer address before calling invalidate: if it's unaligned it's an error anyway so let cache subsystem cry about that. 4. Fix end buffer address to be cacheline aligned assuming upper layer reserved enough space. This is potentially dangerous operation so upper layers should be careful about that. Signed-off-by: Ilya Yanok <ilya.yanok@cogentembedded.com>
* ehci-hcd.c, musb_core, usb.h: Add USB_DMA_MINALIGN define for cache alignmentTom Rini2012-07-18-29/+32
| | | | | | | | | | | | | | | | | | The USB spec says that 32 bytes is the minimum required alignment. However on some platforms we have a larger minimum requirement for cache coherency. In those cases, use that value rather than the USB spec minimum. We add a cpp check to <usb.h> to define USB_DMA_MINALIGN and make use of it in ehci-hcd.c and musb_core.h. We cannot use MAX() here as we are not allowed to have tests inside of align(...). Signed-off-by: Tom Rini <trini@ti.com> [marek.vasut]: introduce some crazy macro voodoo Signed-off-by: Marek Vasut <marex@denx.de> [ilya.yanok]: moved external buffer fixes to separate patch, we use {ALLOC,DEFINE}_ALIGN_BUFFER macros with alignment of USB_DMA_MINALIGN for qh_list, qh and qtd structures to make sure they are proper aligned for both controller and cache operations. Signed-off-by: Ilya Yanok <ilya.yanok@cogentembedded.com>
* ehci-hcd: program asynclistaddr before every transferIlya Yanok2012-07-18-5/+3
| | | | | | | | | | | | Move or_asynclistaddr programming to ehci_submit_async() function to make sure queue head is properly programmed before every transfer. This solves the problem with changing qh address. Also remove unneeded qh_list->qh_link reprogramming at the end of transfer. Signed-off-by: Ilya Yanok <ilya.yanok@cogentembedded.com>
* ehci-omap: Do not call dcache_off from omap_ehci_hcd_initTom Rini2012-07-18-1/+0
| | | | | | | | | This has never been completely sufficient and now happens too late to paper over the cache coherency problems with the current USB stack. Cc: Marek Vasut <marex@denx.de> Signed-off-by: Tom Rini <trini@ti.com> Signed-off-by: Ilya Yanok <ilya.yanok@cogentembedded.com>
* Merge branch 'master' of git://git.denx.de/u-boot-armWolfgang Denk2012-07-10-1/+17
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | * 'master' of git://git.denx.de/u-boot-arm: tegra: define fdt_load/fdt_high variables tegra: enable bootz command tegra: usb: Fix device enumeration problem of USB1 tegra: trimslice: set up serial flash pinmux tegra: add pin_mux_spi() board initialization function tegra: add GMC/GMD funcmux entry for SFLASH tegra: bootcmd: start USB only when needed tegra: bootcmd enhancements tegra: add enterrcm command tegra: enable CONFIG_ENV_VARS_UBOOT_CONFIG Add env vars describing U-Boot target board tegra: usb: fix wrong error check tegra: add ULPI on USB2 funcmux entry tegra: fix leftover CONFIG_TEGRA2_MMC & _SPI build switches tegra: Add Tamonten Evaluation Carrier support tegra: Use SD write-protect GPIO on Tamonten tegra: Implement gpio_early_init() on Tamonten tegra: Allow boards to perform early GPIO setup tegra: plutux: Add device tree support tegra: medcom: Add device tree support tegra: Rework Tamonten support beagle: add eeprom expansion board info for bct brettl4 Signed-off-by: Wolfgang Denk <wd@denx.de>
| * tegra: usb: Fix device enumeration problem of USB1Jim Lin2012-07-09-1/+17
| | | | | | | | | | | | | | | | | | | | | | | | | | | | A known hardware issue of USB1 port where bit 1 (connect status change) of PORTSC register will be set after issuing Port Reset (like "usb reset" in u-boot command line). This will be treated as an error and stops later device enumeration. Therefore we clear that bit after Port Reset in order to proceed later device enumeration. Signed-off-by: Jim Lin <jilin@nvidia.com> Acked-by: Stephen Warren <swarren@wwwdotorg.org> Signed-off-by: Tom Warren <twarren@nvidia.com>
* | EXYNOS: Add power Enable/Disable for USB-EHCIRajeshwari Shinde2012-07-09-0/+5
| | | | | | | | | | | | | | | | | | This patch adds functions to enable/disable the power of USB host controller for EXYNOS5. Signed-off-by: Vivek Gautam <gautam.vivek@samsung.com> Signed-off-by: Che-Liang Chiou <clchiou@chromium.org> Signed-off-by: Rajeshwari Shinde <rajeshwari.s@samsung.com>
* | USB: EXYNOS: Set USB 2.0 HOST Link modeRajeshwari Shinde2012-07-09-0/+3
| | | | | | | | | | | | | | This patch adds a function to set usb host mode to USB 2.0 HOST Link for EXYNOS5 Signed-off-by: Rajeshwari Shinde <rajeshwari.s@samsung.com>
* | USB: EXYNOS: Incorporate EHCI review commentsRajeshwari Shinde2012-07-09-10/+10
|/ | | | | | | This patch incorates the review comments given by Minkyu Kang for EHCI support on EXYNOS Signed-off-by: Rajeshwari Shinde <rajeshwari.s@samsung.com>
* ehci-atmel: fix compiler warningAndreas Bießmann2012-07-07-2/+2
| | | | | | | | | | | | | | | | Commit 7a101e946cba55e32d3d1265e30456c810046da3 introduced following warning: ---8<--- ehci-atmel.c: In function 'ehci_hcd_init': ehci-atmel.c:49:2: warning: suggest parentheses around comparison in operand of '&' [-Wparentheses] ehci-atmel.c: In function 'ehci_hcd_stop': ehci-atmel.c:79:2: warning: suggest parentheses around comparison in operand of '&' [-Wparentheses] --->8--- This patch fixes it. Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com> cc: Bo Shen <voice.shen@atmel.com> cc: Marek Vasut <marex@denx.de>
* Atmel : usb : add EHCI driver for Atmel SoCBo Shen2012-07-07-0/+90
| | | | | | | | | | | | | | | Some Atmel SoC support USB EHCI, add the EHCI driver to support it. To enable the USB EHCI, add the following configuration options into board relative configuration file and remove USB OHCI options. #define CONFIG_USB_EHCI #define CONFIG_USB_EHCI_ATMEL #define CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTS 2 Signed-off-by: Bo Shen <voice.shen@atmel.com> Acked-by: Marek Vasut <marex@denx.de> Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
* Merge branch 'master' of git://git.denx.de/u-boot-usbWolfgang Denk2012-05-20-191/+208
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | * 'master' of git://git.denx.de/u-boot-usb: USB: S5P: Add ehci support usb:udc:samsung Add functions for storing private gadget data in UDC driver usb:gadget:composite: Support for composite at gadget.h usb:gadget:composite USB composite gadget support usb:udc:samsung:cleanup Replace DEBUG_* macros with debug_cond() calls usb:udc: Remove duplicated USB definitions from include/linux/usb/ch9.h file USB: Document the QH and qTD antics in EHCI-HCD USB: Drop cache flush bloat in EHCI-HCD USB: Drop ehci_alloc/ehci_free in ehci-hcd USB: Align buffers at cacheline usb: use noinline define
| * USB: S5P: Add ehci supportRajeshwari Shinde2012-05-20-0/+111
| | | | | | | | | | | | | | This patch adds ehci driver support for s5p. Signed-off-by: Vivek Gautam <gautam.vivek@samsung.com> Signed-off-by: Rajeshwari Shinde <rajeshwari.s@samsung.com>
| * USB: Document the QH and qTD antics in EHCI-HCDMarek Vasut2012-05-20-0/+38
| | | | | | | | | | | | | | | | The construction of QH and qTD lists in ehci_submit_async() call is cryptic business, add at least a bit of comments so if someone is reading it, he can at least reference the intel ehci manual (ehci-r10.pdf). Signed-off-by: Marek Vasut <marek.vasut@gmail.com>
| * USB: Drop cache flush bloat in EHCI-HCDMarek Vasut2012-05-20-100/+27
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Discard the creepy cache flushing mechanisms in ehci-hcd.c and replace them with more straightforward flushing. In the new approach, the flushing takes place directly in ehci_submit_async() call instead of going through the QH list and flushing all members and buffers. This discards a lot of weird bit operations on the members of QH and qTD structures. NOTE: Certainly, this flushes even qTDs which are possibly unused in some transactions, though the overhead of the previous code was much higher than is the overhead of flushing two more cache lines (which most probably aren't even cached). Signed-off-by: Marek Vasut <marek.vasut@gmail.com>
| * USB: Drop ehci_alloc/ehci_free in ehci-hcdMarek Vasut2012-05-20-91/+32
| | | | | | | | | | | | | | | | These two functions were called only from ehci_submit_async(), therefore dissolve them as part of ehci_submit_async() to get rid of all those static variables. Signed-off-by: Marek Vasut <marex@denx.de>
* | imx: usb: There is no such registerTimo Ketola2012-05-15-2/+0
| | | | | | | | | | | | | | | | | | The reference manual of i.MX25 (nor i.MX31) does not define such register. This seems to access read only UH2_CAPLENGTH register (if CONFIG_MXC_USB_PORT is zero). Signed-off-by: Timo Ketola <timo@exertus.fi> Acked-by: Stefano Babic <sbabic@denx.de>
* | i.MX25: usb: Set PORTSCx registerTimo Ketola2012-05-15-2/+0
| | | | | | | | | | | | | | | | | | The USB controller in i.MX25 has a PORTSCx registers which should be set. In this regard it is similar to the controller in i.MX31. As this file is compiled only with i.MX25 and -31, #ifdef check can be removed. Signed-off-by: Timo Ketola <timo@exertus.fi> Acked-by: Stefano Babic <sbabic@denx.de>
* | USB: ehci-mx6: Fix broken IO accessWolfgang Grandegger2012-05-15-2/+3
|/ | | | | | | | | | To get USB working again on the i.MX6, this patch fixes a bug introduced with commit 522b2a0 "Add proper IO accessors for mx6 usb registers.". At that occasion, I also added the missing __iomem directive. Cc: Marek Vasut <marex@denx.de> CC: Fabio Estevam <festevam@gmail.com> Signed-off-by: Wolfgang Grandegger <wg@denx.de>
* ehci-omap: fix for enabling the correct usb portJeroen Hofstee2012-04-21-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This is just a patch for the problem reported here: http://lists.denx.de/pipermail/u-boot/2012-February/117580.html originally reported by Igor. "Looks like this is copy paste error from my side,(for port2/3 it should have been bypass for port2/3 rather its port1 set in bypass mode)" I only submit the patch since it is missing in 2012.04-rc3 while the twister board depends on it. Maybe it is already somewhere in the reposistory, but I cannot find it. note: the twister boards still needs an additional `usb reset`, don't know why. U-Boot 2012.04-rc3-dirty (Apr 19 2012 - 21:38:38) AM35XX-GP ES1.0, CPU-OPP2, L3-165MHz, Max CPU Clock 600 Mhz TAM3517 TWISTER Board + LPDDR/NAND I2C: ready DRAM: 256 MiB NAND: 512 MiB MMC: OMAP SD/MMC: 0 In: serial Out: serial Err: serial Die ID #746c0000000000000155dc1405011024 Net: DaVinci-EMAC, smc911x-0 Hit any key to stop autoboot: 0 twister => usb start (Re)start USB... USB: Register 1313 NbrPorts 3 USB EHCI 1.00 scanning bus for devices... 1 USB Device(s) found scanning bus for storage devices... 0 Storage Device(s) found twister => usb reset (Re)start USB... USB: Register 1313 NbrPorts 3 USB EHCI 1.00 scanning bus for devices... 1 USB Device(s) found scanning bus for storage devices... 0 Storage Device(s) found twister => usb reset (Re)start USB... USB: Register 1313 NbrPorts 3 USB EHCI 1.00 scanning bus for devices... 1 USB Device(s) found scanning bus for storage devices... 0 Storage Device(s) found twister => usb reset (Re)start USB... USB: Register 1313 NbrPorts 3 USB EHCI 1.00 scanning bus for devices... 1 USB Device(s) found scanning bus for storage devices... 0 Storage Device(s) found Signed-off-by: Jeroen Hofstee <jeroen@myspectrum.nl> Acked-by: Govindraj.R <govindraj.raja <at> ti.com> Acked-by: Tom Rini <trini@ti.com>
* Prepare v2012.04-rc2; minor Coding Style cleanupWolfgang Denk2012-04-16-1/+0
| | | | Signed-off-by: Wolfgang Denk <wd@denx.de>
* tegra: usb: Add support for Tegra USB peripheralSimon Glass2012-03-29-0/+63
| | | | | | | | | | | | | | | | | | This adds basic support for the Tegra2 USB controller. Board files should call board_usb_init() to set things up. Configuration is performed through the FDT, with aliases used to set the order of the ports, like this fragment: aliases { /* This defines the order of our USB ports */ usb0 = "/usb@0xc5008000"; usb1 = "/usb@0xc5000000"; }; drivers/usb/host files ONLY: Acked-by: Remy Bohmer <linux@bohmer.net> Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com>
* usb: Add support for txfifo thresholdSimon Glass2012-03-29-1/+12
| | | | | | | | | CONFIG_USB_EHCI_TXFIFO_THRESH enables setting of the txfilltuning field in the EHCI controller on reset. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Remy Bohmer <linux@bohmer.net> Signed-off-by: Tom Warren <twarren@nvidia.com>
* USB: ehci-mx6: Add proper IO accessorsFabio Estevam2012-03-27-9/+4
| | | | | | | | | Add proper IO accessors for mx6 usb registers. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> Acked-by: Stefano Babic <sbabic@denx.de> Acked-by: Marek Vasut <marex@denx.de> Acked-by: Jason Liu <r64343@freescale.com>
* Renamed mx28_register to mx28_register_32 to prepare for mx28_register_8Robert Delien2012-03-26-4/+4
| | | | | | | | | This patch renames mx28_register to mx28_register_32 in order to prepare for the introduction of an 8-bit register, mx28_register_8. Signed-off-by: Robert Delien <robert@delien.nl> Acked-by: Marek Vasut <marex@denx.de> Tested-by: Marek Vasut <marex@denx.de>
* usb/ehci: Add USB support for the MX6QWolfgang Grandegger2012-03-26-0/+206
| | | | | | | Currently, only USB Host 1 is supported. Cc: Remy Bohmer <linux@bohmer.net> Signed-off-by: Wolfgang Grandegger <wg@denx.de>
* USB: Armada100: EHCI Driver for Armada100 SOCsAjay Bhargav2012-03-19-0/+65
| | | | | | This patch adds support for USB EHCI driver for Armada100 SOCs. Signed-off-by: Ajay Bhargav <ajay.bhargav@einfochips.com>
* USB: Armada100: Add UTMI PHY interface driverAjay Bhargav2012-03-19-0/+96
| | | | | | | This patch adds USB host controller's UTMI PHY interface driver for Armada100 SOCs. Signed-off-by: Ajay Bhargav <ajay.bhargav@einfochips.com>
* usb: replace wait_ms() with mdelay()Mike Frysinger2012-03-19-29/+29
| | | | | | | | | | | | | | | | | | | | | | | Common code has a mdelay() func, so use that instead of the usb-specific wait_ms() func. This also fixes the build errors: ohci-hcd.c: In function 'submit_common_msg': /usr/local/src/u-boot/blackfin/include/usb.h:202:44: sorry, unimplemented: inlining failed in call to 'wait_ms': function body not available ohci-hcd.c:1519:9: sorry, unimplemented: called from here /usr/local/src/u-boot/blackfin/include/usb.h:202:44: sorry, unimplemented: inlining failed in call to 'wait_ms': function body not available ohci-hcd.c:1816:10: sorry, unimplemented: called from here /usr/local/src/u-boot/blackfin/include/usb.h:202:44: sorry, unimplemented: inlining failed in call to 'wait_ms': function body not available ohci-hcd.c:1827:10: sorry, unimplemented: called from here /usr/local/src/u-boot/blackfin/include/usb.h:202:44: sorry, unimplemented: inlining failed in call to 'wait_ms': function body not available ohci-hcd.c:1844:10: sorry, unimplemented: called from here /usr/local/src/u-boot/blackfin/include/usb.h:202:44: sorry, unimplemented: inlining failed in call to 'wait_ms': function body not available ohci-hcd.c:1563:11: sorry, unimplemented: called from here /usr/local/src/u-boot/blackfin/include/usb.h:202:44: sorry, unimplemented: inlining failed in call to 'wait_ms': function body not available ohci-hcd.c:1583:9: sorry, unimplemented: called from here make[1]: *** [ohci-hcd.o] Error 1 Signed-off-by: Mike Frysinger <vapier@gentoo.org> Acked-by: Marek Vasut <marex@denx.de>
* USB: move keyboard polling into kbd driveramartin@nvidia.com2012-03-03-42/+0
| | | | | | | | | This moves keyboard polling logic from USB HCD drivers into USB keyboard driver. Remove usb_event_poll() as keyboard polling was the only user of this API. With this patch USB keyboard works with EHCI controllers again. Tested on a tegra2 seaboard. Signed-off-by: Allen Martin <amartin@nvidia.com>
* ehci-omap: Clean up added ehci-omap.cGovindraj.R2012-02-12-55/+154
| | | | | | | | | | | | | | | | | | Clean up added ehci-omap.c and make it generic for re-use across omap-soc having same ehci ip block. Also pass the modes to be configured from board file and configure the ports accordingly. All usb layers are not cache aligned, till then keep cache off for usb ops as ehci will use internally dma for all usb ops. * Add a generic common header ehci-omap.h having common ip block data and reg shifts. * Rename and modify ehci-omap3 to ehci.h retain only conflicting sysc reg shifts remove others and move to common header file. * pass the board data for beagle/panda accordinly to use ehci ports. Acked-by: Igor Grinberg <grinberg@compulab.co.il> Signed-off-by: Govindraj.R <govindraj.raja@ti.com>
* ehci-omap: driver for EHCI host on OMAP3Ilya Yanok2012-02-12-0/+157
| | | | | | | Taken from Beagle code. Tested on mcx board (AM3517-based). Signed-off-by: Ilya Yanok <yanok@emcraft.com> Tested-by: Stefano Babic <sbabic@denx.de>
* orion5x: add USB host ehci-marvell supportAlbert ARIBAUD2012-02-12-0/+5
| | | | Signed-off-by: Albert ARIBAUD <albert.u.boot@aribaud.net>
* Remove kirkwood-specifics from marvell EHCI driverAlbert ARIBAUD2012-02-12-14/+17
| | | | Signed-off-by: Albert ARIBAUD <albert.u.boot@aribaud.net>
* Rename ehci-kirkwood as ehci-marvellAlbert ARIBAUD2012-02-12-1/+1
| | | | | Signed-off-by: Albert ARIBAUD <albert.u.boot@aribaud.net> Signed-off-by: Prafulla Wadaskar <prafulla@marvell.com>
* Coding Style cleanupWolfgang Denk2011-12-19-2/+0
| | | | | | | Fix trailing white space, indentation by spaces instead of TABs, excessive blank lines, trailing blank lines. Signed-off-by: Wolfgang Denk <wd@denx.de>
* USB: EHCI: Allow EHCI post-powerup configuration in board filesMarek Vasut2011-12-11-2/+10
| | | | | | | | | | | This patch allows USB to work on some hosts, which need additional frobing after the host was powered up via regular USB powerup sequence. Signed-off-by: Marek Vasut <marek.vasut@gmail.com> Cc: Stefano Babic <sbabic@denx.de> Cc: Remy Bohmer <linux@bohmer.net> Cc: Wolfgang Grandegger <wg@denx.de> Cc: Jason Liu <r64343@freescale.com>
* USB: MX5: Add MX5 usb post-init callbackMarek Vasut2011-12-11-2/+12
| | | | | | | | | | This is useful for USB Transceivers init etc. Signed-off-by: Marek Vasut <marek.vasut@gmail.com> Cc: Stefano Babic <sbabic@denx.de> Cc: Remy Bohmer <linux@bohmer.net> Cc: Wolfgang Grandegger <wg@denx.de> Cc: Jason Liu <r64343@freescale.com>
* USB: MX5: Abstract out mx51 USB pixmux configurationMarek Vasut2011-12-11-0/+71
| | | | | | | | Signed-off-by: Marek Vasut <marek.vasut@gmail.com> Cc: Stefano Babic <sbabic@denx.de> Cc: Remy Bohmer <linux@bohmer.net> Cc: Wolfgang Grandegger <wg@denx.de> Cc: Jason Liu <r64343@freescale.com>
* USB: MX5: add generic USB EHCI support for mx51 and mx53Wolfgang Grandegger2011-12-11-0/+175
| | | | | | | | | | | It's derived from ehci-mxc and uses the header files of the ehci-fsl interface. The callback board_ehci_hcd_init() has been introduced to allow for board-specific setup when USB is started. Signed-off-by: Wolfgang Grandegger <wg@denx.de> CC: Stefano Babic <sbabic@denx.de> CC: Remy Bohmer <linux@bohmer.net>
* ehci: speed up initializationVincent Palatin2011-12-11-1/+1
| | | | | | | | | | According to EHCI specification v1.0, the controller should stabilize the power on a port at most 20 ms after the port power bit transition. So, we put this setting in the virtual descriptor corresponding field, (bPwrOn2PwrGood = 10 => 10 x 2ms = 20ms), this saves about 500ms at each controller initialization/enumeration. Signed-off-by: Vincent Palatin <vpalatin@chromium.org>
* USB: Add usb_event_poll() to get keyboards working with EHCIMarek Vasut2011-12-11-1/+32
| | | | | Signed-off-by: Marek Vasut <marek.vasut@gmail.com> Cc: Remy Bohmer <linux@bohmer.net>
* USB: Fix complaints about strict aliasing in OHCI-HCDMarek Vasut2011-12-11-32/+43
| | | | Signed-off-by: Marek Vasut <marek.vasut@gmail.com>
* drivers/usb/host/ehci-mxc.c: Fix GCC 4.6 warningAnatolij Gustschin2011-12-09-2/+1
| | | | | | | | | Fix: ehci-mxc.c: In function 'ehci_hcd_init': ehci-mxc.c:113:6: warning: variable 'tmp' set but not used [-Wunused-but-set-variable] Signed-off-by: Anatolij Gustschin <agust@denx.de>
* drivers/usb/host/sl811-hcd.c: Fix GCC 4.6 build warningWolfgang Denk2011-12-02-7/+5
| | | | | | | | | | Fix: sl811-hcd.c: In function 'sl811_rh_submit_urb': sl811-hcd.c:556:8: warning: variable 'wIndex' set but not used [-Wunused-but-set-variable] Signed-off-by: Wolfgang Denk <wd@denx.de> Cc: Remy Bohmer <linux@bohmer.net>
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