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* usb: ehci: Split out struct ehci_ctrl definitionMarek Vasut2013-07-29-10/+14
| | | | | | | | | | | | Move the struct ehci_ctrl defition from ehci-hcd.c into ehci.h so it can be re-used by drivers. In particular, the mv_udc driver can benefit from this move. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Fabio Estevam <fabio.estevam@freescale.com> Cc: Lei Wen <leiwen@marvell.com> Cc: Otavio Salvador <otavio@ossystems.com.br> Cc: Stefano Babic <sbabic@denx.de>
* Add GPL-2.0+ SPDX-License-Identifier to source filesWolfgang Denk2013-07-24-373/+27
| | | | | | Signed-off-by: Wolfgang Denk <wd@denx.de> [trini: Fixup common/cmd_io.c] Signed-off-by: Tom Rini <trini@ti.com>
* Merge branch 'master' of git://git.denx.de/u-boot-armTom Rini2013-07-12-36/+268
|\ | | | | | | | | | | | | | | | | | | Fix a trivial conflict in arch/arm/dts/exynos5250.dtsi about gpio and serial. Conflicts: arch/arm/dts/exynos5250.dtsi Signed-off-by: Tom Rini <trini@ti.com>
| * ARM: Tegra: USB: EHCI: Add support for Tegra30/Tegra114Jim Lin2013-07-11-36/+268
| | | | | | | | | | | | | | | | | | | | Tegra30 and Tegra114 are compatible except PLL parameters. Tested on Tegra30 Cardhu, and Tegra114 Dalmore platforms. All works well. Signed-off-by: Jim Lin <jilin@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com>
* | usb: ehci: add missing cache managmentStephen Warren2013-06-12-0/+30
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Commit 8f62ca6 "usb: ehci: Support interrupt transfers via periodic list" didn't include any cache management in the new interrupt transfer path. It also added an extra write to or_asynclistaddr in usb_lowlevel_init(), without having flushed out the data there. Add the missing cache management calls, so that the code works again. This allows the USB keyboard on Tegra's Seaboard/Springbank boards to work. Cc: Patrick Georgi <patrick@georgi-clan.de> Cc: Vincent Palatin <vpalatin@chromium.org> Cc: Julius Werner <jwerner@chromium.org> Cc: Simon Glass <sjg@chromium.org> Cc: Marek Vasut <marex@denx.de> Signed-off-by: Stephen Warren <swarren@nvidia.com>
* | usb: ehci: add Faraday USB 2.0 EHCI supportKuo-Jung Su2013-06-12-0/+154
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch adds support to both Faraday FUSBH200 and FOTG210, the differences between Faraday EHCI and standard EHCI are listed bellow: 1. The PORTSC starts at 0x30 instead of 0x44. 2. The CONFIGFLAG(0x40) is not only un-implemented, and also has its address space removed. 3. Faraday EHCI is a TDI design, but it doesn't compatible with the general TDI implementation found at both U-Boot and Linux. 4. The ISOC descriptors differ from standard EHCI in several ways. But since U-boot doesn't support ISOC, we don't have to worry about that. Signed-off-by: Kuo-Jung Su <dantesu@faraday-tech.com> CC: Marek Vasut <marex@denx.de>
* | usb: ehci: add weak-aliased function for PORTSCKuo-Jung Su2013-06-12-4/+13
| | | | | | | | | | | | | | | | | | | | | | | | | | | | There is at least one non-EHCI compliant controller (i.e. Faraday EHCI) not only leave RESERVED and CONFIGFLAG registers un-implemented but also has their address spaces removed. As an result, the PORTSC register of Faraday EHCI always starts from 0x30 instead of 0x44 in standard EHCI. So that we'll need a weak-aliased function for abstraction. Signed-off-by: Kuo-Jung Su <dantesu@faraday-tech.com> CC: Marek Vasut <marex@denx.de>
* | usb: ehci: prevent bad PORTSC register accessKuo-Jung Su2013-06-12-5/+15
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | 1. The 'index' of ehci_submit_root() is not always > 0. e.g. While it gets invoked from usb_get_descriptor(), the 'index' is always a '0'. (See ch.9 of USB2.0) 2. The PORTSC register is not always required, and thus it should only report a port error when necessary. It would cause a port scan failure if the ehci_submit_root() always gets terminated by a port error. Signed-off-by: Kuo-Jung Su <dantesu@faraday-tech.com> CC: Marek Vasut <marex@denx.de>
* | usb: Correct CLEAR_FEATURE code in ehci-hcdSimon Glass2013-06-12-4/+6
|/ | | | | | | | | | | | | | | This commit broke USB2 on link (Chromebook Pixel): 020bbcb usb: hub: Power-cycle on root-hub ports However the root cause seems to be a missing mask and missing 'break' in ehci-hcd.c. This patch fixes both. On link, 'usb start' with a USB keyboard and memory stick inserted now finds both. The keyboard works as expected. Also ext2ls shows a directory listing from the memory stick. Signed-off-by: Simon Glass <sjg@chromium.org>
* Merge branch 'u-boot/master' into 'u-boot-arm/master'Albert ARIBAUD2013-05-30-35/+44
|\ | | | | | | | | | | Conflicts: common/cmd_fpga.c drivers/usb/host/ohci-at91.c
| * usb: common: Use a global definition for 'min3'Vivek Gautam2013-05-06-10/+0
| | | | | | | | | | | | | | | | | | We can use a common global method for calculating minimum of 3 numbers. Put the same in 'common header' and let 'ehci' use it. Signed-off-by: Vivek Gautam <gautam.vivek@samsung.com> Acked-by: Tom Rini <trini@ti.com>
| * USB: ohci-at91: make OHCI work on at91sam9g10 SoCBo Shen2013-05-05-2/+2
| | | | | | | | | | | | The at91sam9g10 need to configure HCK0 to make OHCI work Signed-off-by: Bo Shen <voice.shen@atmel.com>
| * usb: Add new command to set USB 2.0 port test modesJulius Werner2013-05-05-11/+14
| | | | | | | | | | | | | | | | | | This patch adds a new 'usb test' command, that will set a port to a USB 2.0 test mode (see USB 2.0 spec 7.1.20). It supports all five test modes on both downstream hub ports and ordinary device's upstream ports. In addition, it supports EHCI root hub ports. Signed-off-by: Julius Werner <jwerner@chromium.org>
| * USB: EHCI: Add weak functions to support new chipJim Lin2013-05-05-12/+28
| | | | | | | | | | | | | | Add ehci_get_port_speed() and ehci_set_usbmode() weak functions for platform driver to support new chip. Signed-off-by: Jim Lin <jilin@nvidia.com>
* | USB: ohci-at91: support sama5d3x devicesBo Shen2013-05-21-2/+12
| | | | | | | | | | | | | | Add OHCI support for sama5d3x devices Signed-off-by: Bo Shen <voice.shen@atmel.com> Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
* | imx: mx5: Remove legacy iomux supportBenoît Thébaudeau2013-05-05-73/+0
|/ | | | | | | | Legacy iomux support is no longer needed now that all boards have been converted to iomux-v3. Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com> Reviewed-by: Marek Vasut <marex@denx.de>
* arm: Remove support for unused s3c64xxBenoît Thébaudeau2013-04-12-47/+0
| | | | | | | | Following the removal of the smdk6400 board, the s3c64xx SoC becomes unused, so remove associated code. It will still be possible to restore it later from the Git history if necessary. Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com>
* Merge branch 'master' of git://git.denx.de/u-boot-usbTom Rini2013-03-18-40/+455
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| * usb: Add multiple controllers support for EHCI PCIVincent Palatin2013-03-18-9/+16
| | | | | | | | | | | | | | Use the ability to have several active EHCI controller on a system in the PCI EHCI controller implementation. Signed-off-by: Simon Glass <sjg@chromium.org>
| * usb: ehci: Fix aliasing issue in EHCI interrupt codeVincent Palatin2013-03-18-1/+1
| | | | | | | | | | | | | | | | | | | | The interrupt endpoint handling code stores the buffer pointer in the QH padding field. We need to make it the size of a pointer to avoid strict aliasing issue with the compiler. Signed-off-by: Vincent Palatin <vpalatin@chromium.org> Signed-off-by: Simon Glass <sjg@chromium.org>
| * usb: ehci: Support interrupt transfers via periodic listPatrick Georgi2013-03-18-5/+316
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Interrupt transfers aren't meant to be used from the async list (the EHCI spec indicates trouble with low/full-speed intr on async). Build a periodic list instead, and provide an API to make use of it. Then, use that API from the existing interrupt transfer API. This provides support for USB keyboards using EHCI. Use timeouts to ensure we cannot get stuck in the keyboard scanning if something wrong happens (USB device unplugged or fatal I/O error) Signed-off-by: Vincent Palatin <vpalatin@chromium.org> Signed-off-by: Julius Werner <jwerner@chromium.org> Signed-off-by: Simon Glass <sjg@chromium.org>
| * usb: ehci: exynos: Enable non-dt pathVivek Gautam2013-03-18-0/+7
| | | | | | | | | | | | | | | | Enabling the non-dt path for the driver so that we don't get any build errors for non-dt configuration. Signed-off-by: Vivek Gautam <gautam.vivek@samsung.com> Acked-by: Simon Glass <sjg@chromium.org>
| * usb: ehci: exynos: Fix multiple FDT decodeVivek Gautam2013-03-18-28/+16
| | | | | | | | | | | | | | | | | | | | With current FDT support driver tries to parse device node twice in ehci_hcd_init() and ehci_hcd_stop(), which shouldn't happen ideally. Making provision to store data in a global structure and thereby passing its pointer when needed. Signed-off-by: Vivek Gautam <gautam.vivek@samsung.com>
| * usb/host/ehci: Add support for EHCI on spearVipin Kumar2013-03-16-0/+60
| | | | | | | | | | | | | | Add EHCI support for spear boards Signed-off-by: Armando Visconti <armando.visconti@st.com> Signed-off-by: Vipin Kumar <vipin.kumar@st.com>
| * usb: ehci: Add 64-bit controller supportVincent Palatin2013-03-16-0/+3
| | | | | | | | | | | | | | | | On EHCI controller with 64-bit address space support, we must initialize properly the high word for the PCI bus master accesses. Signed-off-by: Vincent Palatin <vpalatin@chromium.org> Signed-off-by: Simon Glass <sjg@chromium.org>
| * usb: ehci: generic PCI supportVincent Palatin2013-03-16-1/+40
| | | | | | | | | | | | | | | | | | Instead of hardcoding the PCI IDs on the USB controller, use the PCI class to detect them. Ensure the busmaster bit is properly set in the PCI configuration. Signed-off-by: Simon Glass <sjg@chromium.org>
* | Merge branch 'u-boot-tegra/master' into 'u-boot-arm/master'Albert ARIBAUD2013-03-15-16/+530
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| * | tegra: usb: move [start|stop]_port into ehci_hcd_[init|stop]Lucas Stach2013-03-14-68/+51
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The ehci_hcd entry points were just calling into the Tegra USB functions. Now that they are in the same file we can just move over the implementation. Signed-off-by: Lucas Stach <dev@lynxeye.de> Acked-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com>
| * | tegra: usb: move implementation into right directoryLucas Stach2013-03-14-2/+533
| |/ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This moves the Tegra USB implementation into the drivers/usb/host directory. Note that this merges the old /arch/arm/cpu/armv7/tegra20/usb.c file into ehci-tegra.c. No code changes, just moving stuff around. v2: While at it also move some defines and the usb.h header file to make usb driver usable for Tegra30. NOTE: A lot more work is required to properly init the PHYs and PLL_U on Tegra30, this is just to make porting easier and it does no harm here. Signed-off-by: Lucas Stach <dev@lynxeye.de> Acked-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com>
* | mxs: Make ehci-mxs multiport capableMarek Vasut2013-03-07-68/+81
| | | | | | | | | | | | | | | | | | | | | | Rework ehci-mxs so it supports both ports on MX28. It was necessary to wrap the per-port configuration into struct ehci_mxs_port and pull out the clock configuration function. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Fabio Estevam <fabio.estevam@freescale.com> Cc: Otavio Salvador <otavio@ossystems.com.br> Cc: Stefano Babic <sbabic@denx.de>
* | mxs: Squash the header file usage in ehci-mxsMarek Vasut2013-03-07-5/+1
| | | | | | | | | | | | | | | | | | | | | | | | The ehci-mxs driver included the register definitions directly. Use imx-regs.h instead since it contains proper handling of the differences between mx23 and mx28. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Fabio Estevam <fabio.estevam@freescale.com> Cc: Otavio Salvador <otavio@ossystems.com.br> Cc: Stefano Babic <sbabic@denx.de> Acked-by: Otavio Salvador <otavio@ossystems.com.br>
* | USB: drop unneeded header in ehci-mx6Stefano Babic2013-03-07-1/+0
|/ | | | | | | | | | | Including header for pads is not needed and breaks board after renaming pin definitions. Series-to: u-boot Series-cc: marex@denx.de,fabio.estevam@freescale.com,eric.nelson@boundarydevices.com Signed-off-by: Stefano Babic <sbabic@denx.de>
* Merge branch 'u-boot-samsung/master' into 'u-boot-arm/master'Albert ARIBAUD2013-01-14-7/+85
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| * EHCI: Exynos: Add fdt supportRajeshwari Shinde2013-01-08-7/+85
| | | | | | | | | | | | | | | | | | Adding fdt support to ehci-exynos in order to parse register base addresses from the device node. Signed-off-by: Vivek Gautam <gautam.vivek@samsung.com> Signed-off-by: Rajeshwari Shinde <rajeshwari.s@samsung.com> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
* | Merge 'u-boot-atmel/master' into 'u-boot-arm/master'Albert ARIBAUD2013-01-09-2/+4
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| * at91sam9x5: enable USB support for 9x5ek board.Richard Genoud2012-12-09-2/+4
| | | | | | | | | | | | Signed-off-by: Richard Genoud <richard.genoud@gmail.com> Acked-by: Bo Shen <voice.shen@atmel.com> Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
* | Merge branch 'master' of git://git.denx.de/u-boot into resolveMinkyu Kang2012-12-10-17/+24
|\ \ | |/ |/| | | | | | | | | | | | | | | | | Conflicts: README board/samsung/universal_c210/universal.c drivers/misc/Makefile drivers/power/power_fsl.c include/configs/mx35pdk.h include/configs/mx53loco.h include/configs/seaboard.h
| * usb: r8a6659: Fix build by missing of parenthesisNobuhiro Iwamatsu2012-11-20-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | By commit c7e3b2b5, this was chanded to support multiple controllers. But this has missing of parenthesis. This commit fix it. ----- r8a66597-hcd.c: In function ‘usb_lowlevel_init’: r8a66597-hcd.c:911:52: error: expected declaration specifiers before ‘)’ token r8a66597-hcd.c:935:1: error: expected ‘=’, ‘,’, ‘;’, ‘asm’ or‘__attribute__’ before ‘{’ token r8a66597-hcd.c:939:1: error: expected ‘{’ at end of input ----- Signed-off-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com> CC: Lucas Stach <dev@lynxeye.de>
| * usb: r8a66597: Switched from variable to only macroNobuhiro Iwamatsu2012-11-20-10/+5
| | | | | | | | | | | | | | | | Some variables are initialized with a value defined by macro. This was changed to use the macro directly. And the variable not to use deleted it. Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
| * usb: use linux/usb/ch9.h instead of usbdescriptors.hIlya Yanok2012-11-20-6/+18
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Linux usb/ch9.h seems to have all the same information (and more) as usbdescriptors.h so use the former instead of the later one. As a consequense of this change USB_SPEED_* values don't correspond directly to EHCI speed encoding anymore, I've added necessary recoding in EHCI driver. Also there is no point to put speed into pipe anymore so it's removed and a bunch of host drivers fixed to look at usb_device->speed instead. Old usbdescriptors.h included is not removed as it seems to be used by old USB device code. This makes usb.h and usbdevice.h incompatible. Fortunately the only place that tries to include both are the old MUSB code and it needs usb.h only for USB_DMA_MINALIGN used in aligned attribute on musb_regs structure but this attribute seems to be unneeded (old MUSB code doesn't support any DMA at all). Signed-off-by: Ilya Yanok <ilya.yanok@cogentembedded.com>
* | ehci-mxc: Fix host power mask bit for i.MX25Benoît Thébaudeau2012-11-19-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | The correct bit for H1_PM is 16, not 8, which is the DP pull-up impedance selection bit. This issue has been reported by Eric Bénard <eric@eukrea.com> and fixed by Christoph Fritz <chf.fritz@googlemail.com> on Linux, from which these #define-s had been copied. Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com> Cc: Stefano Babic <sbabic@denx.de> Cc: Marek Vasut <marex@denx.de>
* | ehci-mxc: Fix host power mask bit for i.MX35Benoît Thébaudeau2012-11-19-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | The correct bit for H1_PM is 16, not 8, which is the DP pull-up impedance selection bit. This issue has been reported by Michael Burkey <mdburkey@gmail.com> and fixed by Christoph Fritz <chf.fritz@googlemail.com> on Linux, from which these #define-s had been copied. Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com> Cc: Stefano Babic <sbabic@denx.de> Cc: Marek Vasut <marex@denx.de> Acked-by: Stefano Babic <sbabic@denx.de>
* | ehci-mx5/6: Make board_ehci_hcd_init() optionalBenoît Thébaudeau2012-11-16-3/+10
| | | | | | | | | | | | | | | | | | | | | | | | A custom board_ehci_hcd_init() may be unneeded, so add a weak default implementation doing nothing. By the way, use simple __weak from linux/compiler.h for board_ehci_hcd_postinit() instead of weak alias with full attribute. Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com> Cc: Marek Vasut <marex@denx.de> Cc: Stefano Babic <sbabic@denx.de>
* | ehci-mxc: Add support for i.MX35Benoît Thébaudeau2012-11-16-0/+69
| | | | | | | | | | | | Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com> Cc: Marek Vasut <marex@denx.de> Cc: Stefano Babic <sbabic@denx.de>
* | ehci-mxc: Define host offsetsBenoît Thébaudeau2012-11-16-1/+1
| | | | | | | | | | | | | | | | | | | | Some MXC SoCs like the i.MX35 have hosts located at unusual offsets, so prepare to the introduction of i.MX35 support by defining the ehci-mxc hosts offsets at SoC level. Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com> Cc: Marek Vasut <marex@denx.de> Cc: Stefano Babic <sbabic@denx.de>
* | ehci-mxc: Make i.MX25 EHCI configurableBenoît Thébaudeau2012-11-16-8/+64
| | | | | | | | | | | | | | | | | | Use EHCI MXC configuration options for i.MX25. Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com> Cc: Marek Vasut <marex@denx.de> Cc: Stefano Babic <sbabic@denx.de> Cc: Matthias Weisser <weisserm@arcor.de>
* | ehci-mxc: Make EHCI power/oc polarities configurableBenoît Thébaudeau2012-11-16-0/+56
| | | | | | | | | | | | | | | | | | | | Make EHCI power and overcurrent polarities configurable. If not set, these new configurartions keep the default register values so that existing board files do not have to be changed. Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com> Cc: Marek Vasut <marex@denx.de> Cc: Stefano Babic <sbabic@denx.de>
* | ehci-mx5: Add missing OC_DIS for i.MX53Benoît Thébaudeau2012-11-16-0/+24
| | | | | | | | | | | | | | | | The i.MX53 has MXC_H*_UCTRL_H*_OC_DIS_BIT bits to disable the oc pin. Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com> Cc: Marek Vasut <marex@denx.de> Cc: Stefano Babic <sbabic@denx.de>
* | ehci-mx5: Fix *PM usage for i.MX53Benoît Thébaudeau2012-11-16-1/+6
| | | | | | | | | | | | | | | | The MXC_*_UCTRL_*PM_BIT bits are available only on i.MX51. Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com> Cc: Marek Vasut <marex@denx.de> Cc: Stefano Babic <sbabic@denx.de>
* | ehci-mx5: Fix OPM usageBenoît Thébaudeau2012-11-16-2/+2
| | | | | | | | | | | | | | | | | | MXC_OTG_UCTRL_OPM_BIT disables (masks) the power/oc pins if set, like MXC_H1_UCTRL_H1PM_BIT and MXC_H2_UCTRL_H2PM_BIT, not the opposite. Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com> Cc: Marek Vasut <marex@denx.de> Cc: Stefano Babic <sbabic@denx.de>
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