| Commit message (Collapse) | Author | Age | Lines |
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The change entitled "Reduce CONFIG_MPC8YXX_TSECx to CONFIG_TSECx"
broke multiple PHY support in tsec.c. This fixes it.
Signed-off-by: Zach Sadecki <Zach.Sadecki@ripcode.com>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
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Allow the address of the Ten Bit Interface (TBI) to be changed in the
event of a conflict with another device.
Signed-off by: Joe Hamman <joe.hamman@embeddedspecialties.com>
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Signed-off-by: Wolfgang Denk <wd@denx.de>
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Conflicts:
CHANGELOG
fs/fat/fat.c
include/configs/MPC8560ADS.h
include/configs/pcs440ep.h
net/eth.c
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Signed-off-by: Jon Loeliger <jdl@freescale.com>
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This is a compatibility step that allows both the older form
and the new form to co-exist for a while until the older can
be removed entirely.
All transformations are of the form:
Before:
#if (CONFIG_COMMANDS & CFG_CMD_AUTOSCRIPT)
After:
#if (CONFIG_COMMANDS & CFG_CMD_AUTOSCRIPT) || defined(CONFIG_CMD_AUTOSCRIPT)
Signed-off-by: Jon Loeliger <jdl@freescale.com>
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The Marvel 88E1111S driver for the TSEC was copied from the
88E1101 driver, and included a fix for an erratum which does not
exist on that part. Now it is removed
Signed-off-by: Andy Fleming <afleming@freescale.com>
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Jarrold Wen noticed that the generic PHY code always matches
under the current implementation. Change it so the first match
wins, and *only* unknown PHYs trigger the generic driver
Signed-off-by: Andy Fleming <afleming@freescale.com>
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Fix a bug in the Marvell 88e1145 PHY init code in the TSEC driver
where the reset was being done after the errata code instead of
before.
Signed-off-by: Haiying Wang <haiying.wang@freescale.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
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For all practical u-boot purposes, TSECs don't differ throughout the
mpc8[356]xx families; reduce CONFIG_MPC8YXX_TSECx to CONFIG_TSECx.
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
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Added support for Broadcom's BCM5464 Quad Phy
Signed-off-by: Joe Hamman <joe.hamman@embeddedspecialties.com>
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Signed-off-by: Wolfgang Denk <wd@denx.de>
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When bringing up u-boot on new boards, PHY support sometimes gets
neglected. Most PHYs don't really need any special support,
though. By adding a generic entry that always matches if nothing
else does, we can provide support for "unsupported" PHYs for the
tsec.
The generic PHY driver supports most PHYs, including gigabit.
Signed-off-by: David Updegraff <dave@cray.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
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* Add support to the Makefile
* Add 8544 configuration support to the tsec driver
* Add 8544 SVR numbers to processor.h
Signed-off-by: Ed Swarthout <Ed.Swarthout@freescale.com>
Signed-off-by: Jon Loeliger <jdl@freescale.com>
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I've redone the SBC8349 support to match git-current, which
incorporates all the MPC834x updates from Freescale since the 1.1.6
release, including the DDR changes.
I've kept all the SBC8349 files as parallel as possible to the
MPC8349EMDS ones for ease of maintenance and to allow for easy
inspection of what was changed to support this board. Hence the SBC8349
U-Boot has FDT support and everything else that the MPC8349EMDS has.
Fortunately the Freescale updates added support for boards using CS0,
but I had to change spd_sdram.c to allow for board specific settings for
the sdram_clk_cntl (it is/was hard coded to zero, and that remains the
default if the board doesn't specify a value.)
Hopefully this should be mergeable as-is and require no whitespace
cleanups or similar, but if something doesn't measure up then let me
know and I'll fix it.
Thanks,
Paul.
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PREREQUISITE PATCHES:
* This patch can only be applied after the following patches have been applied:
1) DNX#2006090742000024 "Add support for multiple I2C buses"
2) DNX#2006090742000033 "Multi-bus I2C implementation of MPC834x"
3) DNX#2006091242000041 "Additional MPC8349 support for multibus i2c"
4) DNX#2006091242000078 "Add support for variable flash memory sizes on 83xx systems"
5) DNX#2006091242000069 "Add support for Errata DDR6 on MPC 834x systems"
CHANGELOG:
* Add support for the Freescale MPC8349E-mITX reference design platform.
The second TSEC (Vitesse 7385 switch) is not supported at this time.
Signed-off-by: Timur Tabi <timur@freescale.com>
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Added a phy initialization to adjust the RGMII RX and TX timing
Always set the R100 bit in 100 BaseT mode regardless of the TSEC mode
Signed-off-by: Nick Spence <nick.spence@freescale.com>
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to a TSEC (e.g. a switch is connected via RMII) or
if the PHY is defective/incorrectly configured.
Signed-off-by: Ben Warren <bwarren@qstreams.com>
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Signed-off-by: Jon Loeliger <jdl@freescale.com>
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Format for 80-columns too.
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Conflicts:
drivers/tsec.c
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* Added support for using eTSEC 3 and eTSEC 4 on the 8548 CDS.
This will only work on rev 1.3 boards (but doesn't break older boards)
* Cleaned up some comments to reflect the expanded role of tsec
in other systems
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When tftp a non-exist file from the tftp server, u-boot will check
the link of all eth port. The original file will return wrong link
state on the no link ports.
signed-off-by: Jason Jin <Jason.Jin@freescale.com>
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Patch by Murray Jensen, 08 Jul 2005
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Patch by Stefan Roese, 21 Sep 2005
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- C++ comments
- Trailing white space
- Indentation not by TAB
- Excessive amount of empty lines
- Trailing empty lines
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Add support for the Freescale MPC8349ADS board.
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Move the TSEC driver out of cpu/mpc85xx as it will be shared
by the upcoming mpc83xx family as well.
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