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* MX28: SPI: Add DMA transfer supportMarek Vasut2012-09-01-1/+116
| | | | | | | | | | | | | | | | | The DMA transfers happen only if the transfered data are larger than 512 bytes. Otherwise PIO is used. This is a small speed optimization. The DMA transfer doesn't work if unaligned transfer is requested due to the limitation of the DMA controller. This has to be fixed by introducing generic bounce buffer. Therefore the DMA feature is now disabled by default. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Fabio Estevam <festevam@gmail.com> Cc: Otavio Salvador <otavio@ossystems.com.br> Cc: Stefano Babic <sbabic@denx.de> Cc: Wolfgang Denk <wd@denx.de>
* MX28: SPI: Pull out the PIO transfer functionMarek Vasut2012-09-01-33/+41
| | | | | | | | | | | Pull out all the PIO transfer logic into separate function, so DMA can be added. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Fabio Estevam <festevam@gmail.com> Cc: Otavio Salvador <otavio@ossystems.com.br> Cc: Stefano Babic <sbabic@denx.de> Cc: Wolfgang Denk <wd@denx.de>
* MX28: SPI: Refactor spi_xfer a bitMarek Vasut2012-09-01-10/+22
| | | | | | | | | | This makes it easier to adapt for addition of DMA support. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Fabio Estevam <festevam@gmail.com> Cc: Otavio Salvador <otavio@ossystems.com.br> Cc: Stefano Babic <sbabic@denx.de> Cc: Wolfgang Denk <wd@denx.de>
* spi: Fix merge conflicts - MakefileMichal Simek2012-08-07-1/+0
| | | | | | | | | | | | | | | The patch "spi: tegra2: rename tegra2_spi.* to tegra_spi.*" (sha1: edffa63d3d6e76991998789f9fcbaa483731ca65) renamed tegra2_spi.c to tegra_spi.c and the patch "Merge branch 'master' of git://git.denx.de/u-boot-microblaze" (sha1: d978780b2e676c005460cd561f4f15b5220bdf49) has wrongly resolved confict. This patch fix it. Signed-off-by: Michal Simek <monstr@monstr.eu>
* Merge branch 'master' of git://git.denx.de/u-boot-microblazeWolfgang Denk2012-07-31-0/+351
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | * 'master' of git://git.denx.de/u-boot-microblaze: microblaze: Wire up SPI driver spi: microblaze: Adds driver for Xilinx SPI controller microblaze: intc: Clear interrupt code microblaze: Call serial multi initialization microblaze: Move __udelay implementation microblaze: Remove extern from board.c microblaze: Wire up dts configuration fdt: Add board specific dts inclusion microblaze: Move individual board linker scripts to common script in cpu tree. microblaze: Add gpio.h microblaze: Add missing undefs for UBI and UBIFS microblaze: Expand and correct configuration comments microblaze: Enable ubi support microblaze: Avoid compile error on systems without cfi flash microblaze: Remove wrong define CONFIG_SYS_FLASH_PROTECTION Conflicts: drivers/spi/Makefile Signed-off-by: Wolfgang Denk <wd@denx.de>
| * spi: microblaze: Adds driver for Xilinx SPI controllerStephan Linz2012-07-31-0/+350
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This is an improved version of the driver patch original submitted by Graeme Smecher <graeme.smecher@mail.mcgill.ca> The changes are: - remove hard coded Xilinx BSP defines (XPAR_SPI_*) and use CONFIG_SYS_SPI_BASE from config.h instead - add extensive register struct definitions - remove offset calculation for register access and use the new register struct instead - move default SPI controller configuration from spi_setup_slave() to spi_claim_bus() - add spi_set_speed() - insert SPI controller deactivation in spi_release_bus() - protect while loops in spi_xfer() with counter / timeouts - support SPI mode flags: LSB_FIRST, CPHA, CPOL, LOOP Come from: http://patchwork.ozlabs.org/patch/71797/ Signed-off-by: Stephan Linz <linz@li-pro.net> Tested-by: Michal Simek <monstr@monstr.eu>
* | kw_spi: add weak functions board_spi_claim/release_busValentin Longchamp2012-07-07-1/+12
| | | | | | | | | | | | | | | | | | | | This allows a final, board specific, step in the claim/relase_bus function for the SPI controller, which may be needed for some hardware designs. Signed-off-by: Valentin Longchamp <valentin.longchamp@keymile.com> cc: Holger Brunck <holger.brunck@keymile.com> cc: Prafulla Wadaskar <prafulla@marvell.com>
* | kw_spi: support spi_claim/release_bus functionsValentin Longchamp2012-07-07-0/+36
| | | | | | | | | | | | | | | | | | | | | | | | | | These two function nows ensure that the MPP is configured correctly for the SPI controller before any SPI access, and restore the initial configuration when the access is over. Since the used pins for the SPI controller can differ (2 possibilities for each signal), the used pins are configured with CONFIG_SYS_KW_SPI_MPP. Signed-off-by: Valentin Longchamp <valentin.longchamp@keymile.com> cc: Holger Brunck <holger.brunck@keymile.com> cc: Prafulla Wadaskar <prafulla@marvell.com>
* | kw_spi: backup and reset the MPP of the chosen CS pinValentin Longchamp2012-07-07-9/+6
| | | | | | | | | | | | | | | | | | This was not done before, and in the case of a shared pin (for MPP0 between NF_IO[2] and CSn) this could lead to problems. Signed-off-by: Valentin Longchamp <valentin.longchamp@keymile.com> cc: Holger Brunck <holger.brunck@keymile.com> cc: Prafulla Wadaskar <prafulla@marvell.com>
* | spi: tegra2: rename tegra2_spi.* to tegra_spi.*Tom Warren2012-07-07-3/+3
| | | | | | | | | | | | | | | | In anticipation of Tegra3 support, start removing/renaming Tegra2-specific files. No functional changes (yet). Also updated copyright to 2012. Signed-off-by: Tom Warren <twarren@nvidia.com>
* | spi: Tegra2: Seaboard: fix UART corruption during SPI transactionsTom Warren2012-07-07-1/+12
|/ | | | | | | | | | | Simon Glass's proposal to fix this on Seaboard was NAK'd, so I removed his NS16550 references and added a small delay before SPI/UART muxing. Tested on my Seaboard with large SPI reads/writes and saw no corruption (crc's matched) and no spurious comm chars. Signed-off-by: Tom Warren <twarren@nvidia.com> Acked-by: Simon Glass <sjg@chromium.org> Tested-by: Jimmy Zhang <jimmzhang@nvidia.com>
* spi: mxs: Allow other chip selects to workFabio Estevam2012-05-15-0/+10
| | | | | | | | | | | | MXS SSP controller may have up to three chip selects per port: SS0, SS1 and SS2. Currently only SS0 is supported in the mxs_spi driver. Allow all the three chip select to work by selecting the desired one in bits 20 and 21 of the HW_SSP_CTRL0 register. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> Acked-by: Marek Vasut <marex@denx.de>
* spi: mxs: Introduce spi_cs_is_valid()Fabio Estevam2012-05-15-2/+11
| | | | | | | | Introduce spi_cs_is_valid() for validating spi bus and chip select numbers. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> Acked-by: Marek Vasut <marex@denx.de> Acked-by: Mike Frysinger <vapier@gentoo.org>
* Merge branch 'master' of git://git.denx.de/u-boot-armWolfgang Denk2012-03-30-6/+68
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | * 'master' of git://git.denx.de/u-boot-arm: (146 commits) arm: Use common .lds file where possible arm: add a common .lds link script arm: Remove unneeded setting of LDCSRIPT Define CPUDIR for the .lds link script arm: Remove zipitz2 link script Allow arch directory to contain .lds without requiring Makefile OMAP: Remove omap1610inn-based boards arch/arm/cpu/armv7/omap-common/clocks-common.c: Fix build warnings board/ti/beagle/beagle.c: Fix build warnings sdrc.c: Fix typo in do_sdrc_init() for SPL tegra: i2c: Add I2C driver tegra: fdt: i2c: Add extra I2C bindings for U-Boot tegra: i2c: Select I2C ordering for Seaboard tegra: i2c: Enable I2C on Seaboard tegra: i2c: Select number of controllers for Tegra2 boards tegra: i2c: Initialise I2C on Nvidia boards tegra: Enhance clock support to handle 16-bit clock divisors fdt: Add function to allow aliases to refer to multiple nodes tegra: Rename NV_PA_PMC_BASE to TEGRA2_PMC_BASE tegra: fdt: Enable FDT support for Ventana tegra: fdt: Enable FDT support for Seaboard tegra: usb: Enable USB on Seaboard tegra: usb: Add common USB defines for tegra2 boards tegra: usb: Add USB support to nvidia boards arm: Check for valid FDT after console is up fdt: Avoid early panic() when there is no FDT present tegra: usb: Add support for Tegra USB peripheral tegra: fdt: Add function to return peripheral/clock ID usb: Add support for txfifo threshold tegra: usb: fdt: Add USB definitions for Tegra2 Seaboard tegra: usb: fdt: Add additional device tree definitions for USB ports tegra: fdt: Add clock bindings for Tegra2 Seaboard tegra: fdt: Add clock bindings tegra: fdt: Add additional USB binding fdt: Add tegra-usb bindings file from linux fdt: Add staging area for device tree binding documentation tegra: fdt: Add device tree file for Tegra2 Seaboard from kernel tegra: fdt: Add Tegra2x device tree file from kernel arm: fdt: Add skeleton device tree file from kernel fdt: Add basic support for decoding GPIO definitions fdt: Add functions to access phandles, arrays and bools fdt: Tidy up a few fdtdec problems fdt: Add tests for fdtdec fdt: Add fdtdec_find_aliases() to deal with alias nodes arm: Tegra2: Fix ELDK42 gcc failure with inline asm stack pointer load net: fec_mxc: allow use with cache enabled net: force PKTALIGN to ARCH_DMA_MINALIGN i.MX28: Enable caches by default i.MX28: Make use of the bounce buffer i.MX28: Do data transfers via DMA in MMC driver MMC: Implement generic bounce buffer i.MX28: Add cache support to MXS NAND driver i.MX28: Add cache support into the APBH DMA driver ARM926EJS: Implement cache operations board/vpac270/onenand.c: Fix build errors nhk8815: fix build errors atmel-boards: add missing atmel_mci.h ARM: highbank: setup env from boot source register ARM: highbank: change env config to use nvram ARM: highbank: add reset support ARM: highbank: Add boot counter support ARM: highbank: change TEXT_BASE to 0x8000 ARM: highbank: fix us_to_tick calculation ARM: highbank: add missing get_tbclk ARM: highbank: fix warning for calxedaxgmac_initialize net: calxedaxgmac: fix build due to missing __aligned definition EXYNOS: Add structure for Exynos4 DMC EXYNOS: SMDK5250: Support all 4 UARTs ARM: fix s3c2410 timer code ARM: davinci: fixes for cam_enc_4xx board omap3_spi: receive transmit mode calimain, enbw_cmc: Fix typo in comments Davinci: ea20: use gpio framework to access gpios OMAP3: mt_ventoux: sets its own mtdparts OMAP3: mt_ventoux: updated timing for FPGA twl4030: fix potential power supply handling issues NAND: TI: fix warnings in omap_gpmc.c cam_enc_4xx: Rename 'images' to 'imgs' arm: Add Prep subcommand support to bootm OMAP3: twister: add support to boot Linux from SPL SPL: call cleanup_before_linux() before booting Linux OMAP3: SPL: do not call I2C init if no I2C is set. Add cache functions to SPL for armv7 devkit8000: Implement and activate direct OS boot omap/spl: change output of spl_parse_image_header omap-common/spl: Add linux boot to SPL devkit8000/spl: init GPMC for dm9000 in SPL omap-common: Add NAND SPL linux booting devkit8000: add config for spl command Add cmd_spl command mx53ard: Initialize return code with error mx53: Make PLL2 to be the parent of UART clock configs: imx: Use CONFIG_SF_DEFAULT_CS mx28evk: Provide default values for SPI bus and chip select USB: ehci-mx6: Add proper IO accessors mx6: Read silicon revision from register i.MX28: Drop __naked function from spl_mem_init mxs_spi: Return proper timeout error i.MX28: Make the stabilization delays shorter pmic_i2c: Return error in case of invalid pmic_i2c_tx_num mx6: Remove duplicate definition of ANATOP_BASE_ADDR mx6: Fix reset cause for Power On Reset case i.MX6: mx6qsabrelite: add MACH_TYPE_MX6Q_SABRELITE i.MX6: mx6q_sabrelite: add CONFIG_REVISION_TAG i.MX28: Enable additional DRAM address bits mx6q: mx6qsabrelite: setup_spi() should be called in board_init to allow use for environment mx31: add "ARM11P power gating" to get_reset_cause mx31pdk: Fix CONFIG_SYS_MEMTEST_END efikamx: Fix CONFIG_SYS_MEMTEST_END mx53smd: Fix CONFIG_SYS_MEMTEST_END mx53evk: Fix CONFIG_SYS_MEMTEST_END mx51evk: Fix CONFIG_SYS_MEMTEST_END i.MX6: mx6qsabrelite: add ext2 support imximage: Remove overwriting of flash_offset IXP: Fix GPIO_INT_ACT_LOW_SET() IXP: Fix NAND build warning on PDNB3 and SCPU IXP: Move PDNB3 and SCPU from Makefile to boards.cfg IXP: Squash warnings in IXP NPE IXP: Fix missing MACH_TYPE_{ACTUX?,PNB3,DVLHOST} IXP: Make IXP buildable with arm-linux- toolchains Examples: Properly append LDFLAGS to LD command SPL: Enable YMODEM support on BeagleBone and AM335x EVM SPL: Add YMODEM over UART load support SPL: Add README.omap3 README: document more SPL config options spl.c: Use __noreturn decorator config.mk: Check for -fstack-usage support config.mk: Make cc-option create a file under include/generated ...
| * omap3_spi: receive transmit modejacopo mondi2012-03-27-3/+65
| | | | | | | | | | | | | | | | | | | | Implementation of receive-transmit mode for omap3 MCSPI. Introduces full duplex communication, needed by some spi devices (such as enc28j60). Signed-off-by: jacopo mondi <mondi@cs.unibo.it> <j.mondi@voltaelectronics.com>
| * mxs_spi: Return proper timeout errorFabio Estevam2012-03-27-3/+3
| | | | | | | | | | | | | | Instead of returning -1, it is preferred to return -ETIMEDOUT in case of timeouts. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> Acked-by: Marek Vasut <marex@denx.de>
* | sh_spi: Add 4 chip select signals supportingYoshihiro Shimoda2012-03-26-4/+19
|/ | | | | | | The module has 4 chip select signals. This patch supports it. Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com> Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
* mxc_spi: move machine specifics into CPU headersEric Nelson2012-02-27-87/+6
| | | | | | | | | | | | | | Move (E)CSPI register declarations into the imx-regs.h files for each supported CPU Introduce two new macros to control conditional setup MXC_CSPI - Used for processors with the Configurable Serial Peripheral Interface (MX3x) MXC_ECSPI - For processors with Enhanced Configurable... (MX5x, MX6x) Signed-off-by: Eric Nelson <eric.nelson@boundarydevices.com> Acked-by: Dirk Behme <dirk.behme@de.bosch.com> Acked-by: Stefano Babic <sbabic@denx.de> Acked-by: Jason Liu <jason.hui@linaro.org> Tested-by: Jason Liu <jason.hui@linaro.org>
* kirkwood_spi: correct access to irq_mask registerIan Campbell2012-02-12-1/+1
| | | | | | | | | | | | Problem appears to have been present since day one but masked because alignment aborts were not enabled. ca4b55800ed7 "arm, arm926ejs: always do cpu critical inits" turned on alignment aborts and uncovered this latent problem. Signed-off-by: Ian Campbell <ijc@hellion.org.uk> Acked-By: Jason Cooper <u-boot@lakedaemon.net> Tested-By: Holger Brunck <holger.brunck@keymile.com> Cc: Prafulla Wadaskar <prafulla@marvell.com> Cc: Albert ARIBAUD <albert.u.boot@aribaud.net>
* mx28: fix i.MX28 spi driverMatthias Fuchs2012-02-12-3/+9
| | | | | | | | | | | | | | | The generic spi flash driver (drivers/mtd/spi/spi_flash.c) uses the spi low level driver's spi_xfer() function with len=0 to deassert the SPI flash' chip select. But the i.MX28 spi driver rejects this call due to len=0. This patch implements an exception for len=0 with the SPI_XFER_END flag set. This results in an extra read with the chip select being deasserted afterwards. There seems to be no way to deassert the signal by hand. Signed-off-by: Matthias Fuchs <matthias.fuchs@esd.eu> Tested-by: Fabio Estevam <fabio.estevam@freescale.com>
* tegra2: spi: Support SPI / UART switchSimon Glass2011-12-24-0/+14
| | | | | | | | | | Add the SPI / UART switch logic into the Tegra2 SPI driver so that it can co-exist with the NS16550 UART. We need the ns16550.h header for NS16550_t for now. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com>
* tegra2: spi: Add SPI driver for Tegra2 SOCTom Warren2011-12-24-0/+266
| | | | | | | This driver supports SPI on Tegra2, running at 48MHz. Signed-off-by: Tom Warren <twarren@nvidia.com> Acked-by: Mike Frysinger <vapier@gentoo.org>
* drivers/spi/atmel_spi.c: Fix GCC 4.6 warningAnatolij Gustschin2011-11-16-2/+0
| | | | | | | | | Fix: atmel_spi.c: In function 'spi_xfer': atmel_spi.c:139:7: warning: variable 'ret' set but not used [-Wunused-but-set-variable] Signed-off-by: Anatolij Gustschin <agust@denx.de>
* iMX28: Add SPI driverMarek Vasut2011-11-11-0/+187
| | | | | | | Signed-off-by: Marek Vasut <marek.vasut@gmail.com> Cc: Stefano Babic <sbabic@denx.de> Cc: Wolfgang Denk <wd@denx.de> Cc: Detlev Zundel <dzu@denx.de>
* Merge branch 'master' of git://git.denx.de/u-boot-armWolfgang Denk2011-10-28-0/+234
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | * 'master' of git://git.denx.de/u-boot-arm: ARM: Add Calxeda Highbank platform dkb: make mmc command as default enabled Marvell: dkb: add mmc support ARM: pantheon: add mmc definition davinci: remove config.mk file from the sources ARM:AM33XX: Add support for TI AM335X EVM ARM:AM33XX: Added timer support ARM:AM33XX: Add emif/ddr support ARM:AM33XX: Add clock definitions ARM:AM33XX: Added support for AM33xx omap3/emif4: fix registers definition davinci: remove obsolete macro CONFIG_EMAC_MDIO_PHY_NUM davinci: emac: add support for more than 1 PHYs davinci: emac: add new features to autonegotiate for EMAC da850evm: Move LPSC configuration to board_early_init_f() omap4_panda: Build in cmd_gpio support on panda omap: Don't use gpio_free to change direction to input mmc: omap: Allow OMAP_HSMMC[23]_BASE to be unset OMAP3: overo : Add environment variable optargs to bootargs OMAP3: overo: Move ethernet CS4 configuration to execute based on board id OMAP3: overo : Use ttyO2 instead of ttyS2. da830: add support for NAND boot mode dm36x: revert cache disable patch dm644X: revert cache disable patch devkit8000: Add malloc space omap: spl: fix build break due to changes in FAT OMAP3 SPL: Provide weak omap_rev_string omap: beagle: Use ubifs instead of jffs2 for nand boot omap: overo: Disable pull-ups on camera PCLK, HS and VS signals omap: overo: Configure mux for gpio10 SPL: Add DMA library omap3: Add interface for omap3 DMA omap3: Add DMA register accessors omap3: Add Base register for DMA arm, davinci: add missing LSPC define for MMC/SD1 U-Boot/SPL: omap4: Make ddr pre-calculated timings as default. DaVinci: correct MDSTAT.STATE mask omap4: splitting padconfs into common, 4430 and 4460 omap4: adding revision detection for 4460 ES1.1 omap4: replacing OMAP4_CONTROL with OMAP4430_CONTROL gplug: fixed build error as a result of code cleanup patch kirkwood_spi: add dummy spi_init() gpio: mvmfp: reduce include platform file ARM: orion5x: reduce dependence of including platform file serial: reduce include platform file for marvell chip ARM: kirkwood: reduce dependence of including platform file ARM: armada100: reduce dependence of including platform file ARM: pantheon: reduce dependence of including platform file Armada100: Add env storage support for Marvell gplugD Armada100: Add SPI flash support for Marvell gplugD Armada100: Add SPI support for Marvell gplugD SPI: Add SPI driver support for Marvell Armada100 dreamplug: initial board support. imx: fix coding style misc: pmic: drop old Freescale's pmic driver MX31: mx31pdk: use new pmic driver MX31: mx31ads: use new pmic driver MX31: mx31_litekit: use new pmic driver MX5: mx53evk: use new pmic driver MX5: mx51evk: use new pmic driver MX35: mx35pdk: use new pmic driver misc: pmic: addI2C support to pmic_fsl driver misc: pmic: use I2C_SET_BUS in pmic I2C MX5: efikamx/efikasb: use new pmic driver MX3: qong: use new pmic driver RTC: Switch mc13783 to generic pmic code MX5: vision2: use new pmic driver misc: pmic: Freescale PMIC switches to generic PMIC driver misc:pmic:samsung Enable PMIC driver at GONI target misc:pmic:max8998 MAX8998 support at a new PMIC driver. misc:pmic:core New generic PMIC driver mx31pdk: Remove unneeded config mx31: provide readable WEIM CS accessor MX51: vision2: Set global macros I2C: Add i2c_get/set_speed() to mxc_i2c.c ARM: Update mach-types devkit8000: Add config to enable SPL MMC boot devkit8000: protect board_mmc_init arm, post: add missing post_time_ms for arm cosmetic, post: Codingstyle cleanup arm, logbuffer: make it compileclean tegra2: Enable MMC for Seaboard tegra2: Add more pinmux functions tegra2: Rename PIN_ to PINGRP_ tegra2: Add more clock functions tegra2: Clean up board code a little tegra2: Rename CLOCK_PLL_ID to CLOCK_ID
| * kirkwood_spi: add dummy spi_init()Michael Walle2011-10-27-0/+4
| | | | | | | | | | | | The spi_init() function is missing. Add it. Signed-off-by: Michael Walle <michael@walle.cc>
| * ARM: kirkwood: reduce dependence of including platform fileLei Wen2011-10-27-0/+1
| | | | | | | | | | | | | | | | | | | | | | For files like the drivers/serial/serial.c, it must include the platform file, as the CONFIG_SYS_NS16550_COM1 must reference to the definition in the platform definition files. Include the platform definition file in the config file, so that it would decouple the dependence for the driver files. Signed-off-by: Lei Wen <leiwen@marvell.com>
| * SPI: Add SPI driver support for Marvell Armada100Ajay Bhargav2011-10-27-0/+229
| | | | | | | | | | | | | | This patch provides support for SPI emulated over SSP for Marvell Armada100 SOC. Signed-off-by: Ajay Bhargav <ajay.bhargav@einfochips.com>
* | GCC4.6: Squash warnings in kirkwood_spi.cMarek Vasut2011-10-27-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | kirkwood_spi.c:125:2: warning: format '%08X' expects type 'unsigned int', but argument 4 has type 'const void *' kirkwood_spi.c:125:2: warning: format '%08X' expects type 'unsigned int', but argument 5 has type 'void *' kirkwood_spi.c:160:5: warning: format '%08x' expects type 'unsigned int', but argument 2 has type 'void *' Signed-off-by: Marek Vasut <marek.vasut@gmail.com> Cc: Wolfgang Denk <wd@denx.de> Cc: Simon Glass <sjg@chromium.org> Cc: Mike Frysinger <vapier@gentoo.org>
* | GCC4.6: Squash warnings in fsl_espi.cMarek Vasut2011-10-27-3/+3
|/ | | | | | | | | | | | | | | | fsl_espi.c: In function 'spi_setup_slave': fsl_espi.c:100: warning: format '%d' expects type 'int', but argument 3 has type 'long unsigned int' fsl_espi.c: In function 'spi_xfer': fsl_espi.c:237: warning: format '%08x' expects type 'unsigned int', but argument 5 has type 'const void *' fsl_espi.c:237: warning: format '%08x' expects type 'unsigned int', but argument 7 has type 'void *' Signed-off-by: Marek Vasut <marek.vasut@gmail.com> Cc: Wolfgang Denk <wd@denx.de> Cc: Simon Glass <sjg@chromium.org> Cc: Mike Frysinger <vapier@gentoo.org>
* Blackfin: bfin_spi: fix build error when DEBUG is definedMike Frysinger2011-10-16-1/+1
| | | | | | The new debug() changes pointed out debug code that rotted a little. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
* IMX: uniform GPIO interface using GPIO frameworkStefano Babic2011-09-04-4/+4
| | | | | | | | | IMX processors has a slightly different interface to access GPIOs and do not make use of the provided GPIO framework. The patch substitutes mxc_ specific functions and make use of the API in asm/gpio.h Signed-off-by: Stefano Babic <sbabic@denx.de>
* AT91/SPI: fix atmel_dataflash_spi.c to allow building without warningsReinhard Meyer2011-08-03-3/+13
| | | | Signed-off-by: Reinhard Meyer <u-boot@emk-elektronik.de>
* andes_spi: add andes_spi interfaceMacpaul Lin2011-07-25-0/+431
| | | | | | | | | andes_spi is an spi interface developed by Andes Tech. Signed-off-by: Macpaul Lin <macpaul@andestech.com> Cc: Wolfgang Denk <wd@denx.de> Cc: Mike Frysinger <vapier@gentoo.org> Acked-by: Mike Frysinger <vapier@gentoo.org>
* MX31: Cleanup clock functionStefano Babic2011-07-18-2/+0
| | | | | | | The patch provide the same API used with other i.MX processors and get rid of mx31_ functions. Signed-off-by: Stefano Babic <sbabic@denx.de>
* ATMEL spi_dataflash driver - fix to build againReinhard Meyer2011-06-21-2/+1
| | | | | | | | The rework effort for ATMEL (AT91/AVR32) accidentially broke build of this driver. Fix this to make it build again. However this driver should be reworked as soon as possible! Signed-off-by: Reinhard Meyer <u-boot@emk-elektronik.de>
* mxc_spi.c: typo fixedHelmut Raiger2011-06-21-1/+1
| | | | Signed-off-by: Helmut Raiger <helmut.raiger@hale.at>
* ATMEL: fix dataflash (dirty) this file should be converted to struct SoC accessReinhard Meyer2011-05-18-37/+57
| | | | Signed-off-by: Reinhard Meyer <u-boot@emk-elektronik.de>
* ATMEL: fix related common atmel driver filesReinhard Meyer2011-05-18-8/+8
| | | | Signed-off-by: Reinhard Meyer <u-boot@emk-elektronik.de>
* Merge branch 'master' of git://git.denx.de/u-boot-mpc85xxWolfgang Denk2011-04-30-0/+335
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| * powerpc: eSPI and eSPI controller supportMingkai Hu2011-04-29-0/+335
| | | | | | | | | | | | | | | | Signed-off-by: Mingkai Hu <Mingkai.hu@freescale.com> Singed-off-by: Jerry Huang <Chang-Ming.Huang@freescale.com> Signed-off-by: Shaohui Xie <b21989@freescale.com> Cc: Mike Frysinger <vapier@gentoo.org> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* | spi: add new driver for OpenCores tiny_spiThomas Chou2011-04-30-0/+249
|/ | | | | | | | This patch adds support for OpenCores tiny_spi. http://opencores.org/project,tiny_spi Signed-off-by: Thomas Chou <thomas@wytron.com.tw>
* Merge branch 'master' of git://git.denx.de/u-boot-armWolfgang Denk2011-04-27-7/+2
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| * IMX: MX31: Cleanup include files and drop nasty #ifdef in driversStefano Babic2011-04-27-7/+2
| | | | | | | | | | | | | | | | | | | | As exception among the i.MX processors, the i.MX31 has headers without general names (mx31-regs.h, mx31.h instead of imx-regs.h and clock.h). This requires several nasty #ifdef in the drivers to include the correct header. The patch cleans up the driver and renames the header files as for the other i.MX processors. Signed-off-by: Stefano Babic <sbabic@denx.de>
* | bfin_spi: add spi_set_speedThomas Chou2011-04-25-13/+19
|/ | | | | | | The new speed will be applied by spi_claim_bus. Signed-off-by: Thomas Chou <thomas@wytron.com.tw> Signed-off-by: Mike Frysinger <vapier@gentoo.org>
* add CONFIG_SPI_IDLE_VAL for cf_spi.c to allow use of spi_mmcWolfgang Wegner2011-04-13-3/+11
| | | | | | | | | | This patch adds CONFIG_SPI_IDLE_VAL to cf_spi.c The default setting is 0x0 to behave same as current version, in case CONFIG_SPI_MMC is set, the value is set to 0xFFFF (all ones). In either case, the value can be overwritten by board configuration. Signed-off-by: Wolfgang Wegner <w.wegner@astro-kom.de> Signed-off-by: Andy Fleming <afleming@freescale.com>
* Blackfin: BF50x: new processor portMike Frysinger2011-04-08-0/+2
| | | | Signed-off-by: Mike Frysinger <vapier@gentoo.org>
* Coding Style cleanup: remove trailing empty linesWolfgang Denk2011-03-27-2/+0
| | | | Signed-off-by: Wolfgang Denk <wd@denx.de>
* altera_spi: add spi_set_speedThomas Chou2011-02-08-0/+5
| | | | | | | | | Added this for mmc_spi driver. Though altera spi core does not support programmable speed. It is fixed when configured in sopc-builder. Signed-off-by: Thomas Chou <thomas@wytron.com.tw> Signed-off-by: Scott McNutt <smcnutt@psyent.com>
* Merge branch 'master' of git://git.denx.de/u-boot-shWolfgang Denk2011-02-04-0/+341
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