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path: root/drivers/spi/bfin_spi.c
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* blackfin: add spi and i2c specific get clock functionsSonic Zhang2014-02-20-3/+4
| | | | Signed-off-by: Sonic Zhang <sonic.zhang@analog.com>
* spi: bfin_spi: Remove unnecessary test for bus and pins[bus]Axel Lin2013-12-06-8/+9
| | | | | | | | | | | For invalid bus number, current code returns NULL in the default case of switch-case statements. In additional, pins[bus] is always not NULL because it is the address of specific row of the two-dimensional array. Thus this patch removes these unnecessary test. Signed-off-by: Axel Lin <axel.lin@ingics.com> Acked-by: Scott Jiang <scott.jiang.linux@gmail.com> Signed-off-by: Sonic Zhang <sonic.zhang@analog.com>
* spi: Add GPL-2.0+ SPDX-License-Identifier for missing filesJagannadha Sutradharudu Teki2013-10-16-1/+1
| | | | | | | Added GPL-2.0+ SPDX-License-Identifier for missed spi source files. Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
* spi: bfin_spi: Use DIV_ROUND_UP instead of open-codedAxel Lin2013-07-31-3/+1
| | | | | | | | Use DIV_ROUND_UP to simplify the code. Signed-off-by: Axel Lin <axel.lin@ingics.com> Signed-off-by: Scott Jiang <scott.jiang.linux@gmail.com> Signed-off-by: Sonic Zhang <sonic.zhang@analog.com>
* bfin: discard invalid data and clear RXS in bf5xx spi driverScott Jiang2013-05-13-0/+2
| | | | | | | | There may be dirty data in RDBR, so we should discard invalid data. This operation also clears RXS bit in STAT register. Signed-off-by: Scott Jiang <scott.jiang.linux@gmail.com> Signed-off-by: Sonic Zhang <sonic.zhang@analog.com>
* bfin: Remove spi dma function in bf5xx.Scott Jiang2013-05-13-102/+1
| | | | | | | | | BF5xx rx dma causes spi flash random read error. Accually spi controller has problems both on tx and rx dma. So remove spi dma support in u-boot. Signed-off-by: Scott Jiang <scott.jiang.linux@gmail.com> Signed-off-by: Sonic Zhang <sonic.zhang@analog.com>
* spi: Use spi_alloc_slave() in each SPI driverSimon Glass2013-03-19-3/+1
| | | | | | | | Rather than each driver having its own way to allocate a SPI slave, use the new allocation function everywhere. This will make it easier to extend the interface without breaking drivers. Signed-off-by: Simon Glass <sjg@chromium.org>
* Blackfin: bfin_spi: fix build error when DEBUG is definedMike Frysinger2011-10-16-1/+1
| | | | | | The new debug() changes pointed out debug code that rotted a little. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
* bfin_spi: add spi_set_speedThomas Chou2011-04-25-13/+19
| | | | | | | The new speed will be applied by spi_claim_bus. Signed-off-by: Thomas Chou <thomas@wytron.com.tw> Signed-off-by: Mike Frysinger <vapier@gentoo.org>
* Blackfin: BF50x: new processor portMike Frysinger2011-04-08-0/+2
| | | | Signed-off-by: Mike Frysinger <vapier@gentoo.org>
* Blackfin: bfin_spi: add optional DMA supportMike Frysinger2010-10-02-27/+128
| | | | | | | | This moves the last piece from the old spi_flash driver to the new SPI framework -- optional DMA RX support. This typically cuts speeds by ~40% at the cost of additional ~300 bytes. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
* Blackfin: bfin_spi: use same gpio cs define as LinuxMike Frysinger2010-09-21-2/+0
| | | | | | | | Linux uses an offset of 8 to switch from hardware cs to a gpio cs, so have u-boot use the same value. Also make sure it is public for boards to access. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
* Blackfin: bfin_spi: support gpios as chip selectsMike Frysinger2010-07-13-28/+57
| | | | | | | Rather than only support the pins dedicated as chip selects, utilize the gpio framework to support any gpio pin. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
* Blackfin: bfin_spi: convert to portmux frameworkMike Frysinger2010-07-13-159/+50
| | | | | | | Rather than bang MMRs directly, use the new portmux framework to handle the details. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
* Blackfin: bfin_spi: round up clock dividerCliff Cai2010-01-17-1/+6
| | | | | | | | If the requested clock cannot be exactly obtained, round it up so that we err on the side of slightly slower rather than slightly faster. Signed-off-by: Cliff Cai <cliff.cai@analog.com> Signed-off-by: Mike Frysinger <vapier@gentoo.org>
* Blackfin: bfin_spi: let boards control idle valueCliff Cai2010-01-17-1/+5
| | | | | | | Some SPI devices like to see high idle values rather than low. Signed-off-by: Cliff Cai <cliff.cai@analog.com> Signed-off-by: Mike Frysinger <vapier@gentoo.org>
* Blackfin: spi: fix pin handling of SPI0 SSEL4Mike Frysinger2009-05-29-1/+1
| | | | | | | CS4 on SPI0 has a dedicated PH8 pin which needs to be enabled as a peripheral in order to work. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
* Blackfin: spi: make cs deassert function deterministicTodor I Mollov2009-04-06-1/+15
| | | | | | | | | | | | | | | | | | | | | | Blackfin SPI driver was not driving the SPI chip-select high before putting the chip-select signals into tri-state mode. This is probably something that slipped by unnoticed in most designs. If the signals are put directly into a tri-state mode, then the board is relying on the pull-up resistors to pull up the chip-select before the next transaction. Most of the time this is fine, except when you have two transactions that follow each other very closely, such as the flash erase and read status register commands. In this case I was seeing a 500ns separation between the transactions. In my setup, with a 10kOhm pull-up, it would meet timing spec about half the time and resulted in intermittent errors. (A stronger pull up would fix this, but our design is targeted for low power consumption and a 3.3kOhm @ 3.3v is 3.3mW of needless power consumption.) I modified the spi_cs_deactivate() function in bfin_spi.c to drive the chip-selects high before putting them into tri-state. For me, this resulted in a rise time of 5ns instead of the previous rise time of about 1us, and fully satisfied the timing spec of the chip. Signed-off-by: Todor I Mollov <tmollov@ucsd.edu> Signed-off-by: Mike Frysinger <vapier@gentoo.org>
* Blackfin: add BF538/BF539 SPI portmux handlingMike Frysinger2009-04-02-0/+18
| | | | Signed-off-by: Mike Frysinger <vapier@gentoo.org>
* Blackfin: spi: there is no PORTJ_FER MMR on BF537Sonic Zhang2009-03-23-5/+3
| | | | | | | | Since the PORTJ on the BF537 is peripheral-only (no GPIO functionality), then there is no PORTJ_FER register for us to worry about. Signed-off-by: Sonic Zhang <Sonic.Zhang@analog.com> Signed-off-by: Mike Frysinger <vapier@gentoo.org>
* Blackfin: add driver for on-chip SPI controllerMike Frysinger2009-02-02-0/+343
This fills out the SPI backend for the Blackfin on-chip SPI peripheral. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
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